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ARM: Only enforce 4-byte alignment on Thumb-2 functions with constant pools.
This appears to have been introduced back in r76698 as part of an unrelated change. I can find no official ARM documentation stating that Thumb-2 functions require 4-byte alignment; in fact, ARM documentation appears to contradict this (see, e.g., ARM Architecture Reference Manual Thumb-2 Supplement, section 2.6.1: "Thumb-2 enforces 16-bit alignment on all instructions."). Also remove code that sets alignment for ARM functions, which is redundant with code in the MachineFunction constructor, and remove the hidden -arm-align-constant-islands flag, which has been enabled by default since r146739 (Dec 2011) and has probably received sufficient testing by now. Differential Revision: http://reviews.llvm.org/D9138 llvm-svn: 235636
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@ -53,11 +53,6 @@ static cl::opt<bool>
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AdjustJumpTableBlocks("arm-adjust-jump-tables", cl::Hidden, cl::init(true),
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cl::desc("Adjust basic block layout to better use TB[BH]"));
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// FIXME: This option should be removed once it has received sufficient testing.
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static cl::opt<bool>
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AlignConstantIslands("arm-align-constant-islands", cl::Hidden, cl::init(true),
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cl::desc("Align constant islands in code"));
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/// UnknownPadding - Return the worst case padding that could result from
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/// unknown offset bits. This does not include alignment padding caused by
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/// known offset bits.
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@ -412,13 +407,6 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) {
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MF->RenumberBlocks();
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}
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// Thumb1 functions containing constant pools get 4-byte alignment.
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// This is so we can keep exact track of where the alignment padding goes.
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// ARM and Thumb2 functions need to be 4-byte aligned.
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if (!isThumb1)
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MF->ensureAlignment(2); // 2 = log2(4)
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// Perform the initial placement of the constant pool entries. To start with,
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// we put them all at the end of the function.
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std::vector<MachineInstr*> CPEMIs;
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@ -513,8 +501,7 @@ ARMConstantIslands::doInitialPlacement(std::vector<MachineInstr*> &CPEMIs) {
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unsigned MaxAlign = Log2_32(MCP->getConstantPoolAlignment());
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// Mark the basic block as required by the const-pool.
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// If AlignConstantIslands isn't set, use 4-byte alignment for everything.
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BB->setAlignment(AlignConstantIslands ? MaxAlign : 2);
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BB->setAlignment(MaxAlign);
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// The function needs to be as aligned as the basic blocks. The linker may
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// move functions around based on their alignment.
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@ -604,10 +591,6 @@ ARMConstantIslands::CPEntry
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unsigned ARMConstantIslands::getCPELogAlign(const MachineInstr *CPEMI) {
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assert(CPEMI && CPEMI->getOpcode() == ARM::CONSTPOOL_ENTRY);
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// Everything is 4-byte aligned unless AlignConstantIslands is set.
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if (!AlignConstantIslands)
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return 2;
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unsigned CPI = CPEMI->getOperand(1).getIndex();
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assert(CPI < MCP->getConstants().size() && "Invalid constant pool index.");
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unsigned Align = MCP->getConstants()[CPI].getAlignment();
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15
llvm/test/CodeGen/ARM/thumb-alignment.ll
Normal file
15
llvm/test/CodeGen/ARM/thumb-alignment.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: llc -relocation-model=pic -mtriple=thumbv7-unknown-linux -o - %s | FileCheck %s
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@x = external global i32
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; CHECK: .globl foo
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; CHECK-NEXT: .align 2
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define i32* @foo() {
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ret i32* @x
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}
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; CHECK: .globl bar
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; CHECK-NEXT: .align 1
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define i32* @bar() {
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ret i32* zeroinitializer
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}
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@ -24,13 +24,13 @@ entry:
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; make sure that bl 0 <foo> (fff7feff) is correctly encoded
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; CHECK: Sections [
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; CHECK: SectionData (
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; CHECK: 0000: 704700BF 2DE90048 FFF7FEFF BDE80088
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; CHECK: 0000: 70472DE9 0048FFF7 FEFFBDE8 0088
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; CHECK: )
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; CHECK: ]
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; CHECK: Relocations [
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; CHECK-NEXT: Section {{.*}} .rel.text {
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; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0
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; CHECK-NEXT: 0x6 R_ARM_THM_CALL foo 0x0
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; CHECK-NEXT: }
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; CHECK-NEXT: Section {{.*}} .rel.ARM.exidx {
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; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0
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