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https://github.com/capstone-engine/llvm-capstone.git
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AMDGPU/GlobalISel: Legalize more bit ops
llvm-svn: 352295
This commit is contained in:
Matt Arsenault
parent
4d47594fc5
commit
26a6c74fbe
@ -1395,6 +1395,9 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
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MI.eraseFromParent();
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return Legalized;
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}
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case TargetOpcode::G_AND:
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case TargetOpcode::G_OR:
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case TargetOpcode::G_XOR:
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case TargetOpcode::G_ADD:
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case TargetOpcode::G_SUB:
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case TargetOpcode::G_MUL:
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@ -97,9 +97,12 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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.legalFor({S32})
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.scalarize(0);
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// FIXME: 64-bit ones only legal for scalar
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// Report legal for any types we can handle anywhere. For the cases only legal
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// on the SALU, RegBankSelect will be able to re-legalize.
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getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
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.legalFor({S32, S1, S64, V2S32});
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.legalFor({S32, S1, S64, V2S32, V2S16, V4S16})
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.clampScalar(0, S32, S64)
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.scalarize(0);
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getActionDefinitionsBuilder({G_UADDO, G_SADDO, G_USUBO, G_SSUBO,
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G_UADDE, G_SADDE, G_USUBE, G_SSUBE})
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@ -323,8 +326,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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.legalIf([=](const LegalityQuery &Query) {
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const LLT &Ty0 = Query.Types[0];
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const LLT &Ty1 = Query.Types[1];
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return (Ty0.getSizeInBits() % 32 == 0) &&
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(Ty1.getSizeInBits() % 32 == 0);
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return (Ty0.getSizeInBits() % 16 == 0) &&
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(Ty1.getSizeInBits() % 16 == 0);
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});
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getActionDefinitionsBuilder(G_BUILD_VECTOR)
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@ -2,12 +2,12 @@
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_and_i32
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name: test_and_s32
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_i32
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; CHECK-LABEL: name: test_and_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
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@ -19,12 +19,12 @@ body: |
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...
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---
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name: test_and_i1
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name: test_and_s1
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_i1
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; CHECK-LABEL: name: test_and_s1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
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@ -39,12 +39,12 @@ body: |
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...
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---
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name: test_and_i64
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name: test_and_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: test_and_i64
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; CHECK-LABEL: name: test_and_s64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
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@ -56,12 +56,104 @@ body: |
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...
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---
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name: test_and_v2i32
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name: test_and_s7
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_s7
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
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; CHECK: $vgpr0 = COPY [[COPY4]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s7) = G_TRUNC %0
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%3:_(s7) = G_TRUNC %1
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%4:_(s7) = G_AND %2, %3
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%5:_(s32) = G_ANYEXT %4
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$vgpr0 = COPY %5
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...
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---
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name: test_and_s8
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_s8
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
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; CHECK: $vgpr0 = COPY [[COPY4]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s8) = G_TRUNC %0
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%3:_(s8) = G_TRUNC %1
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%4:_(s8) = G_AND %2, %3
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%5:_(s32) = G_ANYEXT %4
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$vgpr0 = COPY %5
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...
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---
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name: test_and_s16
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_s16
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
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; CHECK: $vgpr0 = COPY [[COPY4]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %0
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%3:_(s16) = G_TRUNC %1
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%4:_(s16) = G_AND %2, %3
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%5:_(s32) = G_ANYEXT %4
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$vgpr0 = COPY %5
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...
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---
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name: test_and_s24
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_s24
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
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; CHECK: $vgpr0 = COPY [[COPY4]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %0
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%3:_(s16) = G_TRUNC %1
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%4:_(s16) = G_AND %2, %3
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%5:_(s32) = G_ANYEXT %4
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$vgpr0 = COPY %5
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...
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---
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name: test_and_v2s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: test_and_v2i32
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; CHECK-LABEL: name: test_and_v2s32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
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; CHECK: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[COPY1]]
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@ -71,3 +163,92 @@ body: |
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%2:_(<2 x s32>) = G_AND %0, %1
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$vgpr0_vgpr1 = COPY %2
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...
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---
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name: test_and_v2s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
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; CHECK-LABEL: name: test_and_v2s64
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
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; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
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; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[UV2]]
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[UV3]]
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[AND]](s64), [[AND1]](s64)
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
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%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
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%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
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%2:_(<2 x s64>) = G_AND %0, %1
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
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...
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---
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name: test_and_v2s16
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_and_v2s16
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
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; CHECK: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[COPY1]]
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; CHECK: $vgpr0 = COPY [[AND]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(<2 x s16>) = COPY $vgpr1
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%2:_(<2 x s16>) = G_AND %0, %1
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$vgpr0 = COPY %2
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...
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---
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name: test_and_v3s16
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body: |
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bb.0:
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; CHECK-LABEL: name: test_and_v3s16
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; CHECK: [[DEF:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
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; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
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; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF]](<3 x s16>)
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; CHECK: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF1]](<3 x s16>)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
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; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[ANYEXT1]]
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; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[AND]](s32)
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; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
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; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s16)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ANYEXT2]], [[ANYEXT3]]
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[AND1]](s32)
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; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
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; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s16)
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; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ANYEXT4]], [[ANYEXT5]]
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[AND2]](s32)
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16)
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; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
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; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[BUILD_VECTOR]](<3 x s16>), 0
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; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>)
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%0:_(<3 x s16>) = G_IMPLICIT_DEF
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%1:_(<3 x s16>) = G_IMPLICIT_DEF
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%2:_(<3 x s16>) = G_AND %0, %1
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%4:_(<4 x s16>) = G_IMPLICIT_DEF
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%5:_(<4 x s16>) = G_INSERT %4, %2, 0
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$vgpr0_vgpr1 = COPY %5
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...
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---
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name: test_and_v4s16
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: test_and_v4s16
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
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; CHECK: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[COPY]], [[COPY1]]
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; CHECK: $vgpr0_vgpr1 = COPY [[AND]](<4 x s16>)
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%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
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%1:_(<4 x s16>) = COPY $vgpr2_vgpr3
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%2:_(<4 x s16>) = G_AND %0, %1
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$vgpr0_vgpr1 = COPY %2
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...
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@ -2,12 +2,12 @@
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_or_i32
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name: test_or_s32
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_or_i32
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; CHECK-LABEL: name: test_or_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
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@ -19,12 +19,12 @@ body: |
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...
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---
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name: test_or_i1
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name: test_or_s1
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_or_i1
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; CHECK-LABEL: name: test_or_s1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
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@ -39,12 +39,12 @@ body: |
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...
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---
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name: test_or_i64
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name: test_or_s64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: test_or_i64
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; CHECK-LABEL: name: test_or_s64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
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; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
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@ -56,12 +56,104 @@ body: |
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...
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---
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name: test_or_v2i32
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name: test_or_s7
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_or_s7
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s7) = G_TRUNC %0
|
||||
%3:_(s7) = G_TRUNC %1
|
||||
%4:_(s7) = G_OR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_s8
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_or_s8
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s8) = G_TRUNC %0
|
||||
%3:_(s8) = G_TRUNC %1
|
||||
%4:_(s8) = G_OR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_or_s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s16) = G_TRUNC %0
|
||||
%3:_(s16) = G_TRUNC %1
|
||||
%4:_(s16) = G_OR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_s24
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_or_s24
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s16) = G_TRUNC %0
|
||||
%3:_(s16) = G_TRUNC %1
|
||||
%4:_(s16) = G_OR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_v2s32
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; CHECK-LABEL: name: test_or_v2i32
|
||||
; CHECK-LABEL: name: test_or_v2s32
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
|
||||
; CHECK: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[COPY]], [[COPY1]]
|
||||
@ -71,3 +163,92 @@ body: |
|
||||
%2:_(<2 x s32>) = G_OR %0, %1
|
||||
$vgpr0_vgpr1 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_v2s64
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
|
||||
; CHECK-LABEL: name: test_or_v2s64
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
|
||||
; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[UV]], [[UV2]]
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[UV1]], [[UV3]]
|
||||
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[OR]](s64), [[OR1]](s64)
|
||||
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
|
||||
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
%2:_(<2 x s64>) = G_OR %0, %1
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_v2s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_or_v2s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
|
||||
; CHECK: [[OR:%[0-9]+]]:_(<2 x s16>) = G_OR [[COPY]], [[COPY1]]
|
||||
; CHECK: $vgpr0 = COPY [[OR]](<2 x s16>)
|
||||
%0:_(<2 x s16>) = COPY $vgpr0
|
||||
%1:_(<2 x s16>) = COPY $vgpr1
|
||||
%2:_(<2 x s16>) = G_OR %0, %1
|
||||
$vgpr0 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_v3s16
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
; CHECK-LABEL: name: test_or_v3s16
|
||||
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF]](<3 x s16>)
|
||||
; CHECK: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF1]](<3 x s16>)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
|
||||
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[ANYEXT]], [[ANYEXT1]]
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[OR]](s32)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s16)
|
||||
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ANYEXT2]], [[ANYEXT3]]
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[OR1]](s32)
|
||||
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
|
||||
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s16)
|
||||
; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ANYEXT4]], [[ANYEXT5]]
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[OR2]](s32)
|
||||
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16)
|
||||
; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[BUILD_VECTOR]](<3 x s16>), 0
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>)
|
||||
%0:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
%1:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
%2:_(<3 x s16>) = G_OR %0, %1
|
||||
%4:_(<4 x s16>) = G_IMPLICIT_DEF
|
||||
%5:_(<4 x s16>) = G_INSERT %4, %2, 0
|
||||
$vgpr0_vgpr1 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_or_v4s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; CHECK-LABEL: name: test_or_v4s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
||||
; CHECK: [[OR:%[0-9]+]]:_(<4 x s16>) = G_OR [[COPY]], [[COPY1]]
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[OR]](<4 x s16>)
|
||||
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
||||
%1:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
||||
%2:_(<4 x s16>) = G_OR %0, %1
|
||||
$vgpr0_vgpr1 = COPY %2
|
||||
...
|
||||
|
||||
@ -2,12 +2,12 @@
|
||||
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
|
||||
|
||||
---
|
||||
name: test_xor_i32
|
||||
name: test_xor_s32
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_i32
|
||||
; CHECK-LABEL: name: test_xor_s32
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
|
||||
@ -19,12 +19,12 @@ body: |
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_i1
|
||||
name: test_xor_s1
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_i1
|
||||
; CHECK-LABEL: name: test_xor_s1
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
|
||||
@ -39,12 +39,12 @@ body: |
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_i64
|
||||
name: test_xor_s64
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; CHECK-LABEL: name: test_xor_i64
|
||||
; CHECK-LABEL: name: test_xor_s64
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
|
||||
@ -56,12 +56,104 @@ body: |
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v2i32
|
||||
name: test_xor_s7
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_s7
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s7) = G_TRUNC %0
|
||||
%3:_(s7) = G_TRUNC %1
|
||||
%4:_(s7) = G_XOR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_s8
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_s8
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s8) = G_TRUNC %0
|
||||
%3:_(s8) = G_TRUNC %1
|
||||
%4:_(s8) = G_XOR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s16) = G_TRUNC %0
|
||||
%3:_(s16) = G_TRUNC %1
|
||||
%4:_(s16) = G_XOR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_s24
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_s24
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||||
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY3]]
|
||||
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[XOR]](s32)
|
||||
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s16) = G_TRUNC %0
|
||||
%3:_(s16) = G_TRUNC %1
|
||||
%4:_(s16) = G_XOR %2, %3
|
||||
%5:_(s32) = G_ANYEXT %4
|
||||
$vgpr0 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v2s32
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; CHECK-LABEL: name: test_xor_v2i32
|
||||
; CHECK-LABEL: name: test_xor_v2s32
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[COPY]], [[COPY1]]
|
||||
@ -71,3 +163,92 @@ body: |
|
||||
%2:_(<2 x s32>) = G_XOR %0, %1
|
||||
$vgpr0_vgpr1 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v2s64
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
|
||||
; CHECK-LABEL: name: test_xor_v2s64
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
|
||||
; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[UV]], [[UV2]]
|
||||
; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[UV1]], [[UV3]]
|
||||
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[XOR]](s64), [[XOR1]](s64)
|
||||
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
|
||||
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
|
||||
%2:_(<2 x s64>) = G_XOR %0, %1
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v2s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: test_xor_v2s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(<2 x s16>) = G_XOR [[COPY]], [[COPY1]]
|
||||
; CHECK: $vgpr0 = COPY [[XOR]](<2 x s16>)
|
||||
%0:_(<2 x s16>) = COPY $vgpr0
|
||||
%1:_(<2 x s16>) = COPY $vgpr1
|
||||
%2:_(<2 x s16>) = G_XOR %0, %1
|
||||
$vgpr0 = COPY %2
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v3s16
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
; CHECK-LABEL: name: test_xor_v3s16
|
||||
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF]](<3 x s16>)
|
||||
; CHECK: [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[DEF1]](<3 x s16>)
|
||||
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)
|
||||
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s16)
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT]], [[ANYEXT1]]
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[XOR]](s32)
|
||||
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)
|
||||
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s16)
|
||||
; CHECK: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT2]], [[ANYEXT3]]
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[XOR1]](s32)
|
||||
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)
|
||||
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s16)
|
||||
; CHECK: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[ANYEXT4]], [[ANYEXT5]]
|
||||
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[XOR2]](s32)
|
||||
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16)
|
||||
; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
|
||||
; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[BUILD_VECTOR]](<3 x s16>), 0
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>)
|
||||
%0:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
%1:_(<3 x s16>) = G_IMPLICIT_DEF
|
||||
%2:_(<3 x s16>) = G_XOR %0, %1
|
||||
%4:_(<4 x s16>) = G_IMPLICIT_DEF
|
||||
%5:_(<4 x s16>) = G_INSERT %4, %2, 0
|
||||
$vgpr0_vgpr1 = COPY %5
|
||||
...
|
||||
|
||||
---
|
||||
name: test_xor_v4s16
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; CHECK-LABEL: name: test_xor_v4s16
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
||||
; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
||||
; CHECK: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[COPY]], [[COPY1]]
|
||||
; CHECK: $vgpr0_vgpr1 = COPY [[XOR]](<4 x s16>)
|
||||
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
|
||||
%1:_(<4 x s16>) = COPY $vgpr2_vgpr3
|
||||
%2:_(<4 x s16>) = G_XOR %0, %1
|
||||
$vgpr0_vgpr1 = COPY %2
|
||||
...
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user