[X86] Add avx512 command line to ptest.ll to demonstrate that 512-bit vectors are not handled by LowerVectorAllZeroTest.

llvm-svn: 324130
This commit is contained in:
Craig Topper 2018-02-02 20:12:45 +00:00
parent bd2f6e9570
commit e7e147f52c

View File

@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx < %s | FileCheck %s --check-prefix=SSE41
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 < %s | FileCheck %s --check-prefix=AVX
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
define i32 @veccond128(<4 x i32> %input) {
; SSE41-LABEL: veccond128:
@ -84,19 +85,49 @@ define i32 @veccond512(<16 x i32> %input) {
; SSE41-NEXT: movl $1, %eax
; SSE41-NEXT: retq
;
; AVX-LABEL: veccond512:
; AVX: # %bb.0: # %entry
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: je .LBB2_2
; AVX-NEXT: # %bb.1: # %if-true-block
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
; AVX-NEXT: .LBB2_2: # %endif-block
; AVX-NEXT: movl $1, %eax
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
; AVX1-LABEL: veccond512:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vptest %ymm0, %ymm0
; AVX1-NEXT: je .LBB2_2
; AVX1-NEXT: # %bb.1: # %if-true-block
; AVX1-NEXT: xorl %eax, %eax
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
; AVX1-NEXT: .LBB2_2: # %endif-block
; AVX1-NEXT: movl $1, %eax
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX512-LABEL: veccond512:
; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vextracti32x4 $3, %zmm0, %xmm1
; AVX512-NEXT: vmovq %xmm1, %rax
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm2
; AVX512-NEXT: vmovq %xmm2, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm3
; AVX512-NEXT: vmovq %xmm3, %rax
; AVX512-NEXT: orq %rcx, %rax
; AVX512-NEXT: vmovq %xmm0, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vpextrq $1, %xmm1, %rax
; AVX512-NEXT: vpextrq $1, %xmm2, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: vpextrq $1, %xmm3, %rax
; AVX512-NEXT: orq %rdx, %rax
; AVX512-NEXT: vpextrq $1, %xmm0, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: orq %rcx, %rdx
; AVX512-NEXT: je .LBB2_2
; AVX512-NEXT: # %bb.1: # %if-true-block
; AVX512-NEXT: xorl %eax, %eax
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
; AVX512-NEXT: .LBB2_2: # %endif-block
; AVX512-NEXT: movl $1, %eax
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
entry:
%0 = bitcast <16 x i32> %input to i512
%1 = icmp ne i512 %0, 0
@ -160,14 +191,39 @@ define i32 @vectest512(<16 x i32> %input) {
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
; AVX-LABEL: vectest512:
; AVX: # %bb.0:
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: setne %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
; AVX1-LABEL: vectest512:
; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: xorl %eax, %eax
; AVX1-NEXT: vptest %ymm0, %ymm0
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX512-LABEL: vectest512:
; AVX512: # %bb.0:
; AVX512-NEXT: vextracti32x4 $3, %zmm0, %xmm1
; AVX512-NEXT: vmovq %xmm1, %rax
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm2
; AVX512-NEXT: vmovq %xmm2, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm3
; AVX512-NEXT: vmovq %xmm3, %rax
; AVX512-NEXT: orq %rcx, %rax
; AVX512-NEXT: vmovq %xmm0, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vpextrq $1, %xmm1, %rax
; AVX512-NEXT: vpextrq $1, %xmm2, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: vpextrq $1, %xmm3, %rax
; AVX512-NEXT: orq %rdx, %rax
; AVX512-NEXT: vpextrq $1, %xmm0, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: xorl %eax, %eax
; AVX512-NEXT: orq %rcx, %rdx
; AVX512-NEXT: setne %al
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%t0 = bitcast <16 x i32> %input to i512
%t1 = icmp ne i512 %t0, 0
%t2 = zext i1 %t1 to i32
@ -227,14 +283,39 @@ define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
; SSE41-NEXT: movl %edi, %eax
; SSE41-NEXT: retq
;
; AVX-LABEL: vecsel512:
; AVX: # %bb.0:
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: cmovel %esi, %edi
; AVX-NEXT: movl %edi, %eax
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
; AVX1-LABEL: vecsel512:
; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vptest %ymm0, %ymm0
; AVX1-NEXT: cmovel %esi, %edi
; AVX1-NEXT: movl %edi, %eax
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX512-LABEL: vecsel512:
; AVX512: # %bb.0:
; AVX512-NEXT: vextracti32x4 $3, %zmm0, %xmm1
; AVX512-NEXT: vmovq %xmm1, %rax
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm2
; AVX512-NEXT: vmovq %xmm2, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm3
; AVX512-NEXT: vmovq %xmm3, %rax
; AVX512-NEXT: orq %rcx, %rax
; AVX512-NEXT: vmovq %xmm0, %rcx
; AVX512-NEXT: orq %rax, %rcx
; AVX512-NEXT: vpextrq $1, %xmm1, %rax
; AVX512-NEXT: vpextrq $1, %xmm2, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: vpextrq $1, %xmm3, %rax
; AVX512-NEXT: orq %rdx, %rax
; AVX512-NEXT: vpextrq $1, %xmm0, %rdx
; AVX512-NEXT: orq %rax, %rdx
; AVX512-NEXT: orq %rcx, %rdx
; AVX512-NEXT: cmovel %esi, %edi
; AVX512-NEXT: movl %edi, %eax
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%t0 = bitcast <16 x i32> %input to i512
%t1 = icmp ne i512 %t0, 0
%t2 = select i1 %t1, i32 %a, i32 %b