377350 Commits

Author SHA1 Message Date
Arjun P
fa9851ebfe [MLIR] NFC: simplify PresburgerSet::isEqual
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94918
2021-01-18 22:47:25 +05:30
David Green
e7dc083a41 [ARM] Don't handle low overhead branches in AnalyzeBranch
It turns our that the BranchFolder and IfCvt does not like unanalyzable
branches that fall-through. This means that removing the unconditional
branches from the end of tail predicated instruction can run into
asserts and verifier issues.

This effectively reverts 372eb2bbb6fb903ce76266e659dfefbaee67722b, but
adds handling to t2DoLoopEndDec which are not branches, so can be safely
skipped.
2021-01-18 17:16:07 +00:00
Xun Li
1d04dc52dd [Coroutine] Do not CoroElide if there are musttail calls
This is to address https://bugs.llvm.org/show_bug.cgi?id=48626.
When there are musttail calls that use parameters aliasing the newly created coroutine frame, the existing implementation will fatal.
We simply cannot perform CoroElide in such cases. In theory a precise analysis can be done to check whether the parameters of the musttail call
actually alias the frame, but it's very hard to do it before the transformation happens. Also in most cases the existence of musttail call is
generated due to symmetric transfers, and in those cases alias analysis won't be able to tell that they don't alias anyway.

Differential Revision: https://reviews.llvm.org/D94834
2021-01-18 09:06:21 -08:00
Utkarsh Saxena
275716d6db [clangd] Derive new signals in CC from ASTSignals.
This patch only introduces new signals but does not use their value
in scoring a CC candidate. Usage of these signals in CC ranking in both
heiristics and ML model will be introduced in later patches.

Differential Revision: https://reviews.llvm.org/D94473
2021-01-18 17:37:27 +01:00
David Green
69295815ed [ARM] Update test target triple. NFC 2021-01-18 16:36:00 +00:00
Arjun P
9f32f1d6fb [MLIR] Support checking if two FlatAffineConstraints are equal
This patch adds support for checking if two PresburgerSets are equal. In particular, one can check if two FlatAffineConstraints are equal by constructing PrebsurgerSets from them and comparing these.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94915
2021-01-18 21:46:01 +05:30
Nicholas Guy
16bf02c3a1 Reland "[AArch64] Attempt to sink mul operands""
This relands dda60035e9f0769c8907cdf6561489e0435c2275,
which was reverted by dbaa6a1858a42f72b683f700d3bd7a9632f7a518
2021-01-18 16:00:22 +00:00
Nicholas Guy
f5fcbe4e3c [AArch64] Further restricts when a dup(*ext) can be rearranged
In most cases, the dup(*ext) pattern can be rearranged to perform
the extension on the vector side, allowing for further vector-specific
optimisations to be made. However the initial checks for this conversion
were insufficient, allowing invalid encodings to be attempted (causing
compilation to fail).

Differential Revision: https://reviews.llvm.org/D94778
2021-01-18 16:00:21 +00:00
Andy Wingo
d806618636 [WebAssembly] MC layer writes table symbols to object files
Now that the linker handles table symbols, we can allow the frontend to
produce them.

Depends on D91870.

Differential Revision: https://reviews.llvm.org/D92215
2021-01-18 16:57:18 +01:00
Andy Wingo
6339382807 [WebAssembly] Add support for table linking to wasm-ld
This patch adds support to wasm-ld for linking multiple table references
together, in a manner similar to wasm globals. The indirect function
table is synthesized as needed.

To manage the transitional period in which the compiler doesn't yet
produce TABLE_NUMBER relocations and doesn't residualize table symbols,
the linker will detect object files which have table imports or
definitions, but no table symbols. In that case it will synthesize
symbols for the defined and imported tables.

As a change, relocatable objects are now written with table symbols,
which can cause symbol renumbering in some of the tests. If no object
file requires an indirect function table, none will be written to the
file. Note that for legacy ObjFile inputs, this test is conservative: as
we don't have relocs for each use of the indirecy function table, we
just assume that any incoming indirect function table should be
propagated to the output.

Differential Revision: https://reviews.llvm.org/D91870
2021-01-18 16:57:18 +01:00
Simon Pilgrim
ce06475da9 [X86][AVX] IsElementEquivalent - add matchShuffleWithUNPCK + VBROADCAST/VBROADCAST_LOAD handling
Specify LHS/RHS operands in matchShuffleWithUNPCK's calls to isTargetShuffleEquivalent, and handle VBROADCAST/VBROADCAST_LOAD matching in IsElementEquivalent
2021-01-18 15:55:00 +00:00
Dmitry Preobrazhensky
30b8f55378 Fix for sanitizer issue in 55c557a 2021-01-18 18:39:55 +03:00
Florian Hahn
34a2c138c8
[LoopRotate] Precommit test for prepare-for-lto handling.
Precommit test for D94232.
2021-01-18 15:24:18 +00:00
Dmitry Preobrazhensky
55c557a5d2 [AMDGPU][MC] Refactored parsing of dpp ctrl
Summary of changes:
- simplified code to improve maintainability;
- replaced lex() with higher level parser functions;
- improved errors handling.

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D94777
2021-01-18 18:14:19 +03:00
Sanjay Patel
3dbbadb8ef [SLP] rename reduction query for min/max ops; NFC
This will avoid confusion once we start matching
min/max intrinsics. All of these hacks to accomodate
cmp+sel idioms should disappear once we canonicalize
to min/max intrinsics.
2021-01-18 09:32:57 -05:00
Sanjay Patel
d1c4e859ce [SLP] reduce opcode API dependency in reduction cost calc; NFC
The icmp opcode is now hard-coded in the cost model call.
This will make it easier to eventually remove all opcode
queries for min/max patterns as we transition to intrinsics.
2021-01-18 09:32:57 -05:00
Djordje Todorovic
2040c1110b [CSInfo][MIPS] Update CSInfo in delay slot filler
In MipsDelaySlotFiller, when replacing old call-branch with
the compact branch instruction, an assertion is caused by erasing
the old call with unhandled CSInfo.
The problem was reported in PR48695.
This patch fixes it, by moving call site info from the old call
instruction to its replace.
​
Patch by Nikola Tesic
​
Differential revision: https://reviews.llvm.org/D94685
2021-01-18 15:29:59 +01:00
Sean Fertile
ead71a23ed [PowerPC][AIX]Do not emit xxspltd mnemonic on AIX.
A bug in the system assembler can assemble the xxspltd extended
menemonic into the wrong instruction (extracting the wrong element).
Emit the full xxpermdi with all operands to work around the problem.

Differential Revision: https://reviews.llvm.org/D94419
2021-01-18 09:25:31 -05:00
Florian Hahn
e6d758de82
[InferAttrs] Mark some library functions as willreturn.
This patch marks some library functions as willreturn. On the first pass, I
excluded most functions that interact with streams/the filesystem.

Along with willreturn, it also adds nounwind to a set of math functions.
There probably are a few additional attributes we can add for those, but
that should be done separately.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94684
2021-01-18 13:40:21 +00:00
Caroline Concatto
36710c38c1 [NFC]Migrate VectorCombine.cpp to use InstructionCost
This patch changes these functions:
vectorizeLoadInsert
isExtractExtractCheap
foldExtractedCmps
scalarizeBinopOrCmp
getShuffleExtract
foldBitcastShuf
to use the class InstructionCost when calling TTI.get<something>Cost().

This patch is part of a series of patches to use InstructionCost instead of
 unsigned/int for the cost model functions.
See this thread for context:
    http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
See this patch for the introduction of the type:
    https://reviews.llvm.org/D91174

ps.:This patch adds the test || !NewCost.isValid(), because we want to
return false when:
 !NewCost.isValid && !OldCost.isValid()->the cost to transform it expensive
and
 !NewCost.isValid() && OldCost.isValid()
Therefore for simplication we only add  test for !NewCost.isValid()

Differential Revision: https://reviews.llvm.org/D94069
2021-01-18 13:37:21 +00:00
Kai Nacke
9399681a57 [Doc] Fix example in codegen doc.
The attributes in the example are placed wrong:
They belong after the type, not after the parameter name.

Reviewed by: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D94683
2021-01-18 08:24:10 -05:00
Denis Antrushin
f7443905af [Statepoint] Handle undef operands in statepoint.
Currently when spilling statepoint register operands in FixupStatepoints
we do not pay attention that it might be `undef`. We just generate a
spill, which may lead to verifier error because we have a use without def.

To handle it, let FixupStateponts ignore `undef` register operands
completely and change them to some constant value when generating
stack map. Use same value as used by ISel for this purpose (0xFEFEFEFE).

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D94703
2021-01-18 15:20:54 +03:00
Abhina Sreeskantharajan
689aaba7ac [SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests
On z/OS, the following error message is not matched correctly in lit tests. This patch updates the CHECK expression to match successfully.
```
EDC5129I No such file or directory.
```

Reviewed By: muiez

Differential Revision: https://reviews.llvm.org/D94239
2021-01-18 07:14:37 -05:00
Dmitry Preobrazhensky
911961c9c1 [AMDGPU][MC][GFX10] Improved dpp8 errors handling
Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D94756
2021-01-18 15:02:31 +03:00
Shilei Tian
9bf843bdc8 Revert "[OpenMP] Added the support for hidden helper task in RTL"
This reverts commit ed939f853da1f2266f00ea087f778fda88848f73.
2021-01-18 06:57:52 -05:00
Florian Hahn
83aa93e995
[VectorUtils] Do not try to add indices matching tombstone/empty values.
Keys matching the tombstone/empty special values cannot be inserted in a
DenseMap. Under some circumstances, LV tries to add members to an
interleave group that match the special values. Skip adding such
members. This is unlikely to have any impact in practice, because
interleave groups with such indices are very likely to not be
vectorized, due to gaps.

This issue has been surfaced by fuzzing, see
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=11638
2021-01-18 11:18:28 +00:00
Tres Popp
3bd24574c7 Revert "[PowerPC] support register pressure reduction in machine combiner."
This reverts commit 26a396c4ef481cb159bba631982841736a125a9c.

See https://reviews.llvm.org/D92071 for a description of the issue.
2021-01-18 12:01:57 +01:00
Vladislav Vinogradov
aca240b4f6 [mlir] Fix cross-compilation (Linalg ODS gen)
Use cross-compilation approach for `mlir-linalg-ods-gen` application
similar to TblGen tools.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94598
2021-01-18 11:57:55 +01:00
Simon Pilgrim
207f32948b [DAG] SimplifyDemandedBits - use KnownBits comparisons to remove ISD::UMIN/UMAX ops
Use the KnownBits icmp comparisons to determine when a ISD::UMIN/UMAX op is unnecessary should either op be known to be ULT/ULE or UGT/UGE than the other.

Differential Revision: https://reviews.llvm.org/D94532
2021-01-18 10:29:23 +00:00
Fraser Cormack
ac603c8d38 [RISCV] Add scalable vector truncate patterns
Original patch by @rogfer01.

This patch supports vector truncates, which on RVV must be done in a
series of instructions truncating by one power-of-two at a time. This is
done through custom-lowering and a custom node to avoid LLVM
re-combining the split TRUNCATE nodes.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Fraser Cormack <fraser@codeplay.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94796
2021-01-18 10:18:43 +00:00
Simon Pilgrim
770d1e0a88 [X86][SSE] isHorizontalBinOp - reuse any existing horizontal ops.
If we already have similar horizontal ops using the same args, then match that, even if we are on a target with slow horizontal ops.
2021-01-18 10:14:45 +00:00
Raphael Isemann
6e75ee6b65 [lldb][docs] Use inline literals for code/paths instead of rendering it with the default role
Right now we're using the 'content' role as default which will just render
these things as cursive (which isn't really useful for code examples). It also
prevents us from assigning a more useful default role in the future.
2021-01-18 11:10:19 +01:00
Björn Schäpers
b43075e34a [clang-format] Fix documentation of bcc1dee600
That was an oversight.

Differential Revision: https://reviews.llvm.org/D93776
2021-01-18 11:03:13 +01:00
Georgii Rymar
b9ce772b8f [Object, llvm-readelf] - Move the API for retrieving symbol versions to ELF.h
`ELFDumper.cpp` implements the functionality that allows to get symbol versions.
It is used for dumping versioned symbols.

This helps to implement https://bugs.llvm.org/show_bug.cgi?id=48670 ("make llvm-nm -D print version names"):
we can move out and reuse the code from `ELFDumper.cpp`.
This is what this patch do: it moves the related functionality to `ELFFile<ELFT>`.

Differential revision: https://reviews.llvm.org/D94771
2021-01-18 12:50:29 +03:00
Raphael Isemann
f446fc5acf [lldb][docs] Resolve the remaining sphinx formatter warnings in the SB API docs
With this patch there should no longer be any warnings when generating the
SB API sphinx docs.
2021-01-18 10:47:19 +01:00
Craig Topper
383b6501ff [RISCV] Use tail agnostic policy for instructions with tied defs if the use operand is IMPLICIT_DEF.
The vcompress intrinsic is defined such that it requires a tail
undisturbed policy. This patch makes it so we can use the tail
agnostic policy if the user has passed vundefined to the dest
operand.

We need to do something similar for masked policy, but we need
annotation of which instructions use the mask policy first.

Not sure if this is sufficient for scheduling or if we'll need to
select different pseudos that don't have a tied def.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D94566
2021-01-17 23:47:58 -08:00
Craig Topper
cfec6cd50c [IR] Allow scalable vectors in structs to support intrinsics returning multiple values.
RISC-V would like to use a struct of scalable vectors to return multiple
values from intrinsics. This woud also be needed for target independent
intrinsics like llvm.sadd.overflow.

This patch removes the existing restriction for this. I've modified
StructType::isSized to consider a struct containing scalable vectors
as unsized so the verifier won't allow loads/stores/allocas of these
structs.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D94142
2021-01-17 23:29:51 -08:00
Björn Schäpers
bcc1dee600 [clang-format] Add StatementAttributeLikeMacros option
This allows to ignore for example Qts emit when
AlignConsecutiveDeclarations is set, otherwise it is parsed as a type
and it results in some misformating:

unsigned char MyChar = 'x';
emit          signal(MyChar);

Differential Revision: https://reviews.llvm.org/D93776
2021-01-18 06:54:31 +01:00
Chen Zheng
26a396c4ef [PowerPC] support register pressure reduction in machine combiner.
Reassociating some patterns to generate more fma instructions to
reduce register pressure.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92071
2021-01-17 23:56:13 -05:00
Lang Hames
e5619065b8 [JITLink][ELF] New ELF skip-debug-sections test requires asserts.
This should fix the failures on Release mode testers.
2021-01-18 15:41:53 +11:00
Philip Reames
8356610f8d [test] pre commit a couple more tests for vectorizing multiple exit loops 2021-01-17 20:29:13 -08:00
Philip Reames
7011086dc1 [test] Autogen a loop vectorizer test to make future changes visible 2021-01-17 20:03:22 -08:00
Qiu Chaofan
f776d8b12f [Legalizer] Promote result type in expanding FP_TO_XINT
This patch promotes result integer type of FP_TO_XINT in expanding.
So crash in conversion from ppc_fp128 to i1 will be fixed.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D92473
2021-01-18 11:56:11 +08:00
Qiu Chaofan
2d9890775f [PowerPC] [NFC] Add AIX triple to some regression tests
As part of the effort to improve AIX support, regression test coverage
misses quite a lot for AIX subtarget. This patch adds AIX triple to
those don't need extra change, and we can cover more cases in following
commits.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94159
2021-01-18 11:44:00 +08:00
Juneyoung Lee
2639c162b7 [InstCombine] more tests for D94861 (NFC) 2021-01-18 11:12:52 +09:00
Lang Hames
a817f46d50 [JITLink][ELF] Skip DWARF sections in ELF objects.
This matches current JITLink/MachO behavior and avoids processing currently
unsupported relocations.
2021-01-18 12:42:48 +11:00
Fangrui Song
b74ae43c44 Makefile.rules: Make HOST_OS/OS simply expanded variable to avoid excess uname -s invocations
This decreases the number of runs from 18 to 1.
2021-01-17 17:19:29 -08:00
Chen Zheng
3bdf4507b6 [NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike.
add one use check to lookThruCopyLike.

The root node is safe to be deleted if we are sure that every
definition in the copy chain only has one use.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92069
2021-01-17 19:56:42 -05:00
Chandler Carruth
f855751c12 Fix openmp CMake build on non-Linux AArch64 systems.
This just checks for `/proc/cpuinfo` existing before reading it.

Tested on an ARM macOS machine.
2021-01-17 16:18:31 -08:00
Fangrui Song
95d146182f Makefile.rules: Delete GCC 4.6 workaround
5.1 is the minimum supported version.
2021-01-17 13:16:38 -08:00