Summary: Clang uses LLVM's integrated assembler by default on most targets, however non-integrated-as mode is default on AIX. Currently integrated-as mode on AIX has passed tests of LLVM test-suite, bootstrap and Spec2017, therefore this patch sets integrated-as as the default assembler mode on AIX.
Reviewed By: DiggerLin
Differential Revision: https://reviews.llvm.org/D150758
[InstCombine] Transform (A > 0) | (A < 0) -> zext (A != 0) fold
This extends **foldCastedBitwiseLogic** to handle the similar cases.
Actually, for `(A > B) | (A < B)`, when B != 0, it can be optimized to `zext( A != B )` by **foldAndOrOfICmpsUsingRanges**.
However, when B = 0, **transformZExtICmp** will transform `zext(A < 0) to i32` into `A << 31`,
which cannot be optimized by **foldAndOrOfICmpsUsingRanges**.
Because I'm new to LLVM and has no concise knowledge about how LLVM decides the order of optimization,
I choose to extend **foldCastedBitwiseLogic** to fold `( A << (X - 1) ) | ((A > 0) zext to iX) -> (A != 0) zext to iX`.
And the equivalent fold follows:
```
A << (X - 1) ) | ((A > 0) zext to iX
-> A < 0 | A > 0
-> (A != 0) zext to iX
```
It's proved by [[https://alive2.llvm.org/ce/z/33HzjE|alive-tv]]
Related issue:
[[https://github.com/llvm/llvm-project/issues/62586 | (a > b) | (a < b) is not simplified only for the case b=0 ]]
Reviewed By: goldstein.w.n
Differential Revision: https://reviews.llvm.org/D154126
1. Improved code that deduces register class from instruction definitions. Previously if some instruction didn't contain a reg class for an operand it was considered as no information on register class even if other instructions specified the class.
2. Added check on required size of resulting register because in some cases classes with smaller registers had been selected (for example VReg_1).
Reviewed By: arsenm, #amdgpu
Differential Revision: https://reviews.llvm.org/D152832
Create a quiet floating-point comparision if function has strictfp attribute.
Avoid unexpected FP exception raised during libcall domain error checking.
It raises an FP exception only in case where an input is a signaling NaN.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D152776
fdr-thread-order.cpp can be very slow when the thread contention is large.
Enable it for AArch64 and x86-64 for now.
fdr-mode.cpp fails on a ppc64le machine. Unsupport it on ppc64le for now.
The remaining modified tests pass on AArch64, ppc64le, and x86-64.
A project that bundles the llvm source code may have their own
PACKAGE_VERSION variable, so only use this to compute the
CLANG_RESOURCE_DIR if CLANG_VERSION_MAJOR is undefined.
Reviewed By: sebastian-ne
Differential Revision: https://reviews.llvm.org/D152608
These are redundant. The same dependencies are being added as part
of the add_llvm_component_library() call. I confirmed this by diff'ing
the build.ninja files before and after the change and saw no change.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D153166
`isPropertyAccessor` depends on the surrounding code and not on the method
itself. That's why it can be different in different modules. And
mismatches shouldn't be an error.
rdar://109481753
Differential Revision: https://reviews.llvm.org/D154460
`isOverriding` depends on the surrounding code and not on the method
itself. That's why it can be different in different modules. And
mismatches shouldn't be an error.
rdar://109481753
Differential Revision: https://reviews.llvm.org/D154459
We don't expect this to be used on RV32 currently so remove it
to reduce number of entries in the isel table.
Teach RegisterInfoEmitter.cpp to allow a type to be missing for
a particular HwMode.
This patch adds the necessary support for the fopen and fclose functions
to work on the GPU via RPC. I added a new test that enables testing this
with the minimal features we have on the GPU. I will update it once we
have `fread` and `fwrite` to actually check the outputted strings. For
now I just relied on checking manually via the outpuot temp file.
Reviewed By: JonChesterfield, sivachandra
Differential Revision: https://reviews.llvm.org/D154519
Another low hanging fruit we can put on the GPU, this ports the tests
over to the hermetic framework so we can run them on the GPU.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D154540
It's time to remove the old plugins as the next-gen has already been set
to default in LLVM 16.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D142820
These plugins are unmaintained and are not in a workable state. The VE
plugin has not been touched for years and has never had any running
tests. The remote plugin is in an unfinished state and is not production
ready upstream. These will need to be ported to the new nextgen
interface in the future if they are needed.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D154548
Section names used in ELF linker scripts can be quoted, but such
quotes must not be propagated to the binary ELF section names. As
such strip the quotes from the section names when processing them, and
also strip them from linker script functions that take section names
as parameters.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D124266
Here's a high level summary of the changes in this patch. For more
information on rational, see the RFC.
(https://discourse.llvm.org/t/rfc-a-unified-lto-bitcode-frontend/61774).
- Add config parameter to LTO backend, specifying which LTO mode is
desired when using unified LTO.
- Add unified LTO flag to the summary index for efficiency. Unified
LTO modules can be detected without parsing the module.
- Make sure that the ModuleID is generated by incorporating more types
of symbols.
Differential Revision: https://reviews.llvm.org/D123803
- add the `from_range_t` constructors and the related deduction guides;
- add the `insert_range`/`assign_range`/etc. member functions.
(Note: this patch is split from https://reviews.llvm.org/D142335)
Differential Revision: https://reviews.llvm.org/D149832
Adding assertions will aid users that have bugs in their code to
receive better error messages.
Differential Revision: https://reviews.llvm.org/D154425
The library expansion has too many paths for all the permutations of
DAZ, unsafe and the 3 exp functions. It's easier to expand it in the
backend when we know all of these things. The library currently misses
the no-infinity check on the overflow, which this handles optimizing
out.
Some of the <3 x half> fast tests regress due to vector widening
dropping flags which will be fixed separately.
Apparently there is no exp10 intrinsic, but there should be. Adds some
deadish code in preparation for adding one while I'm following along
with the current library expansion.
Summary:
Reviewer requested that this routine not be a macro, however that means
that it was not being intitialized as the static initializer was done
before the memcpy from the device. Fix this so we can get timing
information.
A year ago when I was not invested at all into compilers, I found an assertion error when building an AArch64 debug build with LTO + CFI, among other combinations.
It was posted as a github issue here: https://github.com/llvm/llvm-project/issues/54088
I took it upon myself to revisit the issue now that I have spent some more time working on LLVM.
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D151276
These inherited the fast math checks from f32, but the manual suggests
these should be accurate enough for unconditional use. The definition
of correctly rounded is 0.5ulp, but the manual says "0.51ulp". I've
been a bit nervous about changing this as the OpenCL conformance test
does not cover half. Brute force produces identical values compared to
a reference host implementation for all values.
