Commit Graph

16253 Commits

Author SHA1 Message Date
Fangrui Song
f5b42eaadb [ELF] -r --compress-debug-sections: update implicit addends for .rel.debug_* referencing STT_SECTION symbols (#66804)
https://reviews.llvm.org/D48929 updated addends for non-SHF_ALLOC sections
relocated by REL for -r links, but the patch did not update the addends when
--compress-debug-sections={zlib,zstd} is used (#66738).

https://reviews.llvm.org/D116946 handled tombstone values in debug
sections in relocatable links. As a side effect, both
relocateNonAllocForRelocatable (using `sec->relocations`) and
relocatenonNonAlloc (using raw REL/RELA) may run.

Actually, we can adjust the condition in relocatenonAlloc to completely replace
relocateNonAllocForRelocatable. This patch implements this idea and fixes #66738.

As relocateNonAlloc processes the raw relocations like copyRelocations() does,
the condition `if (config->relocatable && type != target.noneRel)` in `copyRelocations`
(commit 08d6a3f133, modified by https://reviews.llvm.org/D62052)
can be made specific to SHF_ALLOC sections.

As a side effect, we can now report diagnostics for PC-relative relocations for
-r. This is a less useful diagnostic that is not worth too much code. As
https://github.com/ClangBuiltLinux/linux/issues/1937 has violations, just
suppress the warning for -r. Tested by commit 561b98f9e0.
2023-09-20 14:50:13 -07:00
Fangrui Song
561b98f9e0 [ELF][test] Improve non-abs-reloc.s to test non-STT_SECTION local symbol 2023-09-20 14:40:32 -07:00
Fangrui Song
0de0b6dded
[ELF] Postpone "unable to move location counter backward" error (#66854)
The size of .ARM.exidx may shrink across `assignAddress` calls. It is
possible
that the initial iteration has a larger location counter, causing
`__code_size =
__code_end - .; osec : { . += __code_size; }` to report an error, while
the error would
have been suppressed for subsequent `assignAddress` iterations.

Other sections like .relr.dyn may change sizes across `assignAddress`
calls as
well. However, their initial size is zero, so it is difficiult to
trigger a
similar error.

Similar to https://reviews.llvm.org/D152170, postpone the error
reporting.
Fix #66836. While here, add more information to the error message.
2023-09-20 09:06:45 -07:00
Fangrui Song
309d1c43bd [ELF][test] Add a test to demonstrate #66836 2023-09-20 09:04:41 -07:00
Fangrui Song
a317afaf00 [ELF][test] Improve -r tests for local symbols 2023-09-19 23:44:55 -07:00
Fangrui Song
678c1f142c [ELF] Remove a R_ARM_PCA special case from relocateNonAlloc
https://reviews.llvm.org/D75042 added a special case about R_ARM_PCA to
relocateNonAlloc. This is untested and actually unused in the wild.
2023-09-19 21:04:50 -07:00
Fangrui Song
a495b2f8cb [ELF][test] Improve tests about non-SHF_ALLOC sections relocated by non-ABS relocations 2023-09-19 21:02:27 -07:00
Haojian Wu
71c83fb8b6 [LLD] Improve the lit tests added by 272bd6f9cc
The `cp` command will copy the permission bits from the original file to
the new one, which will cause permission denied (no written access) for the
following "echo" command in some system.

Switch to use `cat` which is more robust.
2023-09-19 13:47:08 +02:00
Fangrui Song
345f532f3f [ELF][test] Improve relocations referencing STT_SECTION tests for -r
Also add a --compress-debug-sections=zlib test to demonstrate issue #66738
2023-09-18 22:46:56 -07:00
modimo
272bd6f9cc [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Discussion about this approach: https://discourse.llvm.org/t/rfc-safer-whole-program-class-hierarchy-analysis/65144/18

When enabling WPD in an environment where native binaries are present, types we want to optimize can be derived from inside these native files and devirtualizing them can lead to correctness issues. RTTI can be used as a way to determine all such types in native files and exclude them from WPD providing a safe checked way to enable WPD.

The approach is:
1. In the linker, identify if RTTI is available for all native types. If not, under `--lto-validate-all-vtables-have-type-infos` `--lto-whole-program-visibility` is automatically disabled. This is done by examining all .symtab symbols in object files and .dynsym symbols in DSOs for vtable (_ZTV) and typeinfo (_ZTI) symbols and ensuring there's always a match for every vtable symbol.
2. During thinlink, if `--lto-validate-all-vtables-have-type-infos` is set and RTTI is available for all native types, identify all typename (_ZTS) symbols via their corresponding typeinfo (_ZTI) symbols that are used natively or outside of our summary and exclude them from WPD.

Testing:
ninja check-all
large Meta service that uses boost, glog and libstdc++.so runs successfully with WPD via --lto-whole-program-visibility. Previously, native types in boost caused incorrect devirtualization that led to crashes.

Reviewed By: MaskRay, tejohnson

Differential Revision: https://reviews.llvm.org/D155659
2023-09-18 15:51:49 -07:00
Sam Clegg
7bac0bc115
[lld][WebAssembly] Improve error message on adding LTO object post-LTO. NFC (#66688)
We have been getting errors from emscripten users where including the
name of the symbol that triggered the inclusion would be useful in the
diagnosis. e.g:
https://github.com/emscripten-core/emscripten/issues/20275
2023-09-18 14:11:49 -07:00
Fangrui Song
bd288ebf5f [ELF] Make -t work with --format=binary
This is natural and matches GNU ld.
2023-09-16 00:41:23 -07:00
Fangrui Song
71d7e69c56 [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for Hexagon 2023-09-15 23:10:17 -07:00
Fangrui Song
df979228ef [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for AMDGPU 2023-09-15 22:59:08 -07:00
Fangrui Song
0cbe49eade [ELF] Implement getImplicitAddend and enable checkDynamicRelocsDefault for PPC32 2023-09-15 22:49:18 -07:00
Fangrui Song
1b65b159da [ELF] Enable checkDynamicRelocsDefault for PPC64
.plt and .branch_lt have the type of SHT_NOBITS and may be relocated by dynamic
relocations with non-zero addends. They should be skipped for the
--check-dynamic-relocations check, as --apply-dynamic-relocs does not apply.

A side effect is that -z rel does not work for the two sections.

Added two --apply-dynamic-relocs --check-dynamic-relocations tests. Also checked
linking a PPC64 clang.
2023-09-15 22:38:18 -07:00
Fangrui Song
d5682e5777 [ELF] checkDynamicRelocsDefault: invert the condition
Fixes: 64c9dbbf4e
2023-09-15 22:25:09 -07:00
Fangrui Song
64c9dbbf4e [ELF] checkDynamicRelocsDefault: invert the condition
Most targets support --check-dynamic-relocations --apply-dynamic-relocs, so it
makes sense to invert the condition. We want new ports to support
getImplicitAddend.
2023-09-15 21:06:19 -07:00
Fangrui Song
1bd5df7af6 [ELF] Correct a comment about ^=. NFC
GNU ld added ^= support in July 2023.
2023-09-15 17:52:48 -07:00
Fangrui Song
9eb1f2d0ac [ELF] Remove a special case from ExprValue::getSectionOffset. NFC
The special cases added by https://reviews.llvm.org/D42911
(defsym-reserved-syms.s) are unneeded after https://reviews.llvm.org/D66717
2023-09-15 17:45:52 -07:00
Saleem Abdulrasool
401296f697
Object: account for short output names (#66532)
The import library thunk name suffix uses the stem of the file. We
currently would attempt to trim the suffix by dropping the trailing 4
characters (under the assumption that the output name was `.lib`). This
now uses the `llvm::sys::path` API for computing the stem. This avoids
an assertion failure when the name is less the 4 characters and
assertions are enabled.
2023-09-15 12:58:23 -07:00
Aaron Ballman
cf3b12c795 Fix lld Sphinx build
This addresses issues found by:
https://lab.llvm.org/buildbot/#/builders/69/builds/41718
2023-09-15 15:15:52 -04:00
Julien Schueller
715bc51190
[LLD] [MinGW] Ignore --sort-common option (#66336)
like done in the ELF side
this would allow to use archlinux default mingw flags:
`-Wl,-O1,--sort-common,--as-needed -fstack-protector`
(on archlinux packages use the GNU linker by default)
2023-09-15 11:13:27 +03:00
Douglas Yung
72bbac4738 Mark test added in 5a58e98 as requiring ppc, not x86 since it tries to use the powerpc64le target. 2023-09-14 14:47:20 -07:00
Arthur Eubanks
0a1aa6cda2
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::
2023-09-14 14:10:14 -07:00
Fangrui Song
5a58e98c20
[ELF] Align the end of PT_GNU_RELRO associated PT_LOAD to a common-page-size boundary (#66042)
Close #57618: currently we align the end of PT_GNU_RELRO to a
common-page-size
boundary, but do not align the end of the associated PT_LOAD. This is
benign
when runtime_page_size >= common-page-size.

However, when runtime_page_size < common-page-size, it is possible that
`alignUp(end(PT_LOAD), page_size) < alignDown(end(PT_GNU_RELRO),
page_size)`.
In this case, rtld's mprotect call for PT_GNU_RELRO will apply to
unmapped
regions and lead to an error, e.g.

```
error while loading shared libraries: cannot apply additional memory protection after relocation: Cannot allocate memory
```

To fix the issue, add a padding section .relro_padding like mold, which
is contained in the PT_GNU_RELRO segment and the associated PT_LOAD
segment. The section also prevents strip from corrupting PT_LOAD program
headers.

.relro_padding has the largest `sortRank` among RELRO sections.
Therefore, it is naturally placed at the end of `PT_GNU_RELRO` segment
in the absence of `PHDRS`/`SECTIONS` commands.

In the presence of `SECTIONS` commands, we place .relro_padding
immediately before a symbol assignment using DATA_SEGMENT_RELRO_END (see
also https://reviews.llvm.org/D124656), if present.
DATA_SEGMENT_RELRO_END is changed to align to max-page-size instead of
common-page-size.

Some edge cases worth mentioning:

* ppc64-toc-addis-nop.s: when PHDRS is present, do not append
.relro_padding
* avoid-empty-program-headers.s: when the only RELRO section is .tbss,
it is not part of PT_LOAD segment, therefore we do not append
.relro_padding.

---

Close #65002: GNU ld from 2.39 onwards aligns the end of PT_GNU_RELRO to
a
max-page-size boundary (https://sourceware.org/PR28824) so that the last
page is
protected even if runtime_page_size > common-page-size.

In my opinion, losing protection for the last page when the runtime page
size is
larger than common-page-size is not really an issue. Double mapping a
page of up
to max-common-page for the protection could cause undesired VM waste.
Internally
we had users complaining about 2MiB max-page-size applying to shared
objects.

Therefore, the end of .relro_padding is padded to a common-page-size
boundary. Users who are really anxious can set common-page-size to match
their runtime page size.

---

17 tests need updating as there are lots of change detectors.
2023-09-14 10:33:11 -07:00
Fangrui Song
e057d8973c [ELF][PPC64] Use the regular placement for .branch_lt
The currently rule places .branch_lt after .data, which does not make
sense. The original contributor probably wanted to place .branch_lt
before .got/.toc, but failed to notice that .got/.toc are RELRO and
placed earlier.

Remove the special case so that .branch_lt is actually closer to .toc,
alleviating the distance issue.
2023-09-13 19:15:42 -07:00
Fangrui Song
a700ed6909 [ELF][test] Test the order of PPC64 .got, .toc, and .branch_lt 2023-09-13 19:08:22 -07:00
Saiyedul Islam
466a8149b3
Revert "[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)" (#66060)
This reverts commit 0a8d17e79b.
2023-09-12 15:13:59 +05:30
Saiyedul Islam
0a8d17e79b
[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Reviewed By: arsenm, jhuber6

Github PR: #65410

Differential Revision: https://reviews.llvm.org/D129818
2023-09-12 13:53:31 +05:30
Fangrui Song
c5ccae4f18 [ELF][test] Make tests less sensitive of addresses/number of sections 2023-09-11 21:01:36 -07:00
Fangrui Song
d1b418f552 [ELF] Reset two member variables in Ctx::reset
Otherwise they are dangling if lldMain is called more than once.
2023-09-11 13:51:01 -07:00
Vy Nguyen
595cd45a66 [lld-macho][nfc]Add bounds on sections and subsections check before attempting to dereferencing iterators.
Runnign some tests with asan built of LLD would throw errors similar to the following:

AddressSanitizer:DEADLYSIGNAL
    #0 0x55d8e6da5df7 in operator() /mnt/ssd/repo/lld/llvm-project/lld/MachO/Arch/ARM64.cpp:612
    #1 0x55d8e6daa514 in operator() /mnt/ssd/repo/lld/llvm-project/lld/MachO/Arch/ARM64.cpp:650

Differential Revision: https://reviews.llvm.org/D157027
2023-09-11 14:19:25 -04:00
Fangrui Song
65a15a56d5 [ELF] Respect orders of symbol assignments and DEFINED (#65866)
Fix #64600: the currently implementation is minimal (see
https://reviews.llvm.org/D83758), and an assignment like
`__TEXT_REGION_ORIGIN__ = DEFINED(__TEXT_REGION_ORIGIN__) ? __TEXT_REGION_ORIGIN__ : 0;`
(used by avr-ld[1]) leads to a value of zero (default value in `declareSymbol`),
which is unexpected.

Assign orders to symbol assignments and references so that
for a script-defined symbol, the `DEFINED` results match users'
expectation. I am unclear about GNU ld's exact behavior, but this hopefully
matches its behavior in the majority of cases.

[1]: https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=ld/scripttempl/avr.sc
2023-09-11 10:54:49 -07:00
Ellis Hoag
30e688e6d0
[lld][MachO] Add option to suppress mismatch profile errors (#65551)
Both ELF and COFF support `--no-lto-pgo-warn-mismatch` in
https://reviews.llvm.org/D104431 to suppress warnings due to mismatching
profile hashes. As profiles go stale, it becomes likely that some
function's CFGs will change so that their profiles can no longer be
used. This commit adds the linker option `--no-pgo-warn-mismatch` to
suppress these warnings.

Note that we do have the LLVM backend flag `no-pgo-warn-mismatch`
3df1a64eba/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp (L210)

but that is set to true by default during LTO
3df1a64eba/llvm/include/llvm/LTO/Config.h (L76-L77)
2023-09-11 09:13:55 -07:00
Fangrui Song
fcc761bd0e [ELF][test] Make tests less sensitive to addresses/number of sections 2023-09-11 00:26:22 -07:00
Fangrui Song
21ac457f3f [ELF] Priorize the last catch-all pattern in version scripts
When there are multiple catch-all patterns (i.e. a single `*`), GNU ld and gold
select the last pattern. Match their behavior.

This change was inspired by a correction made by Michael Kerrisk to a blog post
I wrote at https://maskray.me/blog/2020-11-26-all-about-symbol-versioning ,
following the current lld rules.

Note: GNU ld prefers global: patterns to local: patterns, which might seem
awkward (https://www.airs.com/blog/archives/300). gold doesn't follow this
behavior, and we do not either.
2023-09-09 23:47:01 -07:00
Job Noorman
649cac3b62 [ELF][RISCV] Implement --emit-relocs with relaxation
Linker relaxation may change relocations (offsets and types). However,
when --emit-relocs is used, relocations are simply copied from the input
section causing a mismatch with the corresponding (relaxed) code
section.

This patch fixes this as follows: for non-relocatable RISC-V binaries,
`InputSection::copyRelocations` reads relocations from the relocated
section's `relocations` array (since this gets updated by the relaxation
code). For all other cases, relocations are read from the input section
directly as before.

In order to reuse as much code as possible, and to keep the diff small,
the original `InputSection::copyRelocations` is changed to accept the
relocations as a range of `Relocation` objects. This means that, in the
general case when reading from the input section, raw relocations need
to be converted to `Relocation`s first, which introduces quite a bit of
boiler plate. It also means there's a slight code size increase due to
the extra instantiations of `copyRelocations` (for both range types).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D159082
2023-09-09 12:06:39 +02:00
Vy Nguyen
84a2155921 [lld-macho]Limit "cannot-export-hidden-symbol" warnings to only 3 to avoid crowding logs.
Details:
We often use wildcard symbols in the exported_symbols list, and sometimes they match autohide symbols, which triggers these "cannot export hidden symbols" warnings that can be a bit noisy.
It'd be more user-friendly if LLD could truncate these.

Differential Revision: https://reviews.llvm.org/D159095
2023-09-07 13:50:55 -04:00
aeubanks
a07d4c0365
[lld/ELF,gold] Remove transitionary opaque pointer flags (#65529)
This was only useful during the transition when mixing
non-opaque-pointer and opaque-pointer IR,
now everything uses opaque pointers.
2023-09-06 15:07:37 -07:00
Daniel Paoliello
f2f36c9b29 Emit line numbers in CodeView for trailing (after ret) blocks from inlined functions
Issue Details:
When building up line information for CodeView debug info, LLVM attempts to gather the "range" of instructions within a function as these are printed together in a single record. If there is an inlined function, then those lines are attributed to the original function to enable generating `S_INLINESITE` records. However, this thus requires there to be instructions from the inlining function after the inlined function otherwise the instruction range would not include the inlined function.

Fix Details:
Include any inlined functions when finding the extent of a function in `getFunctionLineEntries`

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D159226
2023-09-06 10:19:30 -07:00
Teresa Johnson
bbe8cd1333 [LTO] Remove module id from summary index
The module paths string table mapped to both an id sequentially assigned
during LTO linking, and the module hash. The former is leftover from
before the module hash was added for caching and subsequently replaced
use of the module id when renaming promoted symbols (to avoid affects
due to link order changes). The sequentially assigned module id was not
removed, however, as it was still a convenience when serializing to/from
bitcode and assembly.

This patch removes the module id from this table, since it isn't
strictly needed and can lead to confusion on when it is appropriate to
use (e.g. see fix in D156525). It also takes a (likely not significant)
amount of overhead. Where an integer module id is needed (e.g. bitcode
writing), one is assigned on the fly.

There are a couple of test changes since the paths are now sorted
alphanumerically when assigning ids on the fly during assembly writing,
in order to ensure deterministic behavior.

Differential Revision: https://reviews.llvm.org/D156730
2023-09-01 13:43:08 -07:00
Amy Kwan
698b45aa90 [PowerPC][lld] Account for additional X-Forms -> D-Form/DS-Forms load/stores when relaxing initial-exec to local-exec
D153645 added additional X-Form load/stores that can be generated for TLS accesses.
However, these added instructions have not been accounted for in lld. As a result,
lld does not know how to handle them and cannot relax initial-exec to local-exec
when the initial-exec sequence contains these additional load/stores.

This patch aims to resolve https://github.com/llvm/llvm-project/issues/64424.

Differential Revision: https://reviews.llvm.org/D158197
2023-08-31 08:45:10 -05:00
Takuya Shimizu
01b88dd66d [NFC] Remove unused variables declared in conditions
D152495 makes clang warn on unused variables that are declared in conditions like `if (int var = init) {}`
This patch is an NFC fix to suppress the new warning in llvm,clang,lld builds to pass CI in the above patch.

Differential Revision: https://reviews.llvm.org/D158016
2023-08-30 10:05:06 +09:00
Martin Storsjö
0b51e64830 [LLD] [MinGW] Hook up more LTO options
Many of these options can be passed to the linker by the Clang
driver based on other options passed to Clang, after
a23bf1786b. Before commit
5c92c9f34a, these were ignored by
lld, but now we're erroring out on the unrecognized options.

The ELF linker has even more LTO options available, but not
all of these are currently settable via the lld-link option
interface, and some aren't set automatically by Clang but only
if the user manually passes them - and thus probably aren't in
wide use so far. (Previously LLD/MinGW would have accepted them
silently but ignored them though.)

Differential Revision: https://reviews.llvm.org/D158887
2023-08-28 00:28:46 +03:00
Sam Clegg
93adcb770b [lld][WebAssembly] Add --table-base setting
This is similar to `--global-base` but determines where to place the
table segments rather than that data segments.

See https://github.com/emscripten-core/emscripten/issues/20097

Differential Revision: https://reviews.llvm.org/D158892
2023-08-25 16:10:38 -07:00
Martin Storsjö
5c92c9f34a [LLD] [MinGW] Pass LLVM specific LTO options through to lld-link
This is modelled after how the ELF driver does it (see e.g.
https://reviews.llvm.org/D78158 for the source of the ELF
implementation); we need to intercept some options, but ignore GCC
specific ones that GCC passes regardless of whether GCC is using
LTO or not.

This is the second part of the fix for
https://github.com/mstorsjo/llvm-mingw/issues/349.

Differential Revision: https://reviews.llvm.org/D158412
2023-08-24 23:15:26 +03:00
Kazu Hirata
4efd1e0d3a [lld] Do not include StringSwitch.h (NFC) 2023-08-23 09:20:14 -07:00
Kyungwoo Lee
a033184abb [lld-macho] Stricter Bitcode Symbol Resolution
LLD resolves symbols before performing LTO compilation, assuming that the symbols in question are resolved by the resulting object files from LTO. However, there is a scenario where the prevailing symbols might be resolved incorrectly due to specific assembly symbols not appearing in the symbol table of the bitcode. This patch deals with such a scenario by generating an error instead of silently allowing a mis-linkage.
If a prevailing symbol is resolved through post-loaded archives via LC linker options, a warning will now be issued.

Reviewed By: #lld-macho, thevinster

Differential Revision: https://reviews.llvm.org/D158003
2023-08-22 12:03:17 -07:00
Shoaib Meenai
97e39f96c8 [ELF] Add -Bsymbolic-non-weak
This adds a new -Bsymbolic option that directly binds all non-weak
symbols. There's a couple of reasons motivating this:
* The new flag will match the default behavior on Mach-O, so you can get
  consistent behavior across platforms.
* We have use cases for which making weak data preemptible is useful,
  but we don't want to pessimize access to non-weak data. (For a large
  internal app, we measured 2000+ data symbols whose accesses would be
  unnecessarily pessimized by `-Bsymbolic-functions`.)

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D158322
2023-08-21 09:11:51 -07:00