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234 Commits

Author SHA1 Message Date
Evan Cheng
8dc8a8d8af Empty basic block should have an empty range. 
llvm-svn: 49800
 2008-04-16 18:01:08 +00:00
Evan Cheng
499ffa9055 Use of implicit_def is not part of live interval. Create empty intervals for the uses when the live interval is being spilled. 
llvm-svn: 49542
 2008-04-11 17:53:36 +00:00
Evan Cheng
c8eeb752a3 - More aggressively coalescing away copies whose source is defined by an implicit_def. 
- Added insert_subreg coalescing support.

llvm-svn: 49448
 2008-04-09 20:57:25 +00:00
Evan Cheng
20aed56504 - Treat a live range defined by an implicit_def as a zero-sized one. 
- Eliminate an implicit_def when it's being spilled.

llvm-svn: 49166
 2008-04-03 16:39:43 +00:00
Evan Cheng
985a0b51d7 Re-materialization is for uses only. 
llvm-svn: 49053
 2008-04-01 21:37:32 +00:00
Evan Cheng
e4f77c69ac It's not safe to fold a load from GV stub or constantpool into a two-address use. 
llvm-svn: 49002
 2008-03-31 23:19:51 +00:00
Evan Cheng
73d7c3bfba The support for remat of instructions with a register operand is hackish, to say the least. Since the register operand guaranteed to be PIC base and that it is already live at all uses, we are making sure it will not be spilled after its uses are rematerialized for both performance and correctness reasons. 
llvm-svn: 48976
 2008-03-31 07:53:30 +00:00
Evan Cheng
ec7533b620 Remove isImplicitDef TargetInstrDesc flag. 
llvm-svn: 48381
 2008-03-15 00:19:36 +00:00
Evan Cheng
a3891365b5 Transfer physical register spill info when load / store folding happens. 
llvm-svn: 48246
 2008-03-11 21:34:46 +00:00
Evan Cheng
e88a625ecd When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Evan Cheng
6325446666 Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927
 2008-03-05 00:59:57 +00:00
Evan Cheng
6d56368caf Spiller now remove unused spill slots. 
llvm-svn: 47657
 2008-02-27 03:04:06 +00:00
Bill Wendling
d7a258d325 Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Evan Cheng
548677022c All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. 
llvm-svn: 47557
 2008-02-25 19:24:01 +00:00
Evan Cheng
589a9fb6dc Correctly determine whether a argument load can be folded into its uses. 
llvm-svn: 47545
 2008-02-25 08:50:41 +00:00
Evan Cheng
504c645b3e Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
llvm-svn: 47529
 2008-02-23 03:38:34 +00:00
Evan Cheng
379682b0e5 If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. 
llvm-svn: 47526
 2008-02-23 02:14:42 +00:00
Evan Cheng
e70afb021b Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. 
llvm-svn: 47520
 2008-02-23 01:44:27 +00:00
Evan Cheng
4f5cb4cdac Fix spill weight updating bug. 
llvm-svn: 47507
 2008-02-23 00:33:04 +00:00
Evan Cheng
c373911461 Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.

llvm-svn: 47475
 2008-02-22 09:24:50 +00:00
Evan Cheng
911f6bd799 Clean up some spilling code using MachineRegisterInfo. 
llvm-svn: 47416
 2008-02-21 00:34:19 +00:00
Roman Levenstein
0b2c8858df New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan. 
llvm-svn: 47267
 2008-02-18 09:35:30 +00:00
Evan Cheng
2ff2da89ab - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update 
register defs and uses after each successful coalescing.
- Also removed a number of hacks and fixed some subtle kill information bugs.

llvm-svn: 47167
 2008-02-15 18:24:29 +00:00
Evan Cheng
bb4b97f90e Fix a potential serious problem where kills belonging to the val# defined by a two-address instruction is also on the val# that defines the input. 
llvm-svn: 47057
 2008-02-13 09:06:18 +00:00
Dan Gohman
3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Evan Cheng
f2bd1387b0 Forgot these files. 
llvm-svn: 46896
 2008-02-08 22:05:27 +00:00
Owen Anderson
2a8a485630 Move some functionality for adding flags to MachineInstr's into methods on MachineInstr rather than LiveVariables. 
llvm-svn: 46295
 2008-01-24 01:10:07 +00:00
Evan Cheng
f2553ab84f Only remat loads from immutable stack slots. 
llvm-svn: 45831
 2008-01-10 08:24:38 +00:00
Evan Cheng
8b03bafd37 Simplify some code. 
llvm-svn: 45830
 2008-01-10 08:22:10 +00:00
Owen Anderson
d445b8813f Don't use LiveVariables::VarInfo::DefInst. 
llvm-svn: 45815
 2008-01-10 03:12:54 +00:00
Chris Lattner
03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
769c86bf63 simplify some code using new predicates 
llvm-svn: 45689
 2008-01-07 05:40:58 +00:00
Chris Lattner
a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Owen Anderson
0ec92e9d64 Update CodeGen for MRegisterInfo --> TargetInstrInfo changes. 
llvm-svn: 45673
 2008-01-07 01:35:56 +00:00
Chris Lattner
a4ce4f6987 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 
llvm-svn: 45667
 2008-01-06 23:38:27 +00:00
Bill Wendling
0c209430b4 Don't recalculate the loop info and loop dominators analyses if they're 
preserved.

llvm-svn: 45596
 2008-01-04 20:54:55 +00:00
Chris Lattner
a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
6005589faf More cleanups for MachineOperand: 
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
 2007-12-30 21:56:09 +00:00
Chris Lattner
f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
6e68381e02 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Evan Cheng
303417d242 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00
Bill Wendling
3f19dfe794 Reverting 44702. It wasn't correct to rename them. 
llvm-svn: 44727
 2007-12-08 23:58:46 +00:00
Bill Wendling
2b07d8c5a0 Renaming: 
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
 2007-12-08 07:17:56 +00:00
Evan Cheng
8393dc7378 Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta. 
llvm-svn: 44660
 2007-12-06 08:54:31 +00:00
Evan Cheng
7fc1d98353 Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate. 
llvm-svn: 44644
 2007-12-06 00:01:56 +00:00
Evan Cheng
678b86d6ce MachineInstr can change. Store indexes instead. 
llvm-svn: 44612
 2007-12-05 10:24:35 +00:00
Evan Cheng
06353b48b5 If a split live interval is spilled again, remove the kill marker on its last use. 
llvm-svn: 44611
 2007-12-05 09:51:10 +00:00
Evan Cheng
64b3baaaea Clobber more bugs. 
llvm-svn: 44610
 2007-12-05 09:05:34 +00:00
Evan Cheng
d7de56ac93 Fix kill info for split intervals. 
llvm-svn: 44609
 2007-12-05 08:16:32 +00:00