15040 Commits

Author SHA1 Message Date
Bill Wendling
afc1036f3e Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
llvm-svn: 184349
2013-06-19 20:51:24 +00:00
Bill Wendling
0ccf31007f Don't cache the TLI object since we have access to it through TargetMachine already.
llvm-svn: 184346
2013-06-19 20:32:16 +00:00
Quentin Colombet
b51a68681a During SelectionDAG building explicitly set a node to constant zero when the
value is zero.
This allows optmizations to kick in more easily.
Fix some test cases so that they remain meaningful (i.e., not completely dead
coded) when optimizations apply.

<rdar://problem/14096009> superfluous multiply by high part of zero-extended
value.

llvm-svn: 184222
2013-06-18 20:14:39 +00:00
Timur Iskhodzhanov
302ba2314a Hopefully fix the MSVS build after r184105
llvm-svn: 184178
2013-06-18 07:57:22 +00:00
Bill Wendling
bc07a8900c Use pointers to the MCAsmInfo and MCRegInfo.
Someone may want to do something crazy, like replace these objects if they
change or something.

No functionality change intended.

llvm-svn: 184175
2013-06-18 07:20:20 +00:00
Bill Wendling
551a6775db Simplify some of the code. No functionality change.
llvm-svn: 184172
2013-06-18 06:07:26 +00:00
Andrew Trick
5d4861867a MI-Sched: handle ReadAdvance latencies as used by Swift.
llvm-svn: 184135
2013-06-17 21:45:18 +00:00
Andrew Trick
71f08a3e74 Give RegMax higher priority.
llvm-svn: 184133
2013-06-17 21:45:13 +00:00
Andrew Trick
3c3a40e4c6 Remove compareRPDelta.
A complex, expensive heuristic with little value in the current design.

llvm-svn: 184132
2013-06-17 21:45:11 +00:00
Andrew Trick
d31db4b45d MI Sched: fix a typo in RegPressure heuristics.
llvm-svn: 184131
2013-06-17 21:45:09 +00:00
Andrew Trick
7e63046ce9 MI-Sched: Remove another heuristic that is sensitive to queue order.
llvm-svn: 184130
2013-06-17 21:45:07 +00:00
Andrew Trick
d40d0f2c1b MI-Sched: Track multiple candidates with the same priority level.
This eliminates the MultiPressure scheduling "reason". It was
sensitive to queue order. We don't like being sensitive to queue
order.

llvm-svn: 184129
2013-06-17 21:45:05 +00:00
Bill Wendling
626c991ce9 Directly access objects which may change during compilation.
llvm-svn: 184121
2013-06-17 20:41:25 +00:00
Benjamin Kramer
e2a1d89e14 Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.
The main advantages here are way better heuristics, taking into account not
just loop depth but also __builtin_expect and other static heuristics and will
eventually learn how to use profile info. Most of the work in this patch is
pushing the MachineBlockFrequencyInfo analysis into the right places.

This is good for a 5% speedup on zlib's deflate (x86_64), there were some very
unfortunate spilling decisions in its hottest loop in longest_match(). Other
benchmarks I tried were mostly neutral.

This changes register allocation in subtle ways, update the tests for it.
2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction
it looked for was gone already (but the FileCheck pattern picked up unrelated
stuff).

llvm-svn: 184105
2013-06-17 19:00:36 +00:00
David Blaikie
b735b4d6db DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

llvm-svn: 184067
2013-06-16 20:34:27 +00:00
David Blaikie
0252265be0 Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.

Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.

llvm-svn: 184066
2013-06-16 20:34:15 +00:00
David Blaikie
c9380db4ba DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the offset when it's zero
llvm-svn: 184045
2013-06-15 15:52:58 +00:00
Andrew Trick
8e8415f5ab Missing NDEBUGs.
llvm-svn: 184039
2013-06-15 05:46:47 +00:00
Andrew Trick
f78e7fa140 MI-Sched: heuristics using the new latency and machine model.
llvm-svn: 184038
2013-06-15 05:39:19 +00:00
Andrew Trick
de2109eb4c Machine Model: Add MicroOpBufferSize and resource BufferSize.
Replace the ill-defined MinLatency and ILPWindow properties with
with straightforward buffer sizes:
MCSchedMode::MicroOpBufferSize
MCProcResourceDesc::BufferSize

These can be used to more precisely model instruction execution if desired.

Disabled some misched tests temporarily. They'll be reenabled in a few commits.

llvm-svn: 184032
2013-06-15 04:49:57 +00:00
Andrew Trick
e2ff575bb8 MI-Sched: Rename IssueCount to CurrMOps.
"Counts" refer to scaled resource counts within a region. CurrMOps is
simply the number of micro-ops to be issue in the current cycle.

llvm-svn: 184031
2013-06-15 04:49:49 +00:00
Andrew Trick
0cd8afc547 MI-Sched: Remove the temporary EnableCopyConstrain flag.
llvm-svn: 184030
2013-06-15 04:49:46 +00:00
Andrew Trick
f5b8ef2690 MI-Sched: added tracking of dependent latency for better heuristics.
Heuristics compare the critical path in the scheduled code, called
ExpectedLatency, with the latency of instructions remaining to be
scheduled. There are two ways to look at remaining latency:

(1) Dependent latency includes the latency between unscheduled and
scheduled instructions.

(2) Independent latency is simply the height (bottom-up) or depth
(top-down) of instructions currently in the ready Q.

llvm-svn: 184029
2013-06-15 04:49:44 +00:00
Andrew Trick
5580e5ca80 MI-Sched: DEBUG: print critical resource.
llvm-svn: 184028
2013-06-15 04:49:42 +00:00
Stephen Lin
605207fe75 SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks...
This doesn't really effect performance due to all the relevant calls being transparent but is clearer. 

llvm-svn: 184027
2013-06-15 04:03:33 +00:00
David Blaikie
2dbebcfede Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE comments if the display name is empty
llvm-svn: 184026
2013-06-15 00:33:47 +00:00
Matt Arsenault
d2f0332a29 Introduce getSelect usage and use more getSelectCC
llvm-svn: 184012
2013-06-14 22:04:37 +00:00
Stephen Lin
4e69d01b67 SelectionDAG: minor fix to order of operands in comments to match the code
llvm-svn: 184008
2013-06-14 21:33:58 +00:00
Tim Northover
059cead5ed Mark rematerialized super/sub registers as dead.
When we're rematerializing into a not-quite-right register we already add the
real definition as an imp-def, but we should also be marking the "official"
register as dead, since nothing else is going to use it as a result of this
remat.

Not doing this can affect pressure tracking.

rdar://problem/14158833

llvm-svn: 184002
2013-06-14 20:22:21 +00:00
Stephen Lin
e31f2d2d54 SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FMUL combinations; also improve accuracy of comments
llvm-svn: 183993
2013-06-14 18:17:35 +00:00
Derek Schuff
1804b5795a Make PrologEpilogInserter save/restore all callee saved registers
in functions which call __builtin_unwind_init()

__builtin_unwind_init() is an undocumented gcc intrinsic which has this effect,
and is used in libgcc_eh.

Goes part of the way toward fixing PR8541.

llvm-svn: 183984
2013-06-14 16:15:29 +00:00
Jakub Staszak
80df8b837f Move #include from .h to .cpp file.
llvm-svn: 183960
2013-06-14 00:00:13 +00:00
Dan Gohman
6a0c9ae4f9 Print ConstantPool entries initialized to Values with WriteAsOperand instead of
operator<< so that functions are printed as just their name instead of as their
entire definition, which is excessively verbose in this context.

llvm-svn: 183871
2013-06-12 22:19:19 +00:00
Eric Christopher
773c155c15 Formatting.
llvm-svn: 183807
2013-06-11 23:41:38 +00:00
Eric Christopher
a2f806fd20 Remove a few fixmes, the only work we're doing is getting the string
to return and this is done all over.

llvm-svn: 183704
2013-06-10 22:24:10 +00:00
Eric Christopher
2280c5baa6 Fix up comment.
llvm-svn: 183703
2013-06-10 22:24:07 +00:00
Eric Christopher
8c47bb1a02 Remove unused function.
llvm-svn: 183698
2013-06-10 21:59:28 +00:00
Eric Christopher
b7e3b42c01 IndentCount is only used within NDEBUG code.
llvm-svn: 183695
2013-06-10 20:58:53 +00:00
David Majnemer
0fc8670cb0 TargetLowering: Clean up method description comments
llvm-svn: 183623
2013-06-08 23:51:45 +00:00
Quentin Colombet
249cb6756c Reapply r183552. This time, use a standard type for the option to avoid template
instantiation issue with non-standard type.

Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>.

llvm-svn: 183595
2013-06-08 00:07:54 +00:00
Quentin Colombet
bd5a201c85 Revert commits related to stack warning.
llvm-svn: 183579
2013-06-07 22:14:50 +00:00
Quentin Colombet
6baf581b93 Add a backend option to warn on a given stack size limit.
Option: -mllvm -warn-stack-size=<limit>
Output (if limit is exceeded):
warning: Stack size limit exceeded (<actual size>) in <functionName>.

The longer term plan is to hook that to a clang warning.
PR:4072
<rdar://problem/13987214>

llvm-svn: 183552
2013-06-07 20:18:12 +00:00
Quentin Colombet
ba366011c8 Teach AsmPrinter how to print odd constants.
Fix an assertion when the compiler encounters big constants whose bit width is
not a multiple of 64-bits.
Although clang would never generate something like this, the backend should be
able to handle any legal IR.

<rdar://problem/13363576>

llvm-svn: 183544
2013-06-07 18:36:03 +00:00
Rafael Espindola
aad6c24422 Support OpenBSD's native frame protection conventions.
OpenBSD's stack smashing protection differs slightly from other
platforms:

  1. The smash handler function is "__stack_smash_handler(const char
     *funcname)" instead of "__stack_chk_fail(void)".

  2. There's a hidden "long __guard_local" object that gets linked
     into each executable and DSO.

Patch by Matthew Dempsky.

llvm-svn: 183533
2013-06-07 16:35:57 +00:00
Duncan Sands
e0a607e376 Correct wrong register in this example, pointed out by Baoshan Pang.
llvm-svn: 183495
2013-06-07 08:30:55 +00:00
David Blaikie
b272a75328 Fix break in r183446 - helps to increment the iterator in a loop
llvm-svn: 183454
2013-06-06 22:28:26 +00:00
David Blaikie
36d5d2f08d Debug Info: simplify parameter ordering preservation
Seems we emit the parameter ordering number (spuriously named 'arg
number') in the debug info, so there's no need to search through the
variable list to figure out the parameter ordering. This implementation
does 'always' do the work, even in non-optimized debug info (the
previous implementation checked the existence of the 'variables' list on
the subprogram which is only present in optimized builds).

No intended functionality change.

llvm-svn: 183446
2013-06-06 21:04:51 +00:00
Bill Wendling
f77190855d Cache the TargetLowering info object as a pointer.
Caching it as a pointer allows us to reset it if the TargetMachine object
changes.

llvm-svn: 183361
2013-06-06 00:43:09 +00:00
Bill Wendling
8db01cb262 Don't cache the TargetLoweringInfo object inside of the FunctionLowering object.
The TargetLoweringInfo object is owned by the TargetMachine. In the future, the
TargetMachine object may change, which may also change the TargetLoweringInfo
object.

llvm-svn: 183356
2013-06-06 00:11:39 +00:00
Bill Wendling
6fd15ca02e Add space to assert message.
llvm-svn: 183346
2013-06-05 23:13:26 +00:00