Commit Graph

379587 Commits

Author SHA1 Message Date
Valeriy Savchenko
d1522d349f [-Wcompletion-handler] Support checks with builtins
It is very common to check callbacks and completion handlers for null.
This patch supports such checks using built-in functions:
  * __builtin_expect
  * __builtin_expect_with_probablity
  * __builtin_unpredictable

rdar://73455388

Differential Revision: https://reviews.llvm.org/D96268
2021-02-09 11:32:24 +03:00
Hongtao Yu
5b8db127a3 [ELF] Rewriting the path of sample profile file for --reproduce response.txt
Rewritting the path of the sample profile file in response.txt to be relative to the repro tar.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D96193
2021-02-09 00:00:16 -08:00
Chuanqi Xu
88d7876e1e [NFC] [Coroutine] Remove Unused Variables 2021-02-09 15:55:06 +08:00
Hsiangkai Wang
a2d19bad07 [RISCV] Use whole register load/store for generic load/store.
In vector v0.10, there are whole vector register load/store
instructions. I suggest to use the whole register load/store
instructions for generic load/store for scalable vector types. It could
save up vset{i}vl{i} for these load/store.

For fractional LMUL, I keep to use vle{eew}.v/vse{eew}.v instructions to
load/store partial vector registers.

Differential Revision: https://reviews.llvm.org/D95853
2021-02-09 15:52:04 +08:00
Zakk Chen
1473b00cf8 [Docs] Fix Typo 2021-02-08 23:45:32 -08:00
Matthias Springer
b6910fd31d [MLIR][AVX512] Add integration test for vp2intersect
Differential Revision: https://reviews.llvm.org/D96306
2021-02-09 16:43:37 +09:00
Fangrui Song
b799289911 [test] Drop redundant REQUIRES: x86-registered-target 2021-02-08 23:36:37 -08:00
Fangrui Song
b48aea43d0 [test] Add REQUIRES: x86-registered-target to DebugInfo/Symbolize/ELF llvm-mc tests 2021-02-08 23:34:41 -08:00
Douglas Yung
4c23e42fe5 Mark 4 tests added in 6d766c8bf9 as requiring an x86 backend as they fail when it is not present.
This should fix buildbot failures like http://lab.llvm.org:8011/#/builders/107/builds/4469
2021-02-08 22:47:14 -08:00
Kazu Hirata
302313a264 [Transforms] Use range-based for loops (NFC) 2021-02-08 22:33:53 -08:00
Kazu Hirata
94c350847a [TableGen] Use ListSeparator (NFC) 2021-02-08 22:33:51 -08:00
Kazu Hirata
de6c49ae31 [Transforms/Utils] Drop unnecessary const from a return type (NFC)
Identified with const-return-type.
2021-02-08 22:33:49 -08:00
Max Kazantsev
69653d44de Return "[Test] Add failing test for PR49087"
Another attempt, this time with tripple fix.
2021-02-09 11:36:13 +07:00
George
8f130f108f [MLIR] Add C API for navigating up the IR tree
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96301
2021-02-08 19:54:38 -08:00
Sam Clegg
88e4056b44 [lld][WebAssembly] Fix typo in function name
addOptionalGlobalSymbols should be addOptionalGlobalSymbol.

Also, remove unnecessary additional argument to make the signature match
the sibling function: addOptionalDataSymbol.

Differential Revision: https://reviews.llvm.org/D96305
2021-02-08 19:41:01 -08:00
Yaxun (Sam) Liu
98c21289f1 [CUDA][HIP] Add -fuse-cuid
This patch added a distinct CUID for each input file, which is represented by InputAction.
clang initially creates an InputAction for each input file for the host compilation. In CUDA/HIP action
builder, each InputAction is given a CUID and cloned for each GPU arch, and the CUID is also cloned. In this way,
we guarantee the corresponding device and host compilation for the same file shared the
same CUID. On the other hand, different compilation units have different CUID.

-fuse-cuid=random|hash|none is added to control the method to generate CUID. The default
is hash. -cuid=X is also added to specify CUID explicitly, which overrides -fuse-cuid.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D95007
2021-02-08 22:26:12 -05:00
Dave Lee
7dc324aafa [lldb] Fix crash in FormatEntity for mangled-name
Check a `Block` pointer before dereferencing.

Using `function.mangled-name` led to a crash for a frame where the symbol
context had no block info. In my case, the frame's function was a system frame.

Differential Revision: https://reviews.llvm.org/D96307
2021-02-08 18:38:08 -08:00
Jinsong Ji
9202806241 Revert "[CostModel] Remove VF from IntrinsicCostAttributes"
This reverts commit 502a67dd7f.

This expose a failure in test-suite build on PowerPC,
revert to unblock buildbot first,
Dave will re-commit in https://reviews.llvm.org/D96287.

Thanks Dave.
2021-02-09 02:14:14 +00:00
Richard Smith
21e8bb8325 PR48606: The lifetime of a constexpr heap allocation always started
during the same evaluation.

It looks like the only case for which this matters is determining
whether mutable subobjects of a heap allocation can be modified during
constant evaluation.
2021-02-08 17:58:05 -08:00
Richard Smith
c945dc4a50 PR48587: is_constant_evaluated() should not evaluate to true during a
variable's destruction if it didn't do so during construction.

The standard doesn't give any guidance as to what to do here, but this
approach seems reasonable and conservative, and has been proposed to the
standard committee.
2021-02-08 17:34:40 -08:00
Fangrui Song
3e837e1735 [llvm-objcopy][test] Stablize build-id-link-dir.test 2021-02-08 17:22:22 -08:00
LLVM GN Syncbot
71a79e7b4b [gn build] Port 87104faac4 2021-02-09 01:14:44 +00:00
Greg McGary
87104faac4 [lld-macho] Add ARM64 target arch
This is an initial base commit for ARM64 target arch support. I don't represent that it complete or bug-free, but wish to put it out for review now that some basic things like branch target & load/store address relocs are working.

I can add more tests to this base commit, or add them in follow-up commits.

It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated.

Differential Revision: https://reviews.llvm.org/D88629
2021-02-08 18:14:07 -07:00
Sam Clegg
01a48535c3 [MC][WebAssembly] Fix provisional values for data alias relocations
When calculating the symbol offsets to write as provisitonal values
in object files we are only interested in the offset of the symbol
itself.  For aliases this offset already includes the offset of the
base symbol.

The testin question was added back in https://reviews.llvm.org/D87407
but I believe the expectations here were incorrect.   sym_a lives
at offset 4 and sym_b lives 4 bytes into that (should be 8).

The addresses of the 3 symbosl in this object file are:

foo  : 0
sym_a: 4
sym_b: 8

Differential Revision: https://reviews.llvm.org/D96234
2021-02-08 16:56:57 -08:00
Craig Topper
622611f7e5 [TableGen] Use return value from EmitVBRValue instead of calling GetVBRSize on the same value. Consistently use unsigned for child sizes. NFCI
getSize and setSize both use unsigned. So size_t doesn't
increase range here and might get truncated if passed to
setSize.

Also not sure why EmitVBRValue was returning uint64_t, but used
an unsigned to supply the value.
2021-02-08 16:34:35 -08:00
Uday Bondhugula
333d2cfc70 [MLIR][NFC] Fix std.copysign op documentation
Fix std.copysign op documentation. NFC.

Differential Revision: https://reviews.llvm.org/D96217
2021-02-09 05:59:05 +05:30
Yaxun (Sam) Liu
52f312c69e Fix failure in cuda-external-tools.cu
-fgpu-rdc is output in different order
2021-02-08 19:27:43 -05:00
LemonBoy
45e33e8ba9 [SPARC] Recognize and handle the %lm(sym) operator
Reviewed By: joerg

Differential Revision: https://reviews.llvm.org/D77737
2021-02-08 19:25:33 -05:00
Jameson Nash
10c1d290d9 Revert "Renovate CMake files in the llvm-exegesis tool."
This reverts commit 549a1e2e59.

I see some buildbot failures, so reverting while I look into them.
2021-02-08 19:12:08 -05:00
Argyrios Kyrtzidis
a8cb39bab0 Make sure a module file with errors produced via '-fallow-pcm-with-compiler-errors' can be loaded when using implicit modules
A module with errors would be marked as out-of-date, then the `compilerModule` action would produce it, but due to the error it would be treated as failure and the resulting PCM would not get used.

rdar://74087062

Differential Revision: https://reviews.llvm.org/D96246
2021-02-08 16:10:39 -08:00
Yaxun (Sam) Liu
1dab94f9ed [CUDA][HIP] Pass -fgpu-rdc to host clang -cc1
Currently -fgpu-rdc is not passed to host clang -cc1.
This causes issue because -fgpu-rdc affects shadow
variable linkage in host compilation.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D96105
2021-02-08 19:08:20 -05:00
Eric Schweitz
2cd0a113df [flang][fir] Add OpaqueAttr.
Add the opaque attribute class used in flang.

https://github.com/flang-compiler/f18-llvm-project/pull/402

Differential Revision: https://reviews.llvm.org/D96293
2021-02-08 16:02:22 -08:00
Jameson Nash
16e7973c5d Renovate CMake file for the llvm-cfi-verify tool
Hopefully this is the non-problematic part from https://reviews.llvm.org/rL342148, which later got reverted in r342336 (b09a8c9bd9) due to problems with the llvm-exegesis part of the change. That part would also still be desirable, but currently appears not to be possible (https://reviews.llvm.org/D81922).

I think this should replace https://reviews.llvm.org/D44650, per Keno's comment there.

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D90969
2021-02-08 18:20:38 -05:00
Jameson Nash
549a1e2e59 Renovate CMake files in the llvm-exegesis tool.
This attempts to move all tools over to using `add_llvm_library` for
better consistency. After doing this, I noticed it ended up as nearly a
reimplementation of https://reviews.llvm.org/rL342148, which later got
reverted in r342336 (b09a8c9bd9).

With ccache and ninja on a large core machine (40), I haven't run into
build errors, so I'm hopeful it's better now, though it doesn't seem to
be any different / new.

Reviewed By: stephenneuendorffer

Differential Revision: https://reviews.llvm.org/D90970
2021-02-08 18:06:07 -05:00
Hsiangkai Wang
a5b07a221a [RISCV] Initial support of LoopVectorizer for RISC-V Vector.
Define an option -riscv-vector-bits-max to specify the maximum vector
bits for vectorizer. Loop vectorizer will use the value to check if it
is safe to use the whole vector registers to vectorize the loop.

It is not the optimum solution for loop vectorizing for scalable vector.
It assumed the whole vector registers will be used to vectorize the code.
If it is possible, we should configure vl to do vectorize instead of
using whole vector registers.

We only consider LMUL = 1 in this patch.

This patch just an initial work for loop vectorizer for RISC-V Vector.

Differential Revision: https://reviews.llvm.org/D95659
2021-02-09 06:32:18 +08:00
Matt Arsenault
87e280110d GlobalISel: Use correct calling convention in handleAssignments
This was using the calling convention of the calling function, not the
callee. Avoids regressions in a future patch.
2021-02-08 17:09:28 -05:00
Matt Arsenault
bcf723b2fd AMDGPU: Stop adding stack passed wide arguments to call conv handler
The generated calling convention code shouldn't see these types since
we split large types into 32-bit chunks before the calling convention
code is triggered.

GlobalISel ends up directly calls the generated CC code before
checking for the register count breakdown. Arguably this difference is
a bug, but this was dead code for the DAG anyway.
2021-02-08 17:09:28 -05:00
Matt Arsenault
e855cc6d04 AMDGPU/GlobalISel: Remove dead check prefixes 2021-02-08 17:09:28 -05:00
Arthur Eubanks
e84a4650eb [NVPTX][NewPM] Re-enable NVVMReflectPass
Disabled alongside NVVMIntrRangePass in https://reviews.llvm.org/D96166,
but turns out NVVMIntrRangePass was the issue.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D96291
2021-02-08 13:58:17 -08:00
Eric Schweitz
e892109c3e [flang][NFC] Add comment. 2021-02-08 13:49:16 -08:00
Fangrui Song
830ead58fe [test] Fix unused check prefixes 2021-02-08 13:44:30 -08:00
Fangrui Song
87dbdd2e3b [FileCheck] Default --allow-unused-prefixes to false
Link: https://lists.llvm.org/pipermail/llvm-dev/2020-October/146162.html "[RFC] FileCheck: (dis)allowing unused prefixes"

If a downstream project using lit needs time for transition,
add the following to `lit.local.cfg`:

```
from lit.llvm.subst import ToolSubst

fc = ToolSubst('FileCheck', unresolved='fatal')
config.substitutions.insert(0, (fc.regex, 'FileCheck --allow-unused-prefixes'))
```

Differential Revision: https://reviews.llvm.org/D95849
2021-02-08 13:37:04 -08:00
Fangrui Song
ad60802a71 [Verifier] Allow DW_TAG_class_type/DW_TAG_union_type to have no filename
`clang/lib/CodeGen/CGOpenMPRuntime.cpp` synthesized union
(`distinct !DICompositeType(tag: DW_TAG_union_type, name: "kmp_cmplrdata_t", size: 64, elements: <0x62b690>)`)
does not have meaningful filename/line number.

D94735 dropped the previously arbitrary and untested filename/line from the union and caused a verifier error here.

This fixes `check-libarcher` failures.

Differential Revision: https://reviews.llvm.org/D96212
2021-02-08 13:31:05 -08:00
David Green
0c7e044a7f [ARM] One-off identity shuffle
A One-Off Identity mask is a shuffle that is mostly an identity mask
from as single source but contains a single element out-of-place, either
from a different vector or from another position in the same vector. As
opposed to lowering this via a ARMISD::BUILD_VECTOR we can generate an
extract/insert pair directly. Under ARM with individually accessible
lane elements this often becomes a simple lane move.

This also alters the LowerVECTOR_SHUFFLEUsingMovs code to use v4f32 (not
v4i32), a more natural type for lane moves.

Differential Revision: https://reviews.llvm.org/D95551
2021-02-08 21:24:32 +00:00
Arthur Eubanks
0eda454796 [SimpleLoopUnswitch] Don't non-trivially unswitch loops that are unsafe to clone
Non-trivial unswitching can clone loops.

The legacy -loop-unswitch pass also checks for this.

Fixes PR49085.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D96288
2021-02-08 13:19:24 -08:00
Nico Weber
69f5bd2ec5 [gn build] reformat all gn files
$ git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
2021-02-08 16:11:01 -05:00
Markus Böck
99dfcfd14c [CMake] [MinGW] Enable use of LLVM_USE_SANITIZER in a MinGW environment
Currently using LLVM_USE_SANITIZER with a MinGW target leads to a fatal
configuration error due to an unsupported platform. MinGW targets on
clang however implement a few sanitizers, currently ASAN and UBSAN.

This patch enables LLVM_USE_SANITIZER in a MinGW environment as well.

Differential Revision: https://reviews.llvm.org/D95750
2021-02-08 23:04:50 +02:00
Amara Emerson
ec41ed5b1b [AArch64][GlobalISel] Support the 'returned' parameter attribute.
On AArch64 (which seems to be the only target that supports it), this
attribute allows codegen to avoid saving/restoring the value in x0
across a call.

Gives a 0.1% geomean -Os code size improvement on CTMark.

Differential Revision: https://reviews.llvm.org/D96099
2021-02-08 12:47:39 -08:00
Nico Weber
3d471d7f06 Revert "[Test] Add failing test for PR49087"
This reverts commit 0fc1738eb7.
The test passes (unexpectedly, due to the XFAIL: *) when x86 isn't
the default triple (such as on an arm machine).
2021-02-08 15:46:29 -05:00
Martin Storsjö
71c29b4cf3 [AArch64] Use '//' as comment string for MSVC assembly
As the actual MSVC toolset doesn't use the GAS-style assembly that
Clang/LLVM produces and consumes, there's no reference for what
string to use for e.g. comments when building with a MSVC triple.

This frees up the use of semicolon as separator string, just like
was done for GNU targets in 2341319564.
(Previously, both the separator and comment strings were set to
the same, a semicolon.)

Compiler-rt extensively uses separator chars in its assembly,
and that assembly should be buildable with clang-cl for MSVC too.

Differential Revision: https://reviews.llvm.org/D96259
2021-02-08 22:30:14 +02:00