Commit Graph

370082 Commits

Author SHA1 Message Date
Teresa Johnson
b67a2aef8a [MemProf] XFAIL test on avr until issue can be debugged
For unknown reasons, this test started failing only on the
llvm-avr-linux bot after 5c20d7db9f:
http://lab.llvm.org:8011/#/builders/112/builds/365

The error message is not helpful, and I have an email out to the bot
owner to help with debugging. XFAIL it on avr for now.
2020-10-23 11:32:11 -07:00
Nikita Popov
1b65a51af8 [BasicAA] Add additional phi cycle test (NFC)
This is a variation of the BatchAA problem that also applies
without BatchAA. We may have a cached result from earlier in
the same query.
2020-10-23 20:31:20 +02:00
Mircea Trofin
819044ad2d [NFC] Use [MC]Register in RegAllocGreedy
This was initiated from the uses of MCRegUnitIterator, so while likely
not exhaustive, it's a step forward.

Differential Revision: https://reviews.llvm.org/D89975
2020-10-23 11:30:53 -07:00
Baptiste Saleil
edb27912a3 [PowerPC] Add intrinsics for MMA
This patch adds support for MMA intrinsics.

Authored by: Baptiste Saleil

Reviewed By: #powerpc, bsaleil, amyk

Differential Revision: https://reviews.llvm.org/D89345
2020-10-23 13:16:02 -05:00
Nikita Popov
dd887d97ce [PhiValues] Use SetVector to avoid non-determinism
I'm not sure whether this can cause actual non-determinism in the
compiler output, but at least it causes non-determinism in the
statistics collected by BasicAA.

Use SetVector to have a predictable iteration order.
2020-10-23 20:14:02 +02:00
Sean Silva
1253c40727 [mlir] Add FuncOp::eraseResults
I just found I needed this in an upcoming patch, and it seems generally
useful to have.

Differential Revision: https://reviews.llvm.org/D90000
2020-10-23 11:03:42 -07:00
Fangrui Song
9267caebfa [ELF] Don't error on R_PPC64_REL24/R_PPC64_REL24_NOTOC referencing __tls_get_addr for missing R_PPC64_TLSGD/R_PPC64_TLSLD
This partially reverts D85994.

In glibc, elf/dl-sym.c calls the raw `__tls_get_addr` by specifying the
tls_index parameter. Such a call does not have a pairing R_PPC64_TLSGD/R_PPC64_TLSLD.
This is legitimate. Since we cannot distinguish the benign case from cases due
to toolchain issues, we have to be permissive.

Acked by Stefan Pintilie
2020-10-23 10:38:07 -07:00
Mircea Trofin
2b8fb5185e [MLInliner] Disable always inliner in bounds tests
That changes the threshold calculation.
2020-10-23 10:24:51 -07:00
Duncan P. N. Exon Smith
5431c37b55 SourceManager: Make LastLineNoContentCache and ContentCache::SourceLineCache mutable, NFC
Avoid some noisy `const_cast`s by making `ContentCache::SourceLineCache`
and `SourceManager::LastLineNoContentCache` both mutable.

Differential Revision: https://reviews.llvm.org/D89914
2020-10-23 13:22:47 -04:00
Amara Emerson
0f0fd383b4 [AArch64][GlobalISel] Introduce a new post-isel optimization pass.
There are two optimizations here:

1. Consider the following code:
 FCMPSrr %0, %1, implicit-def $nzcv
 %sel1:gpr32 = CSELWr %_, %_, 12, implicit $nzcv
 %sub:gpr32 = SUBSWrr %_, %_, implicit-def $nzcv
 FCMPSrr %0, %1, implicit-def $nzcv
 %sel2:gpr32 = CSELWr %_, %_, 12, implicit $nzcv
This kind of code where we have 2 FCMPs each feeding a CSEL can happen
when we have a single IR fcmp being used by two selects. During selection,
to ensure that there can be no clobbering of nzcv between the fcmp and the
csel, we have to generate an fcmp immediately before each csel is
selected.

However, often we can essentially CSE these together later in MachineCSE.
This doesn't work though if there are unrelated flag-setting instructions
in between the two FCMPs. In this case, the SUBS defines NZCV
but it doesn't have any users, being overwritten by the second FCMP.

Our solution here is to try to convert flag setting operations between
a interval of identical FCMPs, so that CSE will be able to eliminate one.

2. SelectionDAG imported patterns for arithmetic ops currently select the
flag-setting ops for CSE reasons, and add the implicit-def $nzcv operand
to those instructions. However if those impdef operands are not marked as
dead, the peephole optimizations are not able to optimize them into non-flag
setting variants. The optimization here is to find these dead imp-defs and
mark them as such.

This pass is only enabled when optimizations are enabled.

Differential Revision: https://reviews.llvm.org/D89415
2020-10-23 10:18:36 -07:00
LLVM GN Syncbot
bf44d3689a [gn build] Port dbbc4f4e22 2020-10-23 17:06:41 +00:00
Artem Belevich
e7fe125b77 [CUDA] Extract CUDA version from cuda.h if version.txt is not found
If CUDA version can not be determined based on version.txt file, attempt to find
CUDA_VERSION macro in cuda.h.

This is a follow-up to D89752,

Differntial Revision: https://reviews.llvm.org/D89832
2020-10-23 10:03:30 -07:00
Artem Belevich
65d206484c [CUDA] Improve clang's ability to detect recent CUDA versions.
CUDA-11.1 does not carry version.txt which causes clang to assume that it's
CUDA-7.0, which used to be the only CUDA version w/o version.txt.

In order to tell CUDA-7.0 apart from the new versions, clang now probes for the
presence of libdevice.10.bc which is not present in the old CUDA versions.

This should keep Clang working for CUDA-11.1.

PR47332: https://bugs.llvm.org/show_bug.cgi?id=47332

Differential Revision: https://reviews.llvm.org/D89752
2020-10-23 10:03:29 -07:00
Jonas Devlieghere
de346cf2ac [lldb] Redesign Target::GetUtilityFunctionForLanguage API
This patch redesigns the Target::GetUtilityFunctionForLanguage API:

 - Use a unique_ptr instead of a raw pointer for the return type.
 - Wrap the result in an llvm::Expected instead of using a Status object as an I/O parameter.
 - Combine the action of "getting" and "installing" the UtilityFunction as they always get called together.
 - Pass std::strings instead of const char* and std::move them where appropriate.

There's more room for improvement but I think this tackles the most
prevalent issues with the current API.

Differential revision: https://reviews.llvm.org/D90011
2020-10-23 10:00:23 -07:00
Alex Orlov
9df832d1c3 These compiler-rt tests should be UNSUPPORTED instead of XFAIL.
These compiler-rt tests should be UNSUPPORTED instead of XFAIL, which seems to be the real intent of the authors.

Reviewed By: vvereschaka

Differential Revision: https://reviews.llvm.org/D89840
2020-10-23 20:57:18 +04:00
Duncan P. N. Exon Smith
dbbc4f4e22 SourceManager: Encapsulate line number mapping into SrcMgr::LineOffsetMapping
Put the guts of `ComputeLineNumbers` into `LineOffsetMapping::get` and
`LineOffsetMapping::LineOffsetMapping`.  As a drive-by, store the number
of lines directly in the bump-ptr-allocated array.

Differential Revision: https://reviews.llvm.org/D89913
2020-10-23 12:55:51 -04:00
Arthur Eubanks
5668eda864 Revert "[CGSCC] Detect devirtualization in more cases"
This reverts commit 3024fe5b55.

Causes major compile time regressions:
https://llvm-compile-time-tracker.com/compare.php?from=3b8d8954bf2c192502d757019b9fe434864068e9&to=3024fe5b55ed72633915f613bd5e2826583c396f&stat=instructions
2020-10-23 09:53:52 -07:00
Alex Orlov
dc98923a8c Added utility to launch tests on a target remotely.
Runs an executable on a remote host.
This is meant to be used as an executor when running the LLVM and the Libraries tests on a target.

Reviewed By: vvereschaka

Differential Revision: https://reviews.llvm.org/D89349
2020-10-23 20:52:30 +04:00
Lang Hames
996a8b42aa Re-apply "[JITLink][ELF] Add support for ELF::R_X86_64_REX_GOTPCRELX relocation"
This re-applies e2fceec2fd with fixes. Apparently we already *do* support
relaxation for ELF, so we need to make sure the test case allocates a slab at
a fixed address, and that the R_X86_64_REX_GOTPCRELX test references an external
that is guaranteed to be out of range.
2020-10-23 09:48:05 -07:00
Huihui Zhang
1e113c078a [AArch64][SVE] Fix umin/umax lowering to handle out of range imm.
Immediate must be in an integer range [0,255] for umin/umax instruction.
Extend pattern matching helper SelectSVEArithImm() to take in value type
bitwidth when checking immediate value is in range or not.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D89831
2020-10-23 09:42:56 -07:00
Duncan P. N. Exon Smith
74a8783480 SourceManager: Clarify that FileInfo always has a ContentCache, NFC
It turns out that `FileInfo` *always* has a ContentCache. Clarify that
in the code:
- Update the private version of `SourceManager::createFileID` to take a
  `ContentCache&` instead of `ContentCache*`, and rename it to
  `createFileIDImpl` for clarity.
- Change `FileInfo::getContentCache` to return a reference.

Differential Revision: https://reviews.llvm.org/D89554
2020-10-23 12:38:53 -04:00
Victor Huang
7a74bb899a [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions
In this patch, Predicates fix added for the following:
* disable prefix-instrs will disable pcrelative-memops
* set two predicates PairedVectorMemops and PrefixInstrs for PLXVP/PSTXVP definitions

Differential Revision: https://reviews.llvm.org/D89727
Reviewed by: amyk, steven.zhang
2020-10-23 11:33:20 -05:00
LLVM GN Syncbot
24a1fe7547 [gn build] Port 00255f4192 2020-10-23 16:19:55 +00:00
vpykhtin
00255f4192 [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse.
I was wrong in thinking that MRI.use_instructions return unique instructions and mislead Jay in his previous patch D64393.

First loop counted more instructions than it was in reality and the second loop went beyond the basic block with that counter.

I used Jay's previous code that relied on MRI.use_operands to constrain the number of instructions to check among.
modifiesRegister is inlined to reduce the number of passes over instruction operands and added assert on BB end boundary.

Differential Revision: https://reviews.llvm.org/D89386
2020-10-23 19:17:48 +03:00
Kadir Cetinkaya
5dd39923a0
[clangd] Fix remote-server build and add it to check-clangd
Differential Revision: https://reviews.llvm.org/D90047
2020-10-23 18:08:02 +02:00
Paulo Matos
69e2797eae [WebAssembly] Implementation of (most) table instructions
Implementation of instructions table.get, table.set, table.grow,
table.size, table.fill, table.copy.

Missing instructions are table.init and elem.drop as they deal with
element sections which are not yet implemented.

Added more tests to tables.s

Differential Revision: https://reviews.llvm.org/D89797
2020-10-23 08:42:54 -07:00
Sourabh Singh Tomar
e7d37742a2 [flang][OpenMP] Upstream lowering of OpenMP Flush construct
Note: This patch reflects the work that can be upstreamed from PR's(merged):

- https://github.com/flang-compiler/f18-llvm-project/pull/476

Reviewed By: kiranchandramohan, clementval

Differential Revision: https://reviews.llvm.org/D90048
2020-10-23 21:09:50 +05:30
Jeremy Morse
b1b2c6ab66 [DebugInstrRef] Handle DBG_INSTR_REFs use-before-defs in LiveDebugValues
Deciding where to place debugging instructions when normal instructions
sink between blocks is difficult -- see PR44117. Dealing with this with
instruction-referencing variable locations is simple: we just tolerate
DBG_INSTR_REFs referring to values that haven't been computed yet. This
patch adds support into InstrRefBasedLDV to record when a variable value
appears in the middle of a block, and should have a DBG_VALUE added when it
appears (a debug use before def).

While described simply, this relies heavily on the value-propagation
algorithm in InstrRefBasedLDV. The implementation doesn't attempt to verify
the location of a value unless something non-trivial occurs to merge
variable values in vlocJoin. This means that a variable with a value that
has no location can retain it across all control flow (including loops).
It's only when another debug instruction specifies a different variable
value that we have to check, and find there's no location.

This property means that if a machine value is defined in a block dominated
by a DBG_INSTR_REF that refers to it, all the successor blocks can
automatically find a location for that value (if it's not clobbered). Thus
in a sense, InstrRefBasedLDV is already supporting and implementing
use-before-defs. This patch allows us to specify a variable location in the
block where it's defined.

When loading live-in variable locations, TransferTracker currently discards
those where it can't find a location for the variable value. However, we
can tell from the machine value number whether the value is defined in this
block. If it is, add it to a set of use-before-def records. Then, once the
relevant instruction has been processed, emit a DBG_VALUE immediately after
it.

Differential Revision: https://reviews.llvm.org/D85775
2020-10-23 16:33:23 +01:00
Jay Foad
958130dfda [AMDGPU] Add simplification/combines for llvm.amdgcn.fma.legacy
This follows on from D89558 which added the new intrinsic and D88955
which added similar combines for llvm.amdgcn.fmul.legacy.

Differential Revision: https://reviews.llvm.org/D90028
2020-10-23 16:16:13 +01:00
Denis Antrushin
4f7ee55971 Revert "[Statepoints] Allow deopt GC pointer on VReg if gc-live bundle is empty."
Downstream testing revealed some problems with this patch.
Reverting while investigating.
This reverts commit 2b96dcebfa.
2020-10-23 21:55:06 +07:00
Nicolai Hähnle
a74fc48158 CfgInterface: rename interface() to getInterface()
Apparently there are some Microsoft headers which
`#define interface struct`. This method is only used
in pending changes so far.

Change-Id: Ic68fe8e1958ec9b015f817ee218431f4146b888a
2020-10-23 16:52:10 +02:00
Sourabh Singh Tomar
1d328446bf [flang][OpenMP] Upstream lowering of ParallelOp clauses
Note: This patch reflects the work that can be upstreamed from PR's(merged):

1. https://github.com/flang-compiler/f18-llvm-project/pull/456
2. https://github.com/flang-compiler/f18-llvm-project/pull/485

Also replaced TODO with new TODO.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D89769
2020-10-23 20:21:39 +05:30
Simon Pilgrim
a6ad077f5d [InstCombine] Add i8 bitreverse by multiplication test patterns
Pulled from bit twiddling hacks webpage
2020-10-23 15:39:57 +01:00
Simon Pilgrim
61d1847b12 [InstCombine] Add 8/16/32/64 bitreverse test coverage
Use typical codegen for the traditional pairwise lgN bitreverse algorithm
2020-10-23 15:39:56 +01:00
Simon Pilgrim
9e7667e2ad [InstCombine] Add initial bitreverse test coverage 2020-10-23 15:39:56 +01:00
Paul C. Anagnostopoulos
876af264c1 [TableGen] Change !getop and !setop to !getdagop and !setdagop.
Differential Revision: https://reviews.llvm.org/D89814
2020-10-23 10:36:05 -04:00
Matt Arsenault
8a59d4b654 AMDGPU: Don't query for TII in TII 2020-10-23 10:34:24 -04:00
Matt Arsenault
d61996473d AMDGPU: Increase branch size estimate with offset bug
This will be relaxed to insert a nop if the offset hits the bad value,
so over estimate branch instruction sizes.
2020-10-23 10:34:24 -04:00
Valentin Clement
676ff75d60 [flang][openacc] Fix semantic check for wait and atomic directives
wait and atomic directives are represented by OpenACCWaitConstruct, OpenACCAtmicConstruct in the parser. Those contrsuct were
not taken into account in the semantic check so far.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D88628
2020-10-23 10:31:50 -04:00
David Van Cleve
f55eeea402 Export TemplateArgumentMatcher so clients defining custom matchers don't need to use the internal namespace
This change adds another export, `using TemplateArgumentMatcher = internal::Matcher<TemplateArgument>;`, to the collection of exports that put instantiations of the `clang::ast_matchers::internal::Matcher` into the `clang::ast_matchers` namespace. This makes it possible to define custom TemplateArgument matchers without reaching into the `internal` namespace.

Reviewed By: klimek

Differential Revision: https://reviews.llvm.org/D89920
2020-10-23 16:13:56 +02:00
Frederik Gossen
8039b3f966 [MLIR] Fix bad merge with buffer alias analysis. 2020-10-23 14:11:27 +00:00
Evgeny Leviant
b651ecfb72 [llvm-mca] Extend cortex-a57 memory instructions test
Patch adds few/load store instructions which have custom sched
classes in cortex-a57 model.
2020-10-23 17:02:20 +03:00
Jeremy Morse
68f4715716 [DebugInstrRef] Convert DBG_INSTR_REFs into variable locations
Handle DBG_INSTR_REF instructions in LiveDebugValues, to determine and
propagate variable locations. The logic is fairly straight forwards:
Collect a map of debug-instruction-number to the machine value numbers
generated in the first walk through the function. When building the
variable value transfer function and we see a DBG_INSTR_REF, look up the
instruction it refers to, and pick the machine value number it generates,
That's it; the rest of LiveDebugValues continues as normal.

Awkwardly, there are two kinds of instruction numbering happening here: the
offset into the block (which is how machine value numbers are determined),
and the numbers that we label instructions with when generating
DBG_INSTR_REFs.

I've also restructured the TransferTracker redefVar code a little, to
separate some DBG_VALUE specific operations into its own method. The
changes around redefVar should be largely NFC, while allowing
DBG_INSTR_REFs to specify a value number rather than just a location.

Differential Revision: https://reviews.llvm.org/D85771
2020-10-23 14:50:02 +01:00
Nico Weber
13aff21f0d [gn build] port 48e4b0f (__config_site revert)
This reverts commit b3ca53e142.
This reverts commit 8b7dac81d3.
This reverts commit 37c030f81a.
2020-10-23 09:45:34 -04:00
Louis Dionne
48e4b0fd3a [runtimes] Revert the libc++ __config_site change
This is a massive revert of the following commits (from most revent to oldest):

	2b9b7b5775.
	529ac33197
	28270234f1
	69c2087283
	b5aa67446e
	5d796645d6

After checking-in the __config_site change, a lot of things started breaking
due to widespread reliance on various aspects of libc++'s build, notably the
fact that we can include the headers from the source tree, but also reliance
on various "internal" CMake variables used by the runtimes build and compiler-rt.

These were unintended consequences of the change, and after two days, we
still haven't restored all the bots to being green. Instead, now that I
understand what specific areas this will blow up in, I should be able to
chop up the patch into smaller ones that are easier to digest.

See https://reviews.llvm.org/D89041 for more details on this adventure.
2020-10-23 09:41:48 -04:00
Chen Zheng
1e0b6c1df0 [LSR] ignore profitable chain when reg num is not major cost.
Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D89665
2020-10-23 09:35:48 -04:00
Sam McCall
ce63383e45 [clangd] Drop version from remote index proto names, fix clangd-index-server
We only need to version these messages if they actually diverge.
Unlike the service, the namespace name isn't part of the wire format.

clangd-index-server was broken by 81e5f298c4
as the namespace names weren't updated there, this fixes it (by adding
them for the service, and not requiring them elsewhere).
2020-10-23 15:28:11 +02:00
Stefan Pintilie
c6561ccfd9 [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic
Add support to LLD for PC Relative Thread Local Storage for Local Dynamic.
This patch adds support for two relocations: R_PPC64_GOT_TLSLD_PCREL34 and
R_PPC64_DTPREL34.

The Local Dynamic code is:
```
pla r3, x@got@tlsld@pcrel        R_PPC64_GOT_TLSLD_PCREL34
bl __tls_get_addr@notoc(x@tlsld) R_PPC64_TLSLD
                                 R_PPC64_REL24_NOTOC
...
paddi r9, r3, x@dtprel           R_PPC64_DTPREL34
```

After relaxation to Local Exec:
```
paddi r3, r13, 0x1000
nop
...
paddi r9, r3, x@dtprel          R_PPC64_DTPREL34
```

Reviewed By: NeHuang, sfertile

Differential Revision: https://reviews.llvm.org/D87504
2020-10-23 08:23:56 -05:00
Frederik Gossen
6d83e3b443 [MLIR] Extract buffer alias analysis for reuse
Extract buffer alias analysis from buffer placement.

Differential Revision: https://reviews.llvm.org/D89902
2020-10-23 13:23:32 +00:00
Sam McCall
e6c1c3f97f [clang] Split remote index service definition into a separate file.
This allows it to have a separate namespace (grpc versioned service) without
putting versioning info on all of the other protos (before we need it).

clang-index-server is still broken (from 81e5f298c4).

Differential Revision: https://reviews.llvm.org/D90031
2020-10-23 15:20:51 +02:00