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131 Commits

Author SHA1 Message Date
Evan Cheng
ebb0357b4c Minor updates. 
llvm-svn: 31761
 2006-11-15 20:54:29 +00:00
Evan Cheng
77af6ac5e8 - Let MachineInstr ctors add implicit def and use operands. Other operands 
will be inserted before these operands. If the opcode changes (by
  setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
  that move kill / dead info to MachineInstr's.

llvm-svn: 31711
 2006-11-13 23:34:06 +00:00
Evan Cheng
979bbf48d5 Add methods to add implicit def use operands to a MI. 
llvm-svn: 31675
 2006-11-11 10:20:02 +00:00
Evan Cheng
8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Chris Lattner
7a7835deb4 be more aggressive about matching identical instructions. 
llvm-svn: 31179
 2006-10-25 18:08:14 +00:00
Chris Lattner
33f5af09e4 implement MachineOperand::isIdenticalTo 
llvm-svn: 31088
 2006-10-20 22:39:59 +00:00
Chris Lattner
2cb238320d Only call isUse/isDef on register operands 
llvm-svn: 30118
 2006-09-05 20:19:27 +00:00
Evan Cheng
55772ccfd6 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.

llvm-svn: 28791
 2006-06-15 07:22:16 +00:00
Evan Cheng
0f5c7936e7 Remove a bogus cast. 
llvm-svn: 28492
 2006-05-26 08:00:14 +00:00
Chris Lattner
abdf4d569c Final pass of minor cleanups for MachineInstr 
llvm-svn: 28110
 2006-05-04 19:36:09 +00:00
Chris Lattner
53af9da363 Remove redundancy and a level of indirection when creating machine operands 
llvm-svn: 28107
 2006-05-04 19:14:44 +00:00
Chris Lattner
469647bf38 Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner
10b71c0d08 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner
10d6341618 Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
fef7a2d0f5 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner
15c52bda1d Change "value" in MachineOperand to be a GlobalValue, as that is the only 
thing that can be in it.  Remove a dead method.

llvm-svn: 28098
 2006-05-04 17:02:51 +00:00
Chris Lattner
ee64b6b40f Remove a bunch more dead V9 specific stuff 
llvm-svn: 28094
 2006-05-04 01:26:39 +00:00
Chris Lattner
940cc978ef Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner
6e663f1c1e Remove some more V9-specific stuff. 
llvm-svn: 28092
 2006-05-04 00:49:59 +00:00
Chris Lattner
9f6639b64d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Nate Begeman
4ca2ea5b43 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Chris Lattner
dcc1f995eb This field no longer exists 
llvm-svn: 27899
 2006-04-20 18:32:41 +00:00
Chris Lattner
a38c3580bd Remove some of the obvious V9-specific cruft 
llvm-svn: 27893
 2006-04-20 18:08:53 +00:00
Chris Lattner
bec79b4a59 Add a MachineInstr::eraseFromParent convenience method. 
llvm-svn: 27775
 2006-04-17 21:35:41 +00:00
Misha Brukman
835702a094 Remove trailing whitespace 
llvm-svn: 21420
 2005-04-21 22:36:52 +00:00
Chris Lattner
3065220deb Allow machine operands to represent global variables with offsets. This is 
useful when you have a reference like:

int A[100];

void foo() { A[10] = 1; }

In this case, &A[10] is a single constant and should be treated as such.

Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.

This is another fine patch contributed by Jeff Cohen!!

llvm-svn: 17007
 2004-10-15 04:38:41 +00:00
Reid Spencer
7c16caa336 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Misha Brukman
b47ab7ae1c * Doxygenify comments 
* Fix spacing, grammar in comment
* Make code layout consistent
* Wrap code at 80 cols
* Delete spurious blank lines

No functional changes.

llvm-svn: 14721
 2004-07-09 14:45:17 +00:00
Reid Spencer
eb04d9bcb4 Add #include <iostream> since Value.h does not #include it any more. 
llvm-svn: 14622
 2004-07-04 12:19:56 +00:00
Tanya Lattner
23dbc8170c Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function. 
llvm-svn: 14389
 2004-06-25 00:13:11 +00:00
Brian Gaeke
4300ca9d32 Make debugging dumps w/ multiple MachineBBs for a given LLVM BB readable. 
llvm-svn: 14205
 2004-06-17 22:26:53 +00:00
Chris Lattner
2150542af9 Adjust to new TargetMachine interface 
llvm-svn: 13956
 2004-06-02 05:57:12 +00:00
Tanya Lattner
bcee21b491 Changed clone to be const. 
Changed copy constructor to set parent, prev, and next pointers to null.

llvm-svn: 13706
 2004-05-24 03:14:18 +00:00
Tanya Lattner
9953d86e63 Fixed up my changes to add support for cloning Machine Instructions. 
llvm-svn: 13665
 2004-05-23 20:58:02 +00:00
Tanya Lattner
e6a4a7dbcf Adding support to clone MachineInstr 
llvm-svn: 13661
 2004-05-23 19:35:12 +00:00
Brian Gaeke
015972103d Make MachineOperand's value named 'contents'. Make really, really sure 
it is always completely initialized and copied.
Also, fix up many comments and asserts.

llvm-svn: 12100
 2004-03-03 19:07:27 +00:00
Chris Lattner
44b1b22a2d int64_t -> int 
llvm-svn: 11977
 2004-02-29 05:07:02 +00:00
Alkis Evlogimenos
519e1e8c92 Fix crash caused by passing register 0 to 
MRegisterInfo::isPhysicalRegister().

llvm-svn: 11894
 2004-02-27 01:52:34 +00:00
Chris Lattner
91a7dc0a6e Fix bugs in finegrainification 
llvm-svn: 11758
 2004-02-23 18:40:08 +00:00
Chris Lattner
43df6c268b Finegrainify namespacification 
llvm-svn: 11757
 2004-02-23 18:38:20 +00:00
Chris Lattner
63f41abfe6 Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed 
by operator<< on MachineInstr's, and looking up what register "24" is all of the
time was greatly annoying.

llvm-svn: 11623
 2004-02-19 16:17:08 +00:00
Alkis Evlogimenos
14f3fe81c6 Add LeakDetection to MachineInstr. 
Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.

llvm-svn: 11497
 2004-02-16 07:17:43 +00:00
Alkis Evlogimenos
8cdd0215bf Remove getAllocatedRegNum(). Use getReg() instead. 
llvm-svn: 11393
 2004-02-13 21:01:20 +00:00
Brian Gaeke
e8f7c2f863 Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace. 
Rename SetMachineOperandConst's formal parameters to match other methods here.
Mark some methods as being used only by the SPARC back-end.
Fix a missing-paren bug in OutputValue().

llvm-svn: 11363
 2004-02-13 04:39:32 +00:00
Alkis Evlogimenos
de8ac749fe Add parent pointer to MachineInstr that points to owning 
MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.

llvm-svn: 11357
 2004-02-12 18:49:07 +00:00
Chris Lattner
6a597d6057 Rename the opCode instance variable to Opcode 
llvm-svn: 11348
 2004-02-12 16:09:53 +00:00
Chris Lattner
6108d9d5ee This field is never read 
llvm-svn: 11346
 2004-02-12 16:04:49 +00:00
Alkis Evlogimenos
327426411e Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
 2004-02-04 22:17:40 +00:00
Alkis Evlogimenos
3d100ef0ca When an instruction like: A += B had both A and B virtual registers 
spilled, A was loaded from its stack location twice. This fixes the bug.

llvm-svn: 11093
 2004-02-03 01:13:07 +00:00
Alkis Evlogimenos
aaba4639f8 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00