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llvm with tablegen backend for capstone disassembler
16b90733c7
Summary: For a CXXRecordDecl the RecordDeclBits are stored in the DeclContext. Currently when we import the definition of a CXXRecordDecl via the ASTImporter we do not copy over this data. This change will add support for copying the ArgPassingRestrictions from RecordDeclBits to fix an LLDB expression parsing bug where we would set it to not pass in registers. Note, we did not copy over any other of the RecordDeclBits since we don't have tests for those. We know that copying over LoadedFieldsFromExternalStorage would be a error and that may be the case for others as well. The companion LLDB review: https://reviews.llvm.org/D61146 Differential Review: https://reviews.llvm.org/D61140 llvm-svn: 359338 |
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clang | ||
clang-tools-extra | ||
compiler-rt | ||
debuginfo-tests | ||
libclc | ||
libcxx | ||
libcxxabi | ||
libunwind | ||
lld | ||
lldb | ||
llgo | ||
llvm | ||
openmp | ||
parallel-libs | ||
polly | ||
pstl | ||
.arcconfig | ||
.clang-format | ||
.clang-tidy | ||
.gitignore | ||
README.md |
The LLVM Compiler Infrastructure
This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.