Commit Graph

1499 Commits

Author SHA1 Message Date
Sven Steinbauer
028878f87a add thumb lsr op 2017-05-04 12:59:01 +02:00
Sven Steinbauer
35dd3df74d Add mov.w thumb instruction (#7397)
FIX #7387
2017-05-02 15:19:15 +02:00
pancake
60f9667654 Remove support for bjam build system
- Delete all Jamroot files
2017-05-02 05:48:40 +02:00
pancake
fa0409dab7 Fix crash in signatures and minor fix for meson 2017-05-02 05:43:44 +02:00
pancake
fa671b9a16 Initial support for the Meson build system
- Integrated with current ACR
- Fix some stale fails got removed
2017-05-02 05:05:36 +02:00
pancake
e26ea1dbfb Fix msvc build of xtensa 2017-04-24 21:37:28 +02:00
pancake
e076734fb9 Fix #7307 - Remove harmless warnings reported by a Debian user 2017-04-18 16:22:06 +02:00
Sven Steinbauer
841707dffe Add more str* ops for arm assembler (#7306)
* strh
* strd
* strexd
* strexh
* strb
* strbt

FIX #7251
2017-04-18 15:39:25 +02:00
Sven Steinbauer
03f0ad4187 Fix #7299 - Fix handling and output for arm bic op (#7302) 2017-04-18 13:00:37 +02:00
pancake
2f8d25286a Fix #7300 - null deref in armass for mrc 2017-04-18 11:30:37 +02:00
pancake
ffe0da0fa1 Fix many more clang-analyzer null derefs and overflows 2017-04-18 00:38:24 +02:00
pancake
5e209ecc92 Initial implementation of the anal plug for tms320c64x 2017-04-18 00:08:13 +02:00
pancake
85d2225e8a Fix build with capstone3 (tms320c64x is not available) 2017-04-17 23:50:51 +02:00
pancake
54f6efddde Upgrade capstone-next to get tms320c64x support and more fixes for SFC 2017-04-17 23:37:04 +02:00
usr_share
6d9db7e891 Implemented a sort-of-working SNES/SFC file format 2017-04-17 23:14:42 +02:00
pancake
5fc6dc30a8 Fix build 2017-04-17 23:06:44 +02:00
pancake
a66cc10d46 Fix a huge list of null derefs from clang-analyzer 2017-04-17 22:02:04 +02:00
pancake
e641318973 Fix a bunch of bugs reported by clang-analyzer 2017-04-17 19:59:14 +02:00
Pepe Vila
8570f4fc5d fixed r_types.h use in wasm (#7292) 2017-04-16 19:37:15 +02:00
Pepe Vila
40a33b3a26 Rewrite WASM to fix all oob issues 2017-04-15 19:57:54 +02:00
Sven Steinbauer
d0f70cf62e Check for negative register values (#7266) 2017-04-13 23:11:04 +02:00
pancake
65776308c9 RAR disassembler and bin plugin moved to radare2-extras 2017-04-11 13:53:58 +02:00
Sven Steinbauer
4f38a99bb2 Ignore position of immediates in arm64 (#7236)
It's not possible to assume what an immediate stands for based on its
position alone. Just parse it out as a CONSTANT type and infer type
within the operator function
2017-04-10 16:02:10 +02:00
pancake
45889c7307 Implement Pn+, and fix bugs (thx clang-analyzer)
- Update SDB (use memmove)
- Fix garbage read in capstone x86 and lm32
- Add UT16/32/64_ALIGN macro for proper (ut16*) allocations
- Add Pn+ command
2017-04-10 00:49:02 +02:00
pancake
c1d47318f8 Avoid global insn in x86.cs to avoid crash when multithreading 2017-04-08 00:52:25 +02:00
Sven Steinbauer
deb61ca804 Add mrc op for arm 32bit (#7216)
* Don't segfault if toomany operands

* Add mrc op for arm 32bit
2017-04-07 20:28:03 +02:00
pancake
c1d212dfc4 Implement opex for sparc and remove the % from the disasm 2017-04-07 20:11:01 +02:00
pancake
668b56fabf Revert "Fix some overruns in gnu-arm disassembler, there are more"
This reverts commit 3a400cae58.
2017-04-05 15:10:30 +02:00
pancake
3a400cae58 Fix some overruns in gnu-arm disassembler, there are more 2017-04-05 11:10:34 +02:00
pancake
01477c74f0 More coverities fixed 2017-04-05 10:59:37 +02:00
pancake
a2afa236a2 Fix some null derefs and memleaks from coverity 2017-04-05 10:38:52 +02:00
pancake
bbc508b324 Move lua53 plugins to radare2-extras, available via r2pm
This reverts commit 16c2fd2fe4.
2017-04-05 10:16:50 +02:00
Pepe Vila
86c8fa1a01 wasm disasm support (#7204) 2017-04-04 02:34:31 +02:00
Cararasu
16c2fd2fe4 Lua 5.3 Assembler/Disassembler, Analyzer and Binary Plugin (#3836) (#7197)
* Added Lua 5.3 Assembly and Disassembly
* Implemented Lua 5.3 Binary Analyzer #3836
* removed unnecesasry prints for lua implementation #3836

* implemented caching for parsing the lua-file #3836 grouped global data together
* added mnemonics to analyzer and fixed a wrong instructionname
* replaced llx and llu with PFMT64x
* removed trailing whitespaces from lua 5.3 assembler and binary analyzer
* made all functions in lua53 plugins that are possible static
2017-04-03 11:59:17 +02:00
alvarofe
643267ab67 Fix some warnings when compiling 2017-04-02 12:43:25 +02:00
alvarofe
42fb071d4b Fix #7198 - static code analysis by AppChecker 2017-04-02 12:22:04 +02:00
Sven Steinbauer
a6c4939b62 Fix single operand parsing for arm64 (#7191)
FIX #7189
2017-03-31 12:52:08 +02:00
Thomas Ilsche
1a72b58daa fix NULL deref on failed strbuf_new and memory leak in r_asm_mdisassemble (#7163) 2017-03-29 00:44:36 +02:00
pancake
74690db2b1 Dont enable v8 mode on arm64 for capstone 2017-03-28 13:25:29 +02:00
pancake
265a44c0d2 Fix #7133 - asm.cpu=v8 doesnt toggles cortex 2017-03-28 11:37:23 +02:00
pancake
c504b85a7c Fix #7117 - Implement s! to show near flag names for history offsets 2017-03-27 13:12:59 +02:00
pancake
6de49610ea Add 40 more asm.describe for Thumb2 2017-03-27 12:38:14 +02:00
Sven Steinbauer
3e72eb21c7 Fix bad 64 bit assembly for group1 ops (#7146) 2017-03-26 23:55:53 +02:00
Sven Steinbauer
06a36c923f Error on trailing for add op 16bit (#7147) 2017-03-26 23:55:46 +02:00
Sven Steinbauer
3aa18670ec Support assembling the BND prefix on x86.nz branch instructions 2017-03-24 12:22:04 +01:00
Q
49a54115d3 Fix multiple definition of 'snesflags' in static build 2017-03-24 11:10:30 +01:00
Giovanni
1a5ffd5221 Fix sparc regressions, ahi s and pd@x 2017-03-24 02:42:31 +01:00
radare
321e51fa6a Update the GNU ARM disassembler from Binutils (GIT) 2017-03-24 00:56:21 +01:00
/usr/share
87b78b63eb SNES: (kinda) handle X and M flags (#7095) 2017-03-23 12:53:14 +01:00
alvarofe
ce25037120 Fix #7070 - oob read wrong init buffer asm_sh.c 2017-03-20 23:28:38 +01:00
pancake
e2df61f48e Fixes for m68k -n 16 and sega mega drive roms endian 2017-03-19 11:33:39 +01:00
davidpolverari
1fb422b532 Fix #6162 - Renames r_str_concat to r_str_append 2017-03-16 22:29:49 +01:00
Sven Steinbauer
bd884531f0 Add 16bit jmp x86 (#7023)
Add 16bit jmp x86
2017-03-14 16:19:43 +00:00
Sven Steinbauer
5a4c18f49a Add ARM64 barrier ops 2017-03-13 17:53:26 +01:00
Sven Steinbauer
b4d74880c2 Add shift support to ldr instructions (#7014) 2017-03-13 14:27:35 +01:00
Simone Ferrini
a5cc36525f [armass] Added support for sequence registers in pop instruction (#6994) 2017-03-12 19:18:28 +01:00
Álvaro Felipe Melchor
6870bec29f Fix #6853 - get rid of asserts 2017-03-12 15:24:05 +01:00
Lowly Worm
b9302dd4b6 fix typo in WebAssemlby 2017-03-10 23:27:45 -08:00
Sven Steinbauer
73ff7ec410 implement ORR for arm64 FIX #6611 (#6977)
* implement ORR for arm64 FIX #6611

Implements or with registers and immediate (not yet with rot values for
registers)

* Squash warnings
2017-03-10 15:38:04 +01:00
Simone Ferrini
781b3fc58e Fix BL for arm thumb (#6968) 2017-03-09 23:47:03 +01:00
pancake
bb4f591d93 Fix capstone3 build regression introduced in 272786852b 2017-03-09 00:02:28 +01:00
Wladimir J. van der Laan
10d1df6dd2 Update RiscV opcodes for disassembly (#6897)
* riscv: Update opcodes from binutils-gdb

Update to riscv opcodes from
[riscv-binutils-gdb](https://github.com/riscv/riscv-binutils-gdb/commit/08219b2)
git 08219b2.

* riscv: set no_alias=false while disassembling

I'm not sure what the rationale was for setting no_alias to true
originally. But setting it to false means that shorter and (usually)
better readable aliases for instructions will be shown:

Before               |  After
---------------------+------------
`c.jr ra`            | `ret`
`addi a5, zero, 123` | `li a5,123`
`jal zero, 0x101dc`  | `j 0x101dc`

And so on.
2017-03-04 10:18:45 +01:00
Q
b7db017fa5 Fix multiple definition error in static builds (#6891)
Rename conflicting global names 'fields' array in AArch64
and 'fields' function in MachoO
2017-03-03 10:53:41 +01:00
dogtopus
247a8df1e7 Add getimmed8, fix #6841 (#6892) 2017-03-03 08:24:24 +01:00
pancake
8ab0befbd7 Remove assert in GNU's arm64 disassembler 2017-03-03 01:30:56 +01:00
Giovanni
780b834e61 Fix #6882 - tricore byte copy 2017-03-03 00:10:32 +01:00
h4ng3r
f41e941341 Fix #6885 - oob write in dalvik_disassemble 2017-03-02 22:51:57 +01:00
pancake
34089ab363 Fix entrypoint in wasm and add some uleb128-based instructions 2017-03-02 18:45:10 +01:00
Giovanni
aaa46baa48 fixed tricore bug (#6883) 2017-03-02 17:56:43 +01:00
pancake
a41a8252ae Initial import of the WIP support for WebAssembly (bin + disasm) 2017-03-02 14:42:05 +01:00
pancake
d6756e235c Implement author and version of RAsmPlugin 2017-02-28 02:26:55 +01:00
pancake
3b83e18c51 Remove assert for the GNU arm64 disassembler 2017-02-26 23:34:24 +01:00
Wladimir J. van der Laan
aab2bc824c riscv: Choose first match while disassembling
The opcodes table is sorted with the preferred instructions with a
certain encoding first.
2017-02-26 23:06:32 +01:00
Wladimir J. van der Laan
78089cd34f riscv: Return actual instruction length
Support instructions of varying length.
Addresses #6849.
2017-02-26 23:06:32 +01:00
Maijin
266eee75ae Fix #6560 Unify Windows/Win32 define 2017-02-26 16:51:03 +01:00
alvarofe
f992370474 Fix some memory leaks after ht clean up 2017-02-25 23:50:33 +01:00
alvarofe
0b97b11d38 Fix regression on tms320 2017-02-24 23:42:17 +01:00
alvarofe
8ff55080ea Use ht_* in tms320 2017-02-24 23:42:17 +01:00
Sven Steinbauer
7d71bf5fa2 x86.nz infer bits from register names (#6792) 2017-02-15 11:49:35 +01:00
Sven Steinbauer
65791475ff Refactor msr mrs instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
d5c9a65a97 Refactor exceptions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
70a16f14df Refactor branch instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
59aac1fdc4 Fix arithmetic op encoding 2017-02-10 13:11:14 +01:00
Sven Steinbauer
3480b9c799 Add lsl and shift to operand 2017-02-10 13:11:14 +01:00
Sven Steinbauer
cb36fd40cb refactor mov instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
4ef134e5c4 Add parsing routines 2017-02-10 13:11:14 +01:00
Sven Steinbauer
f6120770eb Add ldrex strex to ARM assembler 2017-02-08 18:29:02 +01:00
Sven Steinbauer
6e9ae1772b Fix #6696 - Prevent infinite loop on visual assembler (#6709) 2017-02-08 12:31:15 +01:00
Sven Steinbauer
8847e121d7 x86.nz fixes enhancements (#6720)
* Fix group 1 assemble
Fix assembling of group 1 instructions
* add byte [0x452343], 0x34
* add byte [0x435341], al
* Add support for register based offsets
mov [eax + ecx], 0x33

* Fix lea with large values in second operand

* Add movsx and movzx ops
2017-02-07 17:26:35 +01:00
SchumBlubBlub
6c00c9e2d5 Reorganize string macros 2017-02-06 00:00:03 +01:00
pancake
bd25a763d8 Fix null deref and infinite loop when building with no plugins 2017-02-02 13:25:21 +01:00
pancake
5fa9601abe Implement add+sub for arm64 2017-01-29 14:48:13 +01:00
pancake
f64b082bd2 Implement adr instruction for the arm64 assembler 2017-01-29 14:08:04 +01:00
pancake
3c9e80372f Fix #6598 - r2pm db2 issue and add 2 arm64 bonus ops to the assembler 2017-01-29 03:44:18 +01:00
pancake
1627b990ad Add hvc and smc instructions in the arm64 assembler 2017-01-29 03:24:47 +01:00
pancake
196c800b87 Implement svc instruction for the arm64 assembler 2017-01-29 02:36:44 +01:00
Sven Steinbauer
4e73901e31 Add arm64 mov instruction (#6594)
Only handles immediates up to 32 at the moment.

FIX #6588
2017-01-27 20:49:34 +01:00
Álvaro Felipe Melchor
088c13ddad Fix UAF in cb_asmarch 2017-01-25 23:20:20 +01:00
pancake
d9fb5713db Fix racy set of asm.cpu and asm.arch 2017-01-24 13:57:17 +01:00
pancake
197443d42a asm.cpu=cortex required for arm (not by default) 2017-01-23 03:02:35 +01:00