pancake
9eb63df89f
Fix #4502 - Implement blx address for arm32 assembler
2016-04-03 17:35:52 +02:00
Evan Shaw
58328def22
Show absolute offsets for relative branches in SNES disassembly
...
This makes the disassembly easier to read.
2016-04-02 10:02:27 +02:00
Anders Kaare
ff21bb5fbf
fixing 6502 analysis
...
36e42b33fe37e922f132e286508bd88ef9fb137d broke analysis by introducing a
new enum value. The analysis code didn't switch on the enum but rather
used it directly as an integer, so since the new SNES_OP_IMM has 5 as
its integer value the analysis code would think that the op was 5 bytes
in length.
2016-03-30 22:08:52 +02:00
Léo Gaspard
353ff45443
Add EBC 'not' instruction decoding
2016-03-29 17:10:04 +02:00
Léo Gaspard
5c8a663e23
Identify external calls for EBC
2016-03-29 01:22:48 +02:00
Léo Gaspard
7595af19e3
Use decode_index32 for EBC calls
2016-03-29 01:22:48 +02:00
Léo Gaspard
ff4bce16db
Actually follow UEFI spec for index{32,64}
2016-03-29 01:22:48 +02:00
pancake
d629165ec8
Remove unnecessary = NULL in bin/p/*.c
2016-03-27 23:02:29 +02:00
pancake
9d62ee0ddf
Fix m68k.cs disassembler issue, honor asm.cpu in anal.m68k.cs
2016-03-24 16:21:49 +01:00
pancake
a461bbc536
Fix #4304 - asm.filter for m68k
2016-03-22 12:45:05 +01:00
pancake
76fa5bddcf
Add missing signature
2016-03-18 17:19:06 +01:00
pancake
446add902f
Fix #4345 - Add scas{bwd} for x86.nz
2016-03-18 16:59:47 +01:00
pancake
dc33b03011
Handle movk and movz in the arm64 assembler and pseudo disassembler
2016-03-17 17:26:08 +01:00
pancake
ae32acc5bc
Add missing space after commas in m68k
2016-03-15 11:59:19 +01:00
pancake
1c443caccf
Fix some COVs in snes disassembler
2016-03-13 21:04:12 +01:00
pancake
526d8d8e63
Fix #4275 - Fix lanai format string warnings
2016-03-13 03:23:54 +01:00
Evan Shaw
36e42b33fe
Support 16-bit immediate operands in SNES
...
Size for immediate operands depends on the value of the M flag
(for register A) or the X flag (for registers X and Y). A register is
8-bit when its respective flag is set and 16-bit when clear.
These flags can be set or unset independently, so this still isn't quite right
for when one flag is set and the other isn't, but it's an improvement. It's
possible to force a particular instruction to decode correctly by using the
`afh` command.
2016-03-12 03:06:46 +01:00
oddcoder
966900121d
adding bunch of another esil & fixing the bits
2016-03-09 15:32:50 +01:00
oddcoder
888b7d575d
fixing bug in goto disassmebly
2016-03-09 12:21:56 +01:00
Álvaro Felipe Melchor
0efdf9cf97
Fix again #4215
2016-03-07 22:17:59 +01:00
pancake
d00beba767
Fix arm.cs thumb thing
2016-03-07 17:06:26 +01:00
pancake
75bf9b233a
Fix aat->aap typo and add no-mclass option for x86.arm.cs
2016-03-07 12:31:50 +01:00
pancake
be9d53417e
Fix #4215 - Fix disasm of thumb mrs 0, primask
2016-03-07 04:50:06 +01:00
pancake
650e99407b
Oops. copypaste error in 6502dis
2016-03-07 04:44:42 +01:00
pancake
8de14dc2b6
Fix #4242 - OOB read in riscv disassembler
2016-03-07 00:21:49 +01:00
pancake
36ce331815
Fix #4239 - oobread in 6502 disassembler
2016-03-06 23:43:07 +01:00
oddcoder
9b21040898
fixing logic error in rcall instruction
...
I just misread the operands of the rcall instruction
their is 2 similar types of instruction (naming conveintions used only
by me and mentioned no where in the manual) the N_T where the n operand
is 8 bit and NET_T where the n operand is 11 bit
the rcall looks like the following 1101 1nnn nnnn nnnn which is obviosly
NEX_T
2016-03-05 19:54:31 +01:00
oddcoder
115c0bd40d
fixing OSX Darwin compilation error #4218
2016-03-04 15:20:20 +01:00
oddcoder
599cbcd3c7
attempt to fix scan.converity bugs
...
I also hunted 4th illegal memory read
the first 2 bytes of b is always casted to (ut16) type
with out checking if b even contains 2 bytes
now it is handled it correctly
2016-03-04 00:50:25 +01:00
oddcoder
87b6ada97a
Add asm.describe for pic18c
2016-03-03 03:18:03 +01:00
oddcoder
7fe6c6dff2
Adding initial support for PIC18C diassembler
2016-03-02 11:55:22 +01:00
mrdanielps
7fe1d56932
V810: fixes
...
* Proper bound checking when decoding.
* Reuse some macros.
* Follow code style guidelines.
2016-02-28 17:43:40 +01:00
Prasanna Balan
d9f4bce40b
MSP430: add support for illegal opcodes
...
Before this commit,any illegal opcode would return -1 which
would make r2 use 1 byte as default opcode width.This was
wrong on MSP430 as it uses fixed 2 byte opcodes.Fix this
2016-02-25 02:58:38 +01:00
pancake
af2f02515f
Support and load r_fs plugins
2016-02-21 02:32:28 +01:00
pancake
7c76d45ab7
Fix #4114 - Remove the use of setjmp in xtensa arch
2016-02-20 23:41:23 +01:00
William Robinet
a67adbcbb8
Typos
2016-02-17 13:38:43 +01:00
pancake
f52d3c114c
Add missing signature for the lanai disassembler
2016-02-16 23:26:55 +01:00
William Robinet
d3ab5f38aa
Remove execution bit from source files
2016-02-16 23:21:46 +01:00
William Robinet
0c7cacc2dc
Fix typos
2016-02-16 23:21:24 +01:00
pancake
55eee73c6d
Fix #4061 - properly assemble ldr.w thumb instruction
2016-02-16 17:12:37 +01:00
pancake
384cfb1042
Fix last coverities
2016-02-16 02:08:09 +01:00
mrdanielps
d6f49bc54e
V810: Implement ESIL
2016-02-16 00:57:42 +01:00
pancake
ce7ca97cb6
Wip fixes for r_strbuf
2016-02-16 00:28:57 +01:00
pancake
fd359e9121
Implement radiff2 -D and optimize r_strbuf
2016-02-15 23:51:20 +01:00
pancake
cdf63617d7
Initial support for LANAI disassembler
2016-02-15 13:27:23 +01:00
pancake
838b254cc8
Fix #4090 - Do not assemble one-arg xors in x86.nz
2016-02-11 07:35:51 -06:00
mrdanielps
8ee43270e8
V810: Add opcode descriptions
2016-02-11 00:13:27 -06:00
evanrichter
7f43919750
add propeller architecture to asm.describe
...
source: http://nagasm.org/ASL/Propeller/printedPDF/QuickReference-v15.pdf
2016-02-10 17:21:08 -05:00
Jonathan Neuschäfer
91c940738c
Add opcode descriptions for riscv
2016-02-03 11:29:32 +01:00
Jonathan Neuschäfer
edbb677a79
libr/asm/d/arm: Fix description of ORR opcode
2016-02-03 11:22:13 +01:00
