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Common: Switch movsl/hdup to auto SSE/AVX

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This commit is contained in:
TellowKrinkle
2025-08-09 22:10:54 -05:00
committed by TellowKrinkle
parent d9fc763f82
commit 338e1a71a9
3 changed files with 14 additions and 4 deletions
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4
common/emitter/instructions.h
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@@ -499,8 +499,8 @@ namespace x86Emitter
extern const xImplSimd_PMove xPMOVSX;
extern const xImplSimd_PMove xPMOVZX;
extern const xImplSimd_DestRegSSE xMOVSLDUP;
extern const xImplSimd_DestRegSSE xMOVSHDUP;
extern const xImplSimd_2Arg xMOVSLDUP;
extern const xImplSimd_2Arg xMOVSHDUP;
extern void xINSERTPS(const xRegisterSSE& dst, const xRegisterSSE& src1, const xRegisterSSE& src2, u8 imm8);
extern void xINSERTPS(const xRegisterSSE& dst, const xRegisterSSE& src1, const xIndirect32& src2, u8 imm8);

4
common/emitter/simd.cpp
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@@ -777,10 +777,10 @@ namespace x86Emitter
const xImplSimd_PMove xPMOVZX = {SIMDInstructionInfo(0x30).p66().m0f38().mov()};
// [SSE-3]
const xImplSimd_DestRegSSE xMOVSLDUP = {0xf3, 0x12};
const xImplSimd_2Arg xMOVSLDUP = {SIMDInstructionInfo(0x12).pf3()};
// [SSE-3]
const xImplSimd_DestRegSSE xMOVSHDUP = {0xf3, 0x16};
const xImplSimd_2Arg xMOVSHDUP = {SIMDInstructionInfo(0x16).pf3()};
//////////////////////////////////////////////////////////////////////////////////////////
// MMX Mov Instructions (MOVD, MOVQ, MOVSS).

10
tests/ctest/common/x86emitter/codegen_tests_main.cpp
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@@ -370,6 +370,11 @@ TEST(CodegenTests, SSETest)
CODEGEN_TEST(xPBLEND.W(xmm0, xmm1, 0x55), "66 0f 3a 0e c1 55");
CODEGEN_TEST(xPBLEND.VB(xmm1, xmm2), "66 0f 38 10 ca");
CODEGEN_TEST(xMOVSLDUP(xmm1, xmm2), "f3 0f 12 ca");
CODEGEN_TEST(xMOVSLDUP(xmm1, ptr[r8]), "f3 41 0f 12 08");
CODEGEN_TEST(xMOVSHDUP(xmm9, xmm1), "f3 44 0f 16 c9");
CODEGEN_TEST(xMOVSHDUP(xmm9, xmm8), "f3 45 0f 16 c8");
CODEGEN_TEST(xPMOVSX.BW(xmm0, ptr[rax]), "66 0f 38 20 00");
CODEGEN_TEST(xPMOVZX.BW(xmm4, ptr[r8]), "66 41 0f 38 30 20");
CODEGEN_TEST(xPMOVSX.BD(xmm3, xmm4), "66 0f 38 21 dc");
@@ -637,6 +642,11 @@ TEST(CodegenTests, AVXTest)
CODEGEN_TEST(xPMOVSX.DQ(xmm2, xmm3), "c4 e2 79 25 d3");
CODEGEN_TEST(xPMOVZX.DQ(xmm4, xmm9), "c4 c2 79 35 e1");
CODEGEN_TEST(xMOVSLDUP(xmm1, xmm2), "c5 fa 12 ca");
CODEGEN_TEST(xMOVSLDUP(xmm1, ptr[r8]), "c4 c1 7a 12 08");
CODEGEN_TEST(xMOVSHDUP(xmm9, xmm1), "c5 7a 16 c9");
CODEGEN_TEST(xMOVSHDUP(xmm9, xmm8), "c4 41 7a 16 c8");
CODEGEN_TEST(xVMOVAPS(xmm0, xmm1), "c5 f8 28 c1");
CODEGEN_TEST(xVMOVAPS(xmm0, ptr32[rdi]), "c5 f8 28 07");
CODEGEN_TEST(xVMOVAPS(ptr32[rdi], xmm0), "c5 f8 29 07");