mirror of
https://github.com/PCSX2/pcsx2-sourceforge.git
synced 2026-02-04 03:11:18 +01:00
This commit is contained in:
saqibakhtar
@@ -1,7 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/../
|
||||
noinst_LIBRARIES = libDebugTools.a
|
||||
|
||||
libDebugTools_a_SOURCES = \
|
||||
cpuopsDebug.c Debug.h.bak DisR3000asm.c DisVU0Micro.c DisVUops.h \
|
||||
cpuopsDebug.h DisASM.h DisR5900asm.c DisVU1Micro.c \
|
||||
Debug.h DisR3000A.c DisR5900.c DisVUmicro.h
|
||||
@@ -1,8 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/../ -I@srcdir@/../x86
|
||||
noinst_LIBRARIES = libIPU.a
|
||||
|
||||
libIPU_a_SOURCES = IPU.c yuv2rgb.c coroutine.c acoroutine.S
|
||||
|
||||
SUBDIRS = mpeg2lib
|
||||
|
||||
#libIPU_a_LIBADD = mpeg2lib/libmpeg2IPU.a
|
||||
@@ -1,4 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/../ -I@srcdir@/../../
|
||||
noinst_LIBRARIES = libmpeg2IPU.a
|
||||
|
||||
libmpeg2IPU_a_SOURCES = Idct.c Mpeg.c Mpeg.h Vlc.h
|
||||
@@ -1,29 +0,0 @@
|
||||
AUTOMAKE_OPTIONS = foreign
|
||||
INCLUDES = -I@srcdir@/x86/
|
||||
noinst_LIBRARIES = libpcsx2.a
|
||||
|
||||
libpcsx2_a_SOURCES = \
|
||||
CdRom.c Decode_XA.h Mdec.h PsxBios.h R3000A.c Vif.h \
|
||||
CdRom.h EEregs.h PsxCommon.h R3000A.h VU0.c \
|
||||
CDVD.c Elfheader.c Memory.c PsxCounters.c R5900.c VU0.h \
|
||||
CDVD.h Elfheader.h Memory.h PsxCounters.h R5900.h VU0micro.c \
|
||||
CDVDiso.c FiFo.c Misc.c PsxDma.c Sif.c VU1micro.c \
|
||||
CDVDisodrv.c FPU2.cpp PsxDma.h Sifcmd.h VUflags.c \
|
||||
CDVDisodrv.h FPU.c MMI.c Sif.h VUflags.h \
|
||||
CDVDiso.h GS.cpp Patch.c Sio.c VU.h \
|
||||
CDVDlib.h GS.h Patch.h PsxHw.c Sio.h VUmicro.h \
|
||||
Common.h Hw.c Plugins.c PsxHw.h SPR.c VUops.c \
|
||||
COP0.c Hw.h Plugins.h PsxInterpreter.c SPR.h VUops.h \
|
||||
COP0.h Interpreter.c PS2Edefs.h PsxMem.c System.h \
|
||||
Counters.c InterTables.c PS2Etypes.h PsxMem.h Vif.c \
|
||||
Counters.h InterTables.h PsxBios2.h PsxSio2.c VifDma.c \
|
||||
Decode_XA.c Mdec.c PsxBios.c PsxSio2.h VifDma.h Cache.c \
|
||||
xmlpatchloader.cpp
|
||||
|
||||
if RECBUILD
|
||||
recdir = x86
|
||||
else
|
||||
recdir=
|
||||
endif
|
||||
|
||||
SUBDIRS = $(recdir) . DebugTools IPU RDebug tinyxml Linux
|
||||
@@ -1,7 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/../
|
||||
noinst_LIBRARIES = libRDebug.a
|
||||
|
||||
libRDebug_a_SOURCES = \
|
||||
deci2.c deci2_dcmp.c deci2_drfp.h deci2_iloadp.h deci2_ttyp.c \
|
||||
deci2_dbgp.c deci2_dcmp.h deci2.h deci2_netmp.c deci2_ttyp.h \
|
||||
deci2_dbgp.h deci2_iloadp.c deci2_netmp.h
|
||||
@@ -1,54 +0,0 @@
|
||||
#!/bin/sh
|
||||
# Pcsx2 - Pc Ps2 Emulator
|
||||
# Copyright (C) 2002-2008 Pcsx2 Team
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
#
|
||||
|
||||
echo ---------------
|
||||
echo Building Pcsx2
|
||||
echo ---------------
|
||||
|
||||
if [ $# -gt 0 ] && [ $1 = "all" ]
|
||||
then
|
||||
|
||||
aclocal
|
||||
automake
|
||||
autoconf
|
||||
chmod +x configure
|
||||
./configure ${PCSX2OPTIONS}
|
||||
make clean
|
||||
make install
|
||||
|
||||
else
|
||||
|
||||
make $@
|
||||
|
||||
#if [ $? -ne 0 ]
|
||||
#then
|
||||
#exit 1
|
||||
#fi
|
||||
|
||||
#if [ $# -eq 0 ] || [ $1 != "clean" ]
|
||||
#then
|
||||
#make install
|
||||
#fi
|
||||
|
||||
fi
|
||||
|
||||
if [ $? -ne 0 ]
|
||||
then
|
||||
exit 1
|
||||
fi
|
||||
@@ -1,323 +0,0 @@
|
||||
#!/bin/sh
|
||||
# install - install a program, script, or datafile
|
||||
|
||||
scriptversion=2005-05-14.22
|
||||
|
||||
# This originates from X11R5 (mit/util/scripts/install.sh), which was
|
||||
# later released in X11R6 (xc/config/util/install.sh) with the
|
||||
# following copyright and license.
|
||||
#
|
||||
# Copyright (C) 1994 X Consortium
|
||||
#
|
||||
# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to
|
||||
# deal in the Software without restriction, including without limitation the
|
||||
# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
# sell copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
# X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
|
||||
# AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC-
|
||||
# TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
#
|
||||
# Except as contained in this notice, the name of the X Consortium shall not
|
||||
# be used in advertising or otherwise to promote the sale, use or other deal-
|
||||
# ings in this Software without prior written authorization from the X Consor-
|
||||
# tium.
|
||||
#
|
||||
#
|
||||
# FSF changes to this file are in the public domain.
|
||||
#
|
||||
# Calling this script install-sh is preferred over install.sh, to prevent
|
||||
# `make' implicit rules from creating a file called install from it
|
||||
# when there is no Makefile.
|
||||
#
|
||||
# This script is compatible with the BSD install script, but was written
|
||||
# from scratch. It can only install one file at a time, a restriction
|
||||
# shared with many OS's install programs.
|
||||
|
||||
# set DOITPROG to echo to test this script
|
||||
|
||||
# Don't use :- since 4.3BSD and earlier shells don't like it.
|
||||
doit="${DOITPROG-}"
|
||||
|
||||
# put in absolute paths if you don't have them in your path; or use env. vars.
|
||||
|
||||
mvprog="${MVPROG-mv}"
|
||||
cpprog="${CPPROG-cp}"
|
||||
chmodprog="${CHMODPROG-chmod}"
|
||||
chownprog="${CHOWNPROG-chown}"
|
||||
chgrpprog="${CHGRPPROG-chgrp}"
|
||||
stripprog="${STRIPPROG-strip}"
|
||||
rmprog="${RMPROG-rm}"
|
||||
mkdirprog="${MKDIRPROG-mkdir}"
|
||||
|
||||
chmodcmd="$chmodprog 0755"
|
||||
chowncmd=
|
||||
chgrpcmd=
|
||||
stripcmd=
|
||||
rmcmd="$rmprog -f"
|
||||
mvcmd="$mvprog"
|
||||
src=
|
||||
dst=
|
||||
dir_arg=
|
||||
dstarg=
|
||||
no_target_directory=
|
||||
|
||||
usage="Usage: $0 [OPTION]... [-T] SRCFILE DSTFILE
|
||||
or: $0 [OPTION]... SRCFILES... DIRECTORY
|
||||
or: $0 [OPTION]... -t DIRECTORY SRCFILES...
|
||||
or: $0 [OPTION]... -d DIRECTORIES...
|
||||
|
||||
In the 1st form, copy SRCFILE to DSTFILE.
|
||||
In the 2nd and 3rd, copy all SRCFILES to DIRECTORY.
|
||||
In the 4th, create DIRECTORIES.
|
||||
|
||||
Options:
|
||||
-c (ignored)
|
||||
-d create directories instead of installing files.
|
||||
-g GROUP $chgrpprog installed files to GROUP.
|
||||
-m MODE $chmodprog installed files to MODE.
|
||||
-o USER $chownprog installed files to USER.
|
||||
-s $stripprog installed files.
|
||||
-t DIRECTORY install into DIRECTORY.
|
||||
-T report an error if DSTFILE is a directory.
|
||||
--help display this help and exit.
|
||||
--version display version info and exit.
|
||||
|
||||
Environment variables override the default commands:
|
||||
CHGRPPROG CHMODPROG CHOWNPROG CPPROG MKDIRPROG MVPROG RMPROG STRIPPROG
|
||||
"
|
||||
|
||||
while test -n "$1"; do
|
||||
case $1 in
|
||||
-c) shift
|
||||
continue;;
|
||||
|
||||
-d) dir_arg=true
|
||||
shift
|
||||
continue;;
|
||||
|
||||
-g) chgrpcmd="$chgrpprog $2"
|
||||
shift
|
||||
shift
|
||||
continue;;
|
||||
|
||||
--help) echo "$usage"; exit $?;;
|
||||
|
||||
-m) chmodcmd="$chmodprog $2"
|
||||
shift
|
||||
shift
|
||||
continue;;
|
||||
|
||||
-o) chowncmd="$chownprog $2"
|
||||
shift
|
||||
shift
|
||||
continue;;
|
||||
|
||||
-s) stripcmd=$stripprog
|
||||
shift
|
||||
continue;;
|
||||
|
||||
-t) dstarg=$2
|
||||
shift
|
||||
shift
|
||||
continue;;
|
||||
|
||||
-T) no_target_directory=true
|
||||
shift
|
||||
continue;;
|
||||
|
||||
--version) echo "$0 $scriptversion"; exit $?;;
|
||||
|
||||
*) # When -d is used, all remaining arguments are directories to create.
|
||||
# When -t is used, the destination is already specified.
|
||||
test -n "$dir_arg$dstarg" && break
|
||||
# Otherwise, the last argument is the destination. Remove it from $@.
|
||||
for arg
|
||||
do
|
||||
if test -n "$dstarg"; then
|
||||
# $@ is not empty: it contains at least $arg.
|
||||
set fnord "$@" "$dstarg"
|
||||
shift # fnord
|
||||
fi
|
||||
shift # arg
|
||||
dstarg=$arg
|
||||
done
|
||||
break;;
|
||||
esac
|
||||
done
|
||||
|
||||
if test -z "$1"; then
|
||||
if test -z "$dir_arg"; then
|
||||
echo "$0: no input file specified." >&2
|
||||
exit 1
|
||||
fi
|
||||
# It's OK to call `install-sh -d' without argument.
|
||||
# This can happen when creating conditional directories.
|
||||
exit 0
|
||||
fi
|
||||
|
||||
for src
|
||||
do
|
||||
# Protect names starting with `-'.
|
||||
case $src in
|
||||
-*) src=./$src ;;
|
||||
esac
|
||||
|
||||
if test -n "$dir_arg"; then
|
||||
dst=$src
|
||||
src=
|
||||
|
||||
if test -d "$dst"; then
|
||||
mkdircmd=:
|
||||
chmodcmd=
|
||||
else
|
||||
mkdircmd=$mkdirprog
|
||||
fi
|
||||
else
|
||||
# Waiting for this to be detected by the "$cpprog $src $dsttmp" command
|
||||
# might cause directories to be created, which would be especially bad
|
||||
# if $src (and thus $dsttmp) contains '*'.
|
||||
if test ! -f "$src" && test ! -d "$src"; then
|
||||
echo "$0: $src does not exist." >&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if test -z "$dstarg"; then
|
||||
echo "$0: no destination specified." >&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
dst=$dstarg
|
||||
# Protect names starting with `-'.
|
||||
case $dst in
|
||||
-*) dst=./$dst ;;
|
||||
esac
|
||||
|
||||
# If destination is a directory, append the input filename; won't work
|
||||
# if double slashes aren't ignored.
|
||||
if test -d "$dst"; then
|
||||
if test -n "$no_target_directory"; then
|
||||
echo "$0: $dstarg: Is a directory" >&2
|
||||
exit 1
|
||||
fi
|
||||
dst=$dst/`basename "$src"`
|
||||
fi
|
||||
fi
|
||||
|
||||
# This sed command emulates the dirname command.
|
||||
dstdir=`echo "$dst" | sed -e 's,/*$,,;s,[^/]*$,,;s,/*$,,;s,^$,.,'`
|
||||
|
||||
# Make sure that the destination directory exists.
|
||||
|
||||
# Skip lots of stat calls in the usual case.
|
||||
if test ! -d "$dstdir"; then
|
||||
defaultIFS='
|
||||
'
|
||||
IFS="${IFS-$defaultIFS}"
|
||||
|
||||
oIFS=$IFS
|
||||
# Some sh's can't handle IFS=/ for some reason.
|
||||
IFS='%'
|
||||
set x `echo "$dstdir" | sed -e 's@/@%@g' -e 's@^%@/@'`
|
||||
shift
|
||||
IFS=$oIFS
|
||||
|
||||
pathcomp=
|
||||
|
||||
while test $# -ne 0 ; do
|
||||
pathcomp=$pathcomp$1
|
||||
shift
|
||||
if test ! -d "$pathcomp"; then
|
||||
$mkdirprog "$pathcomp"
|
||||
# mkdir can fail with a `File exist' error in case several
|
||||
# install-sh are creating the directory concurrently. This
|
||||
# is OK.
|
||||
test -d "$pathcomp" || exit
|
||||
fi
|
||||
pathcomp=$pathcomp/
|
||||
done
|
||||
fi
|
||||
|
||||
if test -n "$dir_arg"; then
|
||||
$doit $mkdircmd "$dst" \
|
||||
&& { test -z "$chowncmd" || $doit $chowncmd "$dst"; } \
|
||||
&& { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } \
|
||||
&& { test -z "$stripcmd" || $doit $stripcmd "$dst"; } \
|
||||
&& { test -z "$chmodcmd" || $doit $chmodcmd "$dst"; }
|
||||
|
||||
else
|
||||
dstfile=`basename "$dst"`
|
||||
|
||||
# Make a couple of temp file names in the proper directory.
|
||||
dsttmp=$dstdir/_inst.$$_
|
||||
rmtmp=$dstdir/_rm.$$_
|
||||
|
||||
# Trap to clean up those temp files at exit.
|
||||
trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0
|
||||
trap '(exit $?); exit' 1 2 13 15
|
||||
|
||||
# Copy the file name to the temp name.
|
||||
$doit $cpprog "$src" "$dsttmp" &&
|
||||
|
||||
# and set any options; do chmod last to preserve setuid bits.
|
||||
#
|
||||
# If any of these fail, we abort the whole thing. If we want to
|
||||
# ignore errors from any of these, just make sure not to ignore
|
||||
# errors from the above "$doit $cpprog $src $dsttmp" command.
|
||||
#
|
||||
{ test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } \
|
||||
&& { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } \
|
||||
&& { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } \
|
||||
&& { test -z "$chmodcmd" || $doit $chmodcmd "$dsttmp"; } &&
|
||||
|
||||
# Now rename the file to the real destination.
|
||||
{ $doit $mvcmd -f "$dsttmp" "$dstdir/$dstfile" 2>/dev/null \
|
||||
|| {
|
||||
# The rename failed, perhaps because mv can't rename something else
|
||||
# to itself, or perhaps because mv is so ancient that it does not
|
||||
# support -f.
|
||||
|
||||
# Now remove or move aside any old file at destination location.
|
||||
# We try this two ways since rm can't unlink itself on some
|
||||
# systems and the destination file might be busy for other
|
||||
# reasons. In this case, the final cleanup might fail but the new
|
||||
# file should still install successfully.
|
||||
{
|
||||
if test -f "$dstdir/$dstfile"; then
|
||||
$doit $rmcmd -f "$dstdir/$dstfile" 2>/dev/null \
|
||||
|| $doit $mvcmd -f "$dstdir/$dstfile" "$rmtmp" 2>/dev/null \
|
||||
|| {
|
||||
echo "$0: cannot unlink or rename $dstdir/$dstfile" >&2
|
||||
(exit 1); exit 1
|
||||
}
|
||||
else
|
||||
:
|
||||
fi
|
||||
} &&
|
||||
|
||||
# Now rename the file to the real destination.
|
||||
$doit $mvcmd "$dsttmp" "$dstdir/$dstfile"
|
||||
}
|
||||
}
|
||||
fi || { (exit 1); exit 1; }
|
||||
done
|
||||
|
||||
# The final little trick to "correctly" pass the exit status to the exit trap.
|
||||
{
|
||||
(exit 0); exit 0
|
||||
}
|
||||
|
||||
# Local variables:
|
||||
# eval: (add-hook 'write-file-hooks 'time-stamp)
|
||||
# time-stamp-start: "scriptversion="
|
||||
# time-stamp-format: "%:y-%02m-%02d.%02H"
|
||||
# time-stamp-end: "$"
|
||||
# End:
|
||||
@@ -1,158 +0,0 @@
|
||||
#! /bin/sh
|
||||
# mkinstalldirs --- make directory hierarchy
|
||||
|
||||
scriptversion=2005-06-29.22
|
||||
|
||||
# Original author: Noah Friedman <friedman@prep.ai.mit.edu>
|
||||
# Created: 1993-05-16
|
||||
# Public domain.
|
||||
#
|
||||
# This file is maintained in Automake, please report
|
||||
# bugs to <bug-automake@gnu.org> or send patches to
|
||||
# <automake-patches@gnu.org>.
|
||||
|
||||
errstatus=0
|
||||
dirmode=
|
||||
|
||||
usage="\
|
||||
Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ...
|
||||
|
||||
Create each directory DIR (with mode MODE, if specified), including all
|
||||
leading file name components.
|
||||
|
||||
Report bugs to <bug-automake@gnu.org>."
|
||||
|
||||
# process command line arguments
|
||||
while test $# -gt 0 ; do
|
||||
case $1 in
|
||||
-h | --help | --h*) # -h for help
|
||||
echo "$usage"
|
||||
exit $?
|
||||
;;
|
||||
-m) # -m PERM arg
|
||||
shift
|
||||
test $# -eq 0 && { echo "$usage" 1>&2; exit 1; }
|
||||
dirmode=$1
|
||||
shift
|
||||
;;
|
||||
--version)
|
||||
echo "$0 $scriptversion"
|
||||
exit $?
|
||||
;;
|
||||
--) # stop option processing
|
||||
shift
|
||||
break
|
||||
;;
|
||||
-*) # unknown option
|
||||
echo "$usage" 1>&2
|
||||
exit 1
|
||||
;;
|
||||
*) # first non-opt arg
|
||||
break
|
||||
;;
|
||||
esac
|
||||
done
|
||||
|
||||
for file
|
||||
do
|
||||
if test -d "$file"; then
|
||||
shift
|
||||
else
|
||||
break
|
||||
fi
|
||||
done
|
||||
|
||||
case $# in
|
||||
0) exit 0 ;;
|
||||
esac
|
||||
|
||||
# Solaris 8's mkdir -p isn't thread-safe. If you mkdir -p a/b and
|
||||
# mkdir -p a/c at the same time, both will detect that a is missing,
|
||||
# one will create a, then the other will try to create a and die with
|
||||
# a "File exists" error. This is a problem when calling mkinstalldirs
|
||||
# from a parallel make. We use --version in the probe to restrict
|
||||
# ourselves to GNU mkdir, which is thread-safe.
|
||||
case $dirmode in
|
||||
'')
|
||||
if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then
|
||||
echo "mkdir -p -- $*"
|
||||
exec mkdir -p -- "$@"
|
||||
else
|
||||
# On NextStep and OpenStep, the `mkdir' command does not
|
||||
# recognize any option. It will interpret all options as
|
||||
# directories to create, and then abort because `.' already
|
||||
# exists.
|
||||
test -d ./-p && rmdir ./-p
|
||||
test -d ./--version && rmdir ./--version
|
||||
fi
|
||||
;;
|
||||
*)
|
||||
if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 &&
|
||||
test ! -d ./--version; then
|
||||
echo "mkdir -m $dirmode -p -- $*"
|
||||
exec mkdir -m "$dirmode" -p -- "$@"
|
||||
else
|
||||
# Clean up after NextStep and OpenStep mkdir.
|
||||
for d in ./-m ./-p ./--version "./$dirmode";
|
||||
do
|
||||
test -d $d && rmdir $d
|
||||
done
|
||||
fi
|
||||
;;
|
||||
esac
|
||||
|
||||
for file
|
||||
do
|
||||
case $file in
|
||||
/*) pathcomp=/ ;;
|
||||
*) pathcomp= ;;
|
||||
esac
|
||||
oIFS=$IFS
|
||||
IFS=/
|
||||
set fnord $file
|
||||
shift
|
||||
IFS=$oIFS
|
||||
|
||||
for d
|
||||
do
|
||||
test "x$d" = x && continue
|
||||
|
||||
pathcomp=$pathcomp$d
|
||||
case $pathcomp in
|
||||
-*) pathcomp=./$pathcomp ;;
|
||||
esac
|
||||
|
||||
if test ! -d "$pathcomp"; then
|
||||
echo "mkdir $pathcomp"
|
||||
|
||||
mkdir "$pathcomp" || lasterr=$?
|
||||
|
||||
if test ! -d "$pathcomp"; then
|
||||
errstatus=$lasterr
|
||||
else
|
||||
if test ! -z "$dirmode"; then
|
||||
echo "chmod $dirmode $pathcomp"
|
||||
lasterr=
|
||||
chmod "$dirmode" "$pathcomp" || lasterr=$?
|
||||
|
||||
if test ! -z "$lasterr"; then
|
||||
errstatus=$lasterr
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
pathcomp=$pathcomp/
|
||||
done
|
||||
done
|
||||
|
||||
exit $errstatus
|
||||
|
||||
# Local Variables:
|
||||
# mode: shell-script
|
||||
# sh-indentation: 2
|
||||
# eval: (add-hook 'write-file-hooks 'time-stamp)
|
||||
# time-stamp-start: "scriptversion="
|
||||
# time-stamp-format: "%:y-%02m-%02d.%02H"
|
||||
# time-stamp-end: "$"
|
||||
# End:
|
||||
@@ -1,5 +0,0 @@
|
||||
INCLUDES = -I../
|
||||
noinst_LIBRARIES = libtinyxml.a
|
||||
|
||||
libtinyxml_a_SOURCES = \
|
||||
tinystr.h tinyxml.h tinystr.cpp tinyxml.cpp tinyxmlerror.cpp tinyxmlparser.cpp
|
||||
@@ -1,23 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
* Original code (2.0 and earlier )copyright (c) 2000-2002 Lee Thomason (www.grinninglizard.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <windows.h>
|
||||
#include <winuser.h>
|
||||
|
||||
#define IDC_STATIC (-1)
|
||||
@@ -1,348 +0,0 @@
|
||||
# Project: pcsx2
|
||||
# Makefile created by Dev-C++ 4.9.9.2
|
||||
|
||||
CPP = mingw32-g++.exe
|
||||
CC = mingw32-gcc.exe
|
||||
WINDRES = windres.exe
|
||||
RES = Obj//pcsx2_private.res
|
||||
OBJ = Obj//AboutDlg.o Obj//ConfigDlg.o Obj//CpuDlg.o Obj//Debugger.o Obj//DebugMemory.o Obj//Debugreg.o Obj//ini.o Obj//McdsDlg.o Obj//PatchBrowser.o Obj//RDebugger.o Obj//WinMain.o Obj//Idct.o Obj//IPU.o Obj//Mpeg.o Obj//yuv2rgb.o Obj//cpuopsDebug.o Obj//DisR3000A.o Obj//DisR3000asm.o Obj//DisR5900.o Obj//DisR5900asm.o Obj//DisVU0Micro.o Obj//DisVU1Micro.o Obj//adler32.o Obj//compress.o Obj//crc32.o Obj//deflate.o Obj//gzio.o Obj//infback.o Obj//inffast.o Obj//inflate.o Obj//inftrees.o Obj//trees.o Obj//uncompr.o Obj//zutil.o Obj//iR5900Arit.o Obj//iR5900AritImm.o Obj//iR5900Branch.o Obj//iR5900Jump.o Obj//iR5900LoadStore.o Obj//iR5900Move.o Obj//iR5900MultDiv.o Obj//iR5900Shift.o Obj//iCP0.o Obj//iFPU.o Obj//iMMI.o Obj//iR3000A.o Obj//iR5900.o Obj//iVU0micro.o Obj//iVU1micro.o Obj//iVUmicro.o Obj//recCOP2.o Obj//ix86.o Obj//ix86_3dnow.o Obj//ix86_cpudetect.o Obj//ix86_fpu.o Obj//ix86_mmx.o Obj//ix86_sse.o Obj//CDVD.o Obj//CDVDiso.o Obj//CDVDisodrv.o Obj//COP0.o Obj//Counters.o Obj//Decode_XA.o Obj//Elfheader.o Obj//FiFo.o Obj//FPU.o Obj//GS.o Obj//Gte.o Obj//Hw.o Obj//Interpreter.o Obj//InterTables.o Obj//Mdec.o Obj//Memory.o Obj//Misc.o Obj//MMI.o Obj//Patch.o Obj//Plugins.o Obj//PsxBios.o Obj//PsxCounters.o Obj//PsxDma.o Obj//PsxGPU.o Obj//PsxHw.o Obj//PsxInterpreter.o Obj//PsxMem.o Obj//PsxSio2.o Obj//R3000A.o Obj//R5900.o Obj//Sif.o Obj//Sio.o Obj//SPR.o Obj//Stats.o Obj//Vif.o Obj//VifDma.o Obj//VU0.o Obj//VU0micro.o Obj//VU1micro.o Obj//VUflags.o Obj//VUops.o Obj//Cache.o Obj//CdRom.o Obj//deci2.o Obj//deci2_dbgp.o Obj//deci2_dcmp.o Obj//deci2_iloadp.o Obj//deci2_netmp.o Obj//deci2_ttyp.o $(RES)
|
||||
LINKOBJ = Obj//AboutDlg.o Obj//ConfigDlg.o Obj//CpuDlg.o Obj//Debugger.o Obj//DebugMemory.o Obj//Debugreg.o Obj//ini.o Obj//McdsDlg.o Obj//PatchBrowser.o Obj//RDebugger.o Obj//WinMain.o Obj//Idct.o Obj//IPU.o Obj//Mpeg.o Obj//yuv2rgb.o Obj//cpuopsDebug.o Obj//DisR3000A.o Obj//DisR3000asm.o Obj//DisR5900.o Obj//DisR5900asm.o Obj//DisVU0Micro.o Obj//DisVU1Micro.o Obj//adler32.o Obj//compress.o Obj//crc32.o Obj//deflate.o Obj//gzio.o Obj//infback.o Obj//inffast.o Obj//inflate.o Obj//inftrees.o Obj//trees.o Obj//uncompr.o Obj//zutil.o Obj//iR5900Arit.o Obj//iR5900AritImm.o Obj//iR5900Branch.o Obj//iR5900Jump.o Obj//iR5900LoadStore.o Obj//iR5900Move.o Obj//iR5900MultDiv.o Obj//iR5900Shift.o Obj//iCP0.o Obj//iFPU.o Obj//iMMI.o Obj//iR3000A.o Obj//iR5900.o Obj//iVU0micro.o Obj//iVU1micro.o Obj//iVUmicro.o Obj//recCOP2.o Obj//ix86.o Obj//ix86_3dnow.o Obj//ix86_cpudetect.o Obj//ix86_fpu.o Obj//ix86_mmx.o Obj//ix86_sse.o Obj//CDVD.o Obj//CDVDiso.o Obj//CDVDisodrv.o Obj//COP0.o Obj//Counters.o Obj//Decode_XA.o Obj//Elfheader.o Obj//FiFo.o Obj//FPU.o Obj//GS.o Obj//Gte.o Obj//Hw.o Obj//Interpreter.o Obj//InterTables.o Obj//Mdec.o Obj//Memory.o Obj//Misc.o Obj//MMI.o Obj//Patch.o Obj//Plugins.o Obj//PsxBios.o Obj//PsxCounters.o Obj//PsxDma.o Obj//PsxGPU.o Obj//PsxHw.o Obj//PsxInterpreter.o Obj//PsxMem.o Obj//PsxSio2.o Obj//R3000A.o Obj//R5900.o Obj//Sif.o Obj//Sio.o Obj//SPR.o Obj//Stats.o Obj//Vif.o Obj//VifDma.o Obj//VU0.o Obj//VU0micro.o Obj//VU1micro.o Obj//VUflags.o Obj//VUops.o Obj//Cache.o Obj//CdRom.o Obj//deci2.o Obj//deci2_dbgp.o Obj//deci2_dcmp.o Obj//deci2_iloadp.o Obj//deci2_netmp.o Obj//deci2_ttyp.o $(RES)
|
||||
LIBS = -mwindows -Wall -lcomctl32 -lwsock32 -lwinmm -lgdi32 -lcomdlg32 -s
|
||||
INCS = -I"../../" -I"C:/Documents and Settings/shadow/Desktop/Npcsx2" -I"../../" -I"../../zlib" -I"../../DebugTools" -I"../../IPU" -I"../../x86" -I"../../ix86-32" -I"../"
|
||||
CXXINCS = -I"../../" -I"../../zlib" -I"../../DebugTools" -I"../../IPU" -I"../../x86" -I"../../ix86-32" -I"../"
|
||||
BIN = pcsx2.exe
|
||||
CXXFLAGS = $(CXXINCS)
|
||||
CFLAGS = $(INCS) -D__WIN32__ -D__MINGW32__ -O3 -fomit-frame-pointer -finline-functions -fno-exceptions -ffast-math -fno-strict-aliasing -m128bit-long-double -mfpmath=sse -march=athlon64
|
||||
RM = rm -f
|
||||
|
||||
.PHONY: all all-before all-after clean clean-custom
|
||||
|
||||
all: all-before pcsx2.exe all-after
|
||||
|
||||
|
||||
clean: clean-custom
|
||||
${RM} $(OBJ) $(BIN)
|
||||
|
||||
$(BIN): $(OBJ)
|
||||
$(CC) $(LINKOBJ) -o "pcsx2.exe" $(LIBS)
|
||||
|
||||
Obj//AboutDlg.o: ../AboutDlg.c
|
||||
$(CC) -c ../AboutDlg.c -o Obj//AboutDlg.o $(CFLAGS)
|
||||
|
||||
Obj//ConfigDlg.o: ../ConfigDlg.c
|
||||
$(CC) -c ../ConfigDlg.c -o Obj//ConfigDlg.o $(CFLAGS)
|
||||
|
||||
Obj//CpuDlg.o: ../CpuDlg.c
|
||||
$(CC) -c ../CpuDlg.c -o Obj//CpuDlg.o $(CFLAGS)
|
||||
|
||||
Obj//Debugger.o: ../Debugger.c
|
||||
$(CC) -c ../Debugger.c -o Obj//Debugger.o $(CFLAGS)
|
||||
|
||||
Obj//DebugMemory.o: ../DebugMemory.c
|
||||
$(CC) -c ../DebugMemory.c -o Obj//DebugMemory.o $(CFLAGS)
|
||||
|
||||
Obj//Debugreg.o: ../Debugreg.c
|
||||
$(CC) -c ../Debugreg.c -o Obj//Debugreg.o $(CFLAGS)
|
||||
|
||||
Obj//ini.o: ../ini.c
|
||||
$(CC) -c ../ini.c -o Obj//ini.o $(CFLAGS)
|
||||
|
||||
Obj//McdsDlg.o: ../McdsDlg.c
|
||||
$(CC) -c ../McdsDlg.c -o Obj//McdsDlg.o $(CFLAGS)
|
||||
|
||||
Obj//PatchBrowser.o: ../PatchBrowser.c
|
||||
$(CC) -c ../PatchBrowser.c -o Obj//PatchBrowser.o $(CFLAGS)
|
||||
|
||||
Obj//RDebugger.o: ../RDebugger.c
|
||||
$(CC) -c ../RDebugger.c -o Obj//RDebugger.o $(CFLAGS)
|
||||
|
||||
Obj//WinMain.o: ../WinMain.c
|
||||
$(CC) -c ../WinMain.c -o Obj//WinMain.o $(CFLAGS)
|
||||
|
||||
Obj//Idct.o: ../../IPU/Idct.c
|
||||
$(CC) -c ../../IPU/Idct.c -o Obj//Idct.o $(CFLAGS)
|
||||
|
||||
Obj//IPU.o: ../../IPU/IPU.c
|
||||
$(CC) -c ../../IPU/IPU.c -o Obj//IPU.o $(CFLAGS)
|
||||
|
||||
Obj//Mpeg.o: ../../IPU/Mpeg.c
|
||||
$(CC) -c ../../IPU/Mpeg.c -o Obj//Mpeg.o $(CFLAGS)
|
||||
|
||||
Obj//yuv2rgb.o: ../../IPU/yuv2rgb.c
|
||||
$(CC) -c ../../IPU/yuv2rgb.c -o Obj//yuv2rgb.o $(CFLAGS)
|
||||
|
||||
Obj//cpuopsDebug.o: ../../DebugTools/cpuopsDebug.c
|
||||
$(CC) -c ../../DebugTools/cpuopsDebug.c -o Obj//cpuopsDebug.o $(CFLAGS)
|
||||
|
||||
Obj//DisR3000A.o: ../../DebugTools/DisR3000A.c
|
||||
$(CC) -c ../../DebugTools/DisR3000A.c -o Obj//DisR3000A.o $(CFLAGS)
|
||||
|
||||
Obj//DisR3000asm.o: ../../DebugTools/DisR3000asm.c
|
||||
$(CC) -c ../../DebugTools/DisR3000asm.c -o Obj//DisR3000asm.o $(CFLAGS)
|
||||
|
||||
Obj//DisR5900.o: ../../DebugTools/DisR5900.c
|
||||
$(CC) -c ../../DebugTools/DisR5900.c -o Obj//DisR5900.o $(CFLAGS)
|
||||
|
||||
Obj//DisR5900asm.o: ../../DebugTools/DisR5900asm.c
|
||||
$(CC) -c ../../DebugTools/DisR5900asm.c -o Obj//DisR5900asm.o $(CFLAGS)
|
||||
|
||||
Obj//DisVU0Micro.o: ../../DebugTools/DisVU0Micro.c
|
||||
$(CC) -c ../../DebugTools/DisVU0Micro.c -o Obj//DisVU0Micro.o $(CFLAGS)
|
||||
|
||||
Obj//DisVU1Micro.o: ../../DebugTools/DisVU1Micro.c
|
||||
$(CC) -c ../../DebugTools/DisVU1Micro.c -o Obj//DisVU1Micro.o $(CFLAGS)
|
||||
|
||||
Obj//adler32.o: ../../zlib/adler32.c
|
||||
$(CC) -c ../../zlib/adler32.c -o Obj//adler32.o $(CFLAGS)
|
||||
|
||||
Obj//compress.o: ../../zlib/compress.c
|
||||
$(CC) -c ../../zlib/compress.c -o Obj//compress.o $(CFLAGS)
|
||||
|
||||
Obj//crc32.o: ../../zlib/crc32.c
|
||||
$(CC) -c ../../zlib/crc32.c -o Obj//crc32.o $(CFLAGS)
|
||||
|
||||
Obj//deflate.o: ../../zlib/deflate.c
|
||||
$(CC) -c ../../zlib/deflate.c -o Obj//deflate.o $(CFLAGS)
|
||||
|
||||
Obj//gzio.o: ../../zlib/gzio.c
|
||||
$(CC) -c ../../zlib/gzio.c -o Obj//gzio.o $(CFLAGS)
|
||||
|
||||
Obj//infback.o: ../../zlib/infback.c
|
||||
$(CC) -c ../../zlib/infback.c -o Obj//infback.o $(CFLAGS)
|
||||
|
||||
Obj//inffast.o: ../../zlib/inffast.c
|
||||
$(CC) -c ../../zlib/inffast.c -o Obj//inffast.o $(CFLAGS)
|
||||
|
||||
Obj//inflate.o: ../../zlib/inflate.c
|
||||
$(CC) -c ../../zlib/inflate.c -o Obj//inflate.o $(CFLAGS)
|
||||
|
||||
Obj//inftrees.o: ../../zlib/inftrees.c
|
||||
$(CC) -c ../../zlib/inftrees.c -o Obj//inftrees.o $(CFLAGS)
|
||||
|
||||
Obj//trees.o: ../../zlib/trees.c
|
||||
$(CC) -c ../../zlib/trees.c -o Obj//trees.o $(CFLAGS)
|
||||
|
||||
Obj//uncompr.o: ../../zlib/uncompr.c
|
||||
$(CC) -c ../../zlib/uncompr.c -o Obj//uncompr.o $(CFLAGS)
|
||||
|
||||
Obj//zutil.o: ../../zlib/zutil.c
|
||||
$(CC) -c ../../zlib/zutil.c -o Obj//zutil.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900Arit.o: ../../ix86-32/iR5900Arit.c
|
||||
$(CC) -c ../../ix86-32/iR5900Arit.c -o Obj//iR5900Arit.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900AritImm.o: ../../ix86-32/iR5900AritImm.c
|
||||
$(CC) -c ../../ix86-32/iR5900AritImm.c -o Obj//iR5900AritImm.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900Branch.o: ../../ix86-32/iR5900Branch.c
|
||||
$(CC) -c ../../ix86-32/iR5900Branch.c -o Obj//iR5900Branch.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900Jump.o: ../../ix86-32/iR5900Jump.c
|
||||
$(CC) -c ../../ix86-32/iR5900Jump.c -o Obj//iR5900Jump.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900LoadStore.o: ../../ix86-32/iR5900LoadStore.c
|
||||
$(CC) -c ../../ix86-32/iR5900LoadStore.c -o Obj//iR5900LoadStore.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900Move.o: ../../ix86-32/iR5900Move.c
|
||||
$(CC) -c ../../ix86-32/iR5900Move.c -o Obj//iR5900Move.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900MultDiv.o: ../../ix86-32/iR5900MultDiv.c
|
||||
$(CC) -c ../../ix86-32/iR5900MultDiv.c -o Obj//iR5900MultDiv.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900Shift.o: ../../ix86-32/iR5900Shift.c
|
||||
$(CC) -c ../../ix86-32/iR5900Shift.c -o Obj//iR5900Shift.o $(CFLAGS)
|
||||
|
||||
Obj//iCP0.o: ../../x86/iCP0.c
|
||||
$(CC) -c ../../x86/iCP0.c -o Obj//iCP0.o $(CFLAGS)
|
||||
|
||||
Obj//iFPU.o: ../../x86/iFPU.c
|
||||
$(CC) -c ../../x86/iFPU.c -o Obj//iFPU.o $(CFLAGS)
|
||||
|
||||
Obj//iMMI.o: ../../x86/iMMI.c
|
||||
$(CC) -c ../../x86/iMMI.c -o Obj//iMMI.o $(CFLAGS)
|
||||
|
||||
Obj//iR3000A.o: ../../x86/iR3000A.c
|
||||
$(CC) -c ../../x86/iR3000A.c -o Obj//iR3000A.o $(CFLAGS)
|
||||
|
||||
Obj//iR5900.o: ../../x86/iR5900.c
|
||||
$(CC) -c ../../x86/iR5900.c -o Obj//iR5900.o $(CFLAGS)
|
||||
|
||||
Obj//iVU0micro.o: ../../x86/iVU0micro.c
|
||||
$(CC) -c ../../x86/iVU0micro.c -o Obj//iVU0micro.o $(CFLAGS)
|
||||
|
||||
Obj//iVU1micro.o: ../../x86/iVU1micro.c
|
||||
$(CC) -c ../../x86/iVU1micro.c -o Obj//iVU1micro.o $(CFLAGS)
|
||||
|
||||
Obj//iVUmicro.o: ../../x86/iVUmicro.c
|
||||
$(CC) -c ../../x86/iVUmicro.c -o Obj//iVUmicro.o $(CFLAGS)
|
||||
|
||||
Obj//recCOP2.o: ../../x86/recCOP2.c
|
||||
$(CC) -c ../../x86/recCOP2.c -o Obj//recCOP2.o $(CFLAGS)
|
||||
|
||||
Obj//ix86.o: ../../x86/ix86/ix86.c
|
||||
$(CC) -c ../../x86/ix86/ix86.c -o Obj//ix86.o $(CFLAGS)
|
||||
|
||||
Obj//ix86_3dnow.o: ../../x86/ix86/ix86_3dnow.c
|
||||
$(CC) -c ../../x86/ix86/ix86_3dnow.c -o Obj//ix86_3dnow.o $(CFLAGS)
|
||||
|
||||
Obj//ix86_cpudetect.o: ../../x86/ix86/ix86_cpudetect.c
|
||||
$(CC) -c ../../x86/ix86/ix86_cpudetect.c -o Obj//ix86_cpudetect.o $(CFLAGS)
|
||||
|
||||
Obj//ix86_fpu.o: ../../x86/ix86/ix86_fpu.c
|
||||
$(CC) -c ../../x86/ix86/ix86_fpu.c -o Obj//ix86_fpu.o $(CFLAGS)
|
||||
|
||||
Obj//ix86_mmx.o: ../../x86/ix86/ix86_mmx.c
|
||||
$(CC) -c ../../x86/ix86/ix86_mmx.c -o Obj//ix86_mmx.o $(CFLAGS)
|
||||
|
||||
Obj//ix86_sse.o: ../../x86/ix86/ix86_sse.c
|
||||
$(CC) -c ../../x86/ix86/ix86_sse.c -o Obj//ix86_sse.o $(CFLAGS)
|
||||
|
||||
Obj//CDVD.o: ../../CDVD.c
|
||||
$(CC) -c ../../CDVD.c -o Obj//CDVD.o $(CFLAGS)
|
||||
|
||||
Obj//CDVDiso.o: ../../CDVDiso.c
|
||||
$(CC) -c ../../CDVDiso.c -o Obj//CDVDiso.o $(CFLAGS)
|
||||
|
||||
Obj//CDVDisodrv.o: ../../CDVDisodrv.c
|
||||
$(CC) -c ../../CDVDisodrv.c -o Obj//CDVDisodrv.o $(CFLAGS)
|
||||
|
||||
Obj//COP0.o: ../../COP0.c
|
||||
$(CC) -c ../../COP0.c -o Obj//COP0.o $(CFLAGS)
|
||||
|
||||
Obj//Counters.o: ../../Counters.c
|
||||
$(CC) -c ../../Counters.c -o Obj//Counters.o $(CFLAGS)
|
||||
|
||||
Obj//Decode_XA.o: ../../Decode_XA.c
|
||||
$(CC) -c ../../Decode_XA.c -o Obj//Decode_XA.o $(CFLAGS)
|
||||
|
||||
Obj//Elfheader.o: ../../Elfheader.c
|
||||
$(CC) -c ../../Elfheader.c -o Obj//Elfheader.o $(CFLAGS)
|
||||
|
||||
Obj//FiFo.o: ../../FiFo.c
|
||||
$(CC) -c ../../FiFo.c -o Obj//FiFo.o $(CFLAGS)
|
||||
|
||||
Obj//FPU.o: ../../FPU.c
|
||||
$(CC) -c ../../FPU.c -o Obj//FPU.o $(CFLAGS)
|
||||
|
||||
Obj//GS.o: ../../GS.c
|
||||
$(CC) -c ../../GS.c -o Obj//GS.o $(CFLAGS)
|
||||
|
||||
Obj//Gte.o: ../../Gte.c
|
||||
$(CC) -c ../../Gte.c -o Obj//Gte.o $(CFLAGS)
|
||||
|
||||
Obj//Hw.o: ../../Hw.c
|
||||
$(CC) -c ../../Hw.c -o Obj//Hw.o $(CFLAGS)
|
||||
|
||||
Obj//Interpreter.o: ../../Interpreter.c
|
||||
$(CC) -c ../../Interpreter.c -o Obj//Interpreter.o $(CFLAGS)
|
||||
|
||||
Obj//InterTables.o: ../../InterTables.c
|
||||
$(CC) -c ../../InterTables.c -o Obj//InterTables.o $(CFLAGS)
|
||||
|
||||
Obj//Mdec.o: ../../Mdec.c
|
||||
$(CC) -c ../../Mdec.c -o Obj//Mdec.o $(CFLAGS)
|
||||
|
||||
Obj//Memory.o: ../../Memory.c
|
||||
$(CC) -c ../../Memory.c -o Obj//Memory.o $(CFLAGS)
|
||||
|
||||
Obj//Misc.o: ../../Misc.c
|
||||
$(CC) -c ../../Misc.c -o Obj//Misc.o $(CFLAGS)
|
||||
|
||||
Obj//MMI.o: ../../MMI.c
|
||||
$(CC) -c ../../MMI.c -o Obj//MMI.o $(CFLAGS)
|
||||
|
||||
Obj//Patch.o: ../../Patch.c
|
||||
$(CC) -c ../../Patch.c -o Obj//Patch.o $(CFLAGS)
|
||||
|
||||
Obj//Plugins.o: ../../Plugins.c
|
||||
$(CC) -c ../../Plugins.c -o Obj//Plugins.o $(CFLAGS)
|
||||
|
||||
Obj//PsxBios.o: ../../PsxBios.c
|
||||
$(CC) -c ../../PsxBios.c -o Obj//PsxBios.o $(CFLAGS)
|
||||
|
||||
Obj//PsxCounters.o: ../../PsxCounters.c
|
||||
$(CC) -c ../../PsxCounters.c -o Obj//PsxCounters.o $(CFLAGS)
|
||||
|
||||
Obj//PsxDma.o: ../../PsxDma.c
|
||||
$(CC) -c ../../PsxDma.c -o Obj//PsxDma.o $(CFLAGS)
|
||||
|
||||
Obj//PsxGPU.o: ../../PsxGPU.c
|
||||
$(CC) -c ../../PsxGPU.c -o Obj//PsxGPU.o $(CFLAGS)
|
||||
|
||||
Obj//PsxHw.o: ../../PsxHw.c
|
||||
$(CC) -c ../../PsxHw.c -o Obj//PsxHw.o $(CFLAGS)
|
||||
|
||||
Obj//PsxInterpreter.o: ../../PsxInterpreter.c
|
||||
$(CC) -c ../../PsxInterpreter.c -o Obj//PsxInterpreter.o $(CFLAGS)
|
||||
|
||||
Obj//PsxMem.o: ../../PsxMem.c
|
||||
$(CC) -c ../../PsxMem.c -o Obj//PsxMem.o $(CFLAGS)
|
||||
|
||||
Obj//PsxSio2.o: ../../PsxSio2.c
|
||||
$(CC) -c ../../PsxSio2.c -o Obj//PsxSio2.o $(CFLAGS)
|
||||
|
||||
Obj//R3000A.o: ../../R3000A.c
|
||||
$(CC) -c ../../R3000A.c -o Obj//R3000A.o $(CFLAGS)
|
||||
|
||||
Obj//R5900.o: ../../R5900.c
|
||||
$(CC) -c ../../R5900.c -o Obj//R5900.o $(CFLAGS)
|
||||
|
||||
Obj//Sif.o: ../../Sif.c
|
||||
$(CC) -c ../../Sif.c -o Obj//Sif.o $(CFLAGS)
|
||||
|
||||
Obj//Sio.o: ../../Sio.c
|
||||
$(CC) -c ../../Sio.c -o Obj//Sio.o $(CFLAGS)
|
||||
|
||||
Obj//SPR.o: ../../SPR.c
|
||||
$(CC) -c ../../SPR.c -o Obj//SPR.o $(CFLAGS)
|
||||
|
||||
Obj//Stats.o: ../../Stats.c
|
||||
$(CC) -c ../../Stats.c -o Obj//Stats.o $(CFLAGS)
|
||||
|
||||
Obj//Vif.o: ../../Vif.c
|
||||
$(CC) -c ../../Vif.c -o Obj//Vif.o $(CFLAGS)
|
||||
|
||||
Obj//VifDma.o: ../../VifDma.c
|
||||
$(CC) -c ../../VifDma.c -o Obj//VifDma.o $(CFLAGS)
|
||||
|
||||
Obj//VU0.o: ../../VU0.c
|
||||
$(CC) -c ../../VU0.c -o Obj//VU0.o $(CFLAGS)
|
||||
|
||||
Obj//VU0micro.o: ../../VU0micro.c
|
||||
$(CC) -c ../../VU0micro.c -o Obj//VU0micro.o $(CFLAGS)
|
||||
|
||||
Obj//VU1micro.o: ../../VU1micro.c
|
||||
$(CC) -c ../../VU1micro.c -o Obj//VU1micro.o $(CFLAGS)
|
||||
|
||||
Obj//VUflags.o: ../../VUflags.c
|
||||
$(CC) -c ../../VUflags.c -o Obj//VUflags.o $(CFLAGS)
|
||||
|
||||
Obj//VUops.o: ../../VUops.c
|
||||
$(CC) -c ../../VUops.c -o Obj//VUops.o $(CFLAGS)
|
||||
|
||||
Obj//Cache.o: ../../Cache.c
|
||||
$(CC) -c ../../Cache.c -o Obj//Cache.o $(CFLAGS)
|
||||
|
||||
Obj//CdRom.o: ../../CdRom.c
|
||||
$(CC) -c ../../CdRom.c -o Obj//CdRom.o $(CFLAGS)
|
||||
|
||||
Obj//deci2.o: ../../RDebug/deci2.c
|
||||
$(CC) -c ../../RDebug/deci2.c -o Obj//deci2.o $(CFLAGS)
|
||||
|
||||
Obj//deci2_dbgp.o: ../../RDebug/deci2_dbgp.c
|
||||
$(CC) -c ../../RDebug/deci2_dbgp.c -o Obj//deci2_dbgp.o $(CFLAGS)
|
||||
|
||||
Obj//deci2_dcmp.o: ../../RDebug/deci2_dcmp.c
|
||||
$(CC) -c ../../RDebug/deci2_dcmp.c -o Obj//deci2_dcmp.o $(CFLAGS)
|
||||
|
||||
Obj//deci2_iloadp.o: ../../RDebug/deci2_iloadp.c
|
||||
$(CC) -c ../../RDebug/deci2_iloadp.c -o Obj//deci2_iloadp.o $(CFLAGS)
|
||||
|
||||
Obj//deci2_netmp.o: ../../RDebug/deci2_netmp.c
|
||||
$(CC) -c ../../RDebug/deci2_netmp.c -o Obj//deci2_netmp.o $(CFLAGS)
|
||||
|
||||
Obj//deci2_ttyp.o: ../../RDebug/deci2_ttyp.c
|
||||
$(CC) -c ../../RDebug/deci2_ttyp.c -o Obj//deci2_ttyp.o $(CFLAGS)
|
||||
|
||||
Obj//pcsx2_private.res: pcsx2_private.rc ../pcsx2.rc
|
||||
$(WINDRES) -i pcsx2_private.rc --input-format=rc -o Obj//pcsx2_private.res -O coff --include-dir ../../ --include-dir ../ --include-dir ../mingw
|
||||
@@ -1,23 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
* Original code (2.0 and earlier )copyright (c) 2000-2002 Lee Thomason (www.grinninglizard.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include <windows.h>
|
||||
#include <winuser.h>
|
||||
|
||||
#define IDC_STATIC (-1)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,40 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
/* THIS FILE WILL BE OVERWRITTEN BY DEV-C++ */
|
||||
/* DO NOT EDIT ! */
|
||||
|
||||
#ifndef PCSX2_PRIVATE_H
|
||||
#define PCSX2_PRIVATE_H
|
||||
|
||||
/* VERSION DEFINITIONS */
|
||||
#define VER_STRING "0.1.1.1"
|
||||
#define VER_MAJOR 0
|
||||
#define VER_MINOR 1
|
||||
#define VER_RELEASE 1
|
||||
#define VER_BUILD 1
|
||||
#define COMPANY_NAME ""
|
||||
#define FILE_VERSION ""
|
||||
#define FILE_DESCRIPTION "Developed using the Dev-C++ IDE"
|
||||
#define INTERNAL_NAME ""
|
||||
#define LEGAL_COPYRIGHT ""
|
||||
#define LEGAL_TRADEMARKS ""
|
||||
#define ORIGINAL_FILENAME ""
|
||||
#define PRODUCT_NAME ""
|
||||
#define PRODUCT_VERSION ""
|
||||
|
||||
#endif /*PCSX2_PRIVATE_H*/
|
||||
@@ -1,5 +0,0 @@
|
||||
/* THIS FILE WILL BE OVERWRITTEN BY DEV-C++ */
|
||||
/* DO NOT EDIT! */
|
||||
|
||||
#include "../pcsx2.rc"
|
||||
|
||||
@@ -1,22 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/../
|
||||
noinst_LIBRARIES = libx86recomp.a
|
||||
|
||||
# have to add the sources instead of making a library since the linking is complicated
|
||||
if X86_64
|
||||
archfiles = ix86-64/iR5900-64.c ix86-64/iR5900AritImm-64.c ix86-64/iR5900Jump-64.c \
|
||||
ix86-64/iR5900Move-64.c ix86-64/iR5900Shift-64.c ix86-64/iR5900Arit-64.c ix86-64/iR5900Branch-64.c \
|
||||
ix86-64/iR5900LoadStore-64.c ix86-64/iR5900MultDiv-64.c ix86-64/iCore-64.cpp ix86-64/aR5900-64.S
|
||||
else
|
||||
archfiles = ix86-32/iR5900-32.c ix86-32/iR5900AritImm.c ix86-32/iR5900Jump.c \
|
||||
ix86-32/iR5900Move.c ix86-32/iR5900Shift.c ix86-32/iR5900Arit.c ix86-32/iR5900Branch.c \
|
||||
ix86-32/iR5900LoadStore.c ix86-32/iR5900MultDiv.c ix86-32/iCore-32.cpp ix86-32/aR5900-32.S
|
||||
endif
|
||||
|
||||
libx86recomp_a_SOURCES = iCOP2.c iCP0.c iFPU.c iHw.c iMMI.c iPsxHw.c iPsxMem.c \
|
||||
ir5900tables.c iVU0micro.c iVU1micro.c iVUmicro.c \
|
||||
iCore.cpp iGS.cpp iR3000A.cpp iR3000Atables.cpp iVif.cpp iVUzerorec.cpp \
|
||||
fast_routines.S aR3000A.S aVUzerorec.S aVif.S $(archfiles)
|
||||
|
||||
libx86recomp_a_DEPENDENCIES = ix86/libix86.a
|
||||
|
||||
SUBDIRS = ix86
|
||||
@@ -1,190 +0,0 @@
|
||||
extern psxRegs:abs
|
||||
extern psxRecLUT:abs
|
||||
extern psxRecRecompile:near
|
||||
extern EEsCycle:abs
|
||||
|
||||
.code
|
||||
|
||||
R3000AInterceptor proc public
|
||||
sub rsp, 48
|
||||
jmp rdx
|
||||
R3000AInterceptor endp
|
||||
|
||||
R3000AExecute proc public
|
||||
|
||||
;;while (EEsCycle > 0) {
|
||||
push rbx
|
||||
push rbp
|
||||
push rsi
|
||||
push rdi
|
||||
push r12
|
||||
push r13
|
||||
push r14
|
||||
push r15
|
||||
|
||||
Execute_CheckCycles:
|
||||
cmp dword ptr [EEsCycle], 0
|
||||
jle Execute_Exit
|
||||
|
||||
;;if ( !pblock->pFnptr || (pblock->startpc&PSX_MEMMASK) != (psxRegs.pc&PSX_MEMMASK) )
|
||||
;; psxRecRecompile(psxRegs.pc);
|
||||
|
||||
mov eax, dword ptr [psxRegs + 0208h]
|
||||
mov ecx, eax
|
||||
mov r12d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r12, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [psxRecLUT]
|
||||
shl r12, 1
|
||||
add r12, [rax]
|
||||
|
||||
mov r8d, [r12+4]
|
||||
mov r9d, ecx
|
||||
and r8d, 05fffffffh
|
||||
and r9d, 05fffffffh
|
||||
cmp r8d, r9d
|
||||
jne Execute_Recompile
|
||||
mov edx, [r12]
|
||||
and rdx, 0fffffffh ;; pFnptr
|
||||
jnz Execute_Function
|
||||
|
||||
Execute_Recompile:
|
||||
call psxRecRecompile
|
||||
mov edx, [r12]
|
||||
and rdx, 0fffffffh ;; pFnptr
|
||||
|
||||
Execute_Function:
|
||||
call R3000AInterceptor
|
||||
|
||||
jmp Execute_CheckCycles
|
||||
|
||||
Execute_Exit:
|
||||
pop r15
|
||||
pop r14
|
||||
pop r13
|
||||
pop r12
|
||||
pop rdi
|
||||
pop rsi
|
||||
pop rbp
|
||||
pop rbx
|
||||
ret
|
||||
|
||||
R3000AExecute endp
|
||||
|
||||
psxDispatcher proc public
|
||||
|
||||
mov [rsp+40], rdx
|
||||
|
||||
mov eax, dword ptr [psxRegs + 0208h]
|
||||
mov ecx, eax
|
||||
mov r12d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r12, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [psxRecLUT]
|
||||
shl r12, 1
|
||||
add r12, [rax]
|
||||
|
||||
|
||||
mov eax, ecx
|
||||
mov edx, [r12+4]
|
||||
and eax, 5fffffffh
|
||||
and edx, 5fffffffh
|
||||
cmp eax, edx
|
||||
je psxDispatcher_CheckPtr
|
||||
|
||||
call psxRecRecompile
|
||||
psxDispatcher_CheckPtr:
|
||||
mov r12d, dword ptr [r12]
|
||||
|
||||
and r12, 00fffffffh
|
||||
mov rdx, r12
|
||||
mov rcx, [rsp+40]
|
||||
sub rdx, rcx
|
||||
sub rdx, 4
|
||||
mov [rcx], edx
|
||||
|
||||
jmp r12
|
||||
psxDispatcher endp
|
||||
|
||||
psxDispatcherClear proc public
|
||||
|
||||
mov dword ptr [psxRegs + 0208h], edx
|
||||
mov eax, edx
|
||||
|
||||
|
||||
|
||||
mov r12d, edx
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r12, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [psxRecLUT]
|
||||
shl r12, 1
|
||||
add r12, [rax]
|
||||
|
||||
|
||||
mov ecx, edx
|
||||
mov eax, ecx
|
||||
mov edx, [r12+4]
|
||||
and eax, 5fffffffh
|
||||
and edx, 5fffffffh
|
||||
cmp eax, edx
|
||||
jne psxDispatcherClear_Recompile
|
||||
|
||||
mov eax, dword ptr [r12]
|
||||
|
||||
and rax, 00fffffffh
|
||||
jmp rax
|
||||
|
||||
psxDispatcherClear_Recompile:
|
||||
call psxRecRecompile
|
||||
mov eax, dword ptr [r12]
|
||||
|
||||
|
||||
and rax, 00fffffffh
|
||||
mov byte ptr [r15], 0e9h
|
||||
mov rdx, rax
|
||||
sub rdx, r15
|
||||
sub rdx, 5
|
||||
mov [r15+1], edx
|
||||
|
||||
jmp rax
|
||||
psxDispatcherClear endp
|
||||
|
||||
|
||||
psxDispatcherReg proc public
|
||||
|
||||
mov eax, dword ptr [psxRegs + 0208h]
|
||||
mov ecx, eax
|
||||
mov r12d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r12, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [psxRecLUT]
|
||||
shl r12, 1
|
||||
add r12, [rax]
|
||||
|
||||
|
||||
cmp ecx, dword ptr [r12+4]
|
||||
jne psxDispatcherReg_recomp
|
||||
|
||||
mov r12d, dword ptr [r12]
|
||||
|
||||
and r12, 00fffffffh
|
||||
jmp r12
|
||||
|
||||
psxDispatcherReg_recomp:
|
||||
call psxRecRecompile
|
||||
|
||||
mov eax, dword ptr [r12]
|
||||
and rax, 00fffffffh
|
||||
jmp rax
|
||||
|
||||
psxDispatcherReg endp
|
||||
|
||||
end
|
||||
@@ -1,249 +0,0 @@
|
||||
// iR5900.c assembly routines
|
||||
// zerofrog(@gmail.com)
|
||||
.intel_syntax
|
||||
|
||||
.extern cpuRegs
|
||||
.extern recRecompile
|
||||
.extern recLUT
|
||||
.extern lbase
|
||||
.extern s_pCurBlock_ltime
|
||||
.extern g_EEFreezeRegs
|
||||
|
||||
#define BLOCKTYPE_STARTPC 4 // startpc offset
|
||||
#define BLOCKTYPE_DELAYSLOT 1 // if bit set, delay slot
|
||||
|
||||
#define BASEBLOCK_SIZE 2 // in dwords
|
||||
#define PCOFFSET 0x2a8
|
||||
|
||||
#define REG_PC %edi
|
||||
#define REG_BLOCK %r14 // preserved across calls
|
||||
#define REG_BLOCKd %r14d
|
||||
|
||||
.globl R5900Execute
|
||||
R5900Execute:
|
||||
push %rbx
|
||||
push %rbp
|
||||
push %r12
|
||||
push %r13
|
||||
push %r14
|
||||
push %r15
|
||||
|
||||
// calc PC_GETBLOCK
|
||||
// ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff)))
|
||||
mov %eax, dword ptr [cpuRegs + PCOFFSET]
|
||||
mov REG_PC, %eax
|
||||
mov REG_BLOCKd, %eax
|
||||
shl %rax, 32
|
||||
shr %rax, 48
|
||||
and REG_BLOCK, 0xfffc
|
||||
shl %rax, 3
|
||||
add %rax, [recLUT]
|
||||
shl REG_BLOCK, 1
|
||||
add REG_BLOCK, [%rax]
|
||||
|
||||
// g_EEFreezeRegs = 1;
|
||||
mov dword ptr [g_EEFreezeRegs], 1
|
||||
|
||||
cmp REG_PC, [REG_BLOCK+4]
|
||||
jne Execute_Recompile
|
||||
mov %edx, [REG_BLOCK]
|
||||
and %rdx, 0xfffffff // pFnptr
|
||||
jnz Execute_Function
|
||||
|
||||
Execute_Recompile:
|
||||
call recRecompile
|
||||
mov %edx, [REG_BLOCK]
|
||||
and %rdx, 0xfffffff // pFnptr
|
||||
|
||||
Execute_Function:
|
||||
call %rdx
|
||||
|
||||
// g_EEFreezeRegs = 0;
|
||||
mov dword ptr [g_EEFreezeRegs], 0
|
||||
|
||||
pop %r15
|
||||
pop %r14
|
||||
pop %r13
|
||||
pop %r12
|
||||
pop %rbp
|
||||
pop %rbx
|
||||
|
||||
ret
|
||||
|
||||
.globl Dispatcher
|
||||
Dispatcher:
|
||||
// EDX contains the jump addr to modify
|
||||
push %rdx
|
||||
|
||||
// calc PC_GETBLOCK
|
||||
// ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff)))
|
||||
mov %eax, dword ptr [cpuRegs + PCOFFSET]
|
||||
mov REG_PC, %eax
|
||||
mov REG_BLOCKd, %eax
|
||||
shl %rax, 32
|
||||
shr %rax, 48
|
||||
and REG_BLOCK, 0xfffc
|
||||
shl %rax, 3
|
||||
add %rax, [recLUT]
|
||||
shl REG_BLOCK, 1
|
||||
add REG_BLOCK, [%rax]
|
||||
|
||||
// check if startpc == cpuRegs.pc
|
||||
//and %ecx, 0x5fffffff // remove higher bits
|
||||
cmp REG_PC, dword ptr [REG_BLOCK+BLOCKTYPE_STARTPC]
|
||||
je Dispatcher_CheckPtr
|
||||
|
||||
// recompile
|
||||
call recRecompile
|
||||
Dispatcher_CheckPtr:
|
||||
mov REG_BLOCKd, dword ptr [REG_BLOCK]
|
||||
|
||||
#ifdef _DEBUG
|
||||
test REG_BLOCKd, REG_BLOCKd
|
||||
jnz Dispatcher_CallFn
|
||||
// throw an exception
|
||||
int 10
|
||||
|
||||
Dispatcher_CallFn:
|
||||
#endif
|
||||
|
||||
and REG_BLOCK, 0x0fffffff
|
||||
mov %rdx, REG_BLOCK
|
||||
pop %rcx // x86Ptr to mod
|
||||
sub %rdx, %rcx
|
||||
sub %rdx, 4
|
||||
mov [%rcx], %edx
|
||||
|
||||
jmp REG_BLOCK
|
||||
|
||||
|
||||
.globl DispatcherClear
|
||||
DispatcherClear:
|
||||
// EDX contains the current pc
|
||||
mov dword ptr [cpuRegs + PCOFFSET], %edx
|
||||
mov %eax, %edx
|
||||
|
||||
// calc PC_GETBLOCK
|
||||
// ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff)))
|
||||
mov REG_BLOCKd, %edx
|
||||
shl %rax, 32
|
||||
shr %rax, 48
|
||||
and REG_BLOCK, 0xfffc
|
||||
shl %rax, 3
|
||||
add %rax, [recLUT]
|
||||
shl REG_BLOCK, 1
|
||||
add REG_BLOCK, [%rax]
|
||||
|
||||
cmp %edx, dword ptr [REG_BLOCK + BLOCKTYPE_STARTPC]
|
||||
jne DispatcherClear_Recompile
|
||||
|
||||
mov %eax, dword ptr [REG_BLOCK]
|
||||
|
||||
#ifdef _DEBUG
|
||||
test %eax, %eax
|
||||
jnz DispatcherClear_CallFn
|
||||
// throw an exception
|
||||
int 10
|
||||
|
||||
DispatcherClear_CallFn:
|
||||
#endif
|
||||
|
||||
and %rax, 0x0fffffff
|
||||
jmp %rax
|
||||
|
||||
DispatcherClear_Recompile:
|
||||
mov REG_PC, %edx
|
||||
call recRecompile
|
||||
mov %eax, dword ptr [REG_BLOCK]
|
||||
|
||||
// r15 holds the prev x86 pointer
|
||||
and %rax, 0x0fffffff
|
||||
mov byte ptr [%r15], 0xe9 // jmp32
|
||||
mov %rdx, %rax
|
||||
sub %rdx, %r15
|
||||
sub %rdx, 5
|
||||
mov [%r15+1], %edx
|
||||
|
||||
jmp %rax
|
||||
|
||||
|
||||
|
||||
// called when jumping to variable pc address
|
||||
.globl DispatcherReg
|
||||
DispatcherReg:
|
||||
//s_pDispatchBlock = PC_GETBLOCK(cpuRegs.pc)
|
||||
mov %eax, dword ptr [cpuRegs + PCOFFSET]
|
||||
mov REG_PC, %eax
|
||||
mov REG_BLOCKd, %eax
|
||||
shl %rax, 32
|
||||
shr %rax, 48
|
||||
and REG_BLOCK, 0xfffc
|
||||
shl %rax, 3
|
||||
add %rax, [recLUT]
|
||||
shl REG_BLOCK, 1
|
||||
add REG_BLOCK, [%rax]
|
||||
|
||||
// check if startpc == cpuRegs.pc
|
||||
//and %eax, 0x5fffffff // remove higher bits
|
||||
cmp REG_PC, dword ptr [REG_BLOCK+BLOCKTYPE_STARTPC]
|
||||
jne DispatcherReg_recomp
|
||||
|
||||
mov REG_BLOCKd, dword ptr [REG_BLOCK]
|
||||
|
||||
#ifdef _DEBUG
|
||||
test REG_BLOCKd, REG_BLOCKd
|
||||
jnz CallFn2
|
||||
// throw an exception
|
||||
int 10
|
||||
|
||||
CallFn2:
|
||||
|
||||
#endif
|
||||
|
||||
and REG_BLOCK, 0x0fffffff
|
||||
jmp REG_BLOCK // fnptr
|
||||
|
||||
DispatcherReg_recomp:
|
||||
call recRecompile
|
||||
|
||||
mov %eax, dword ptr [REG_BLOCK]
|
||||
and %rax, 0x0fffffff
|
||||
jmp %rax // fnptr
|
||||
|
||||
|
||||
.globl _StartPerfCounter
|
||||
_StartPerfCounter:
|
||||
|
||||
push %rax
|
||||
push %rbx
|
||||
push %rcx
|
||||
|
||||
rdtsc
|
||||
mov dword ptr [lbase], %eax
|
||||
mov dword ptr [lbase + 4], %edx
|
||||
|
||||
pop %rcx
|
||||
pop %rbx
|
||||
pop %rax
|
||||
ret
|
||||
|
||||
.globl _StopPerfCounter
|
||||
_StopPerfCounter:
|
||||
|
||||
push %rax
|
||||
push %rbx
|
||||
push %rcx
|
||||
|
||||
rdtsc
|
||||
|
||||
sub %eax, dword ptr [lbase]
|
||||
sbb %edx, dword ptr [lbase + 4]
|
||||
mov %ecx, s_pCurBlock_ltime
|
||||
add %eax, dword ptr [%ecx]
|
||||
adc %edx, dword ptr [%ecx + 4]
|
||||
mov dword ptr [%ecx], %eax
|
||||
mov dword ptr [%ecx + 4], %edx
|
||||
pop %rcx
|
||||
pop %rbx
|
||||
pop %rax
|
||||
ret
|
||||
@@ -1,261 +0,0 @@
|
||||
extern cpuRegs:abs
|
||||
extern recRecompile:near
|
||||
extern recLUT:abs
|
||||
extern lbase:abs
|
||||
extern s_pCurBlock_ltime:abs
|
||||
|
||||
extern g_globalXMMData:abs
|
||||
extern g_globalXMMSaved:abs
|
||||
extern g_EEFreezeRegs:abs
|
||||
|
||||
.code
|
||||
|
||||
FreezeXMMRegs_ proc public
|
||||
;;assert( g_EEFreezeRegs );
|
||||
test ecx, ecx
|
||||
jz XMMRestore
|
||||
|
||||
cmp byte ptr [g_globalXMMSaved], 0
|
||||
jne XMMSaveEnd
|
||||
|
||||
mov byte ptr [g_globalXMMSaved], 1
|
||||
|
||||
movaps xmmword ptr [g_globalXMMData + 000h], xmm0
|
||||
movaps xmmword ptr [g_globalXMMData + 010h], xmm1
|
||||
movaps xmmword ptr [g_globalXMMData + 020h], xmm2
|
||||
movaps xmmword ptr [g_globalXMMData + 030h], xmm3
|
||||
movaps xmmword ptr [g_globalXMMData + 040h], xmm4
|
||||
movaps xmmword ptr [g_globalXMMData + 050h], xmm5
|
||||
movaps xmmword ptr [g_globalXMMData + 060h], xmm6
|
||||
movaps xmmword ptr [g_globalXMMData + 070h], xmm7
|
||||
|
||||
XMMSaveEnd:
|
||||
ret
|
||||
|
||||
XMMRestore:
|
||||
|
||||
cmp byte ptr [g_globalXMMSaved], 0
|
||||
je XMMSaveEnd
|
||||
|
||||
mov byte ptr [g_globalXMMSaved], 0
|
||||
|
||||
;; TODO: really need to backup all regs?
|
||||
movaps xmm0, xmmword ptr [g_globalXMMData + 000h]
|
||||
movaps xmm1, xmmword ptr [g_globalXMMData + 010h]
|
||||
movaps xmm2, xmmword ptr [g_globalXMMData + 020h]
|
||||
movaps xmm3, xmmword ptr [g_globalXMMData + 030h]
|
||||
movaps xmm4, xmmword ptr [g_globalXMMData + 040h]
|
||||
movaps xmm5, xmmword ptr [g_globalXMMData + 050h]
|
||||
movaps xmm6, xmmword ptr [g_globalXMMData + 060h]
|
||||
movaps xmm7, xmmword ptr [g_globalXMMData + 070h]
|
||||
|
||||
XMMRestoreEnd:
|
||||
ret
|
||||
|
||||
FreezeXMMRegs_ endp
|
||||
|
||||
R5900Interceptor proc public
|
||||
sub rsp, 48
|
||||
jmp rdx
|
||||
R5900Interceptor endp
|
||||
|
||||
R5900Execute proc public
|
||||
|
||||
push rbx
|
||||
push rbp
|
||||
push rsi
|
||||
push rdi
|
||||
push r12
|
||||
push r13
|
||||
push r14
|
||||
push r15
|
||||
|
||||
;;BASEBLOCK* pblock = PC_GETBLOCK(cpuRegs.pc);
|
||||
mov eax, dword ptr [cpuRegs + 02a8h]
|
||||
mov ecx, eax
|
||||
mov r14d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r14, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [recLUT]
|
||||
shl r14, 1
|
||||
add r14, [rax]
|
||||
|
||||
;; g_EEFreezeRegs = 1;
|
||||
mov dword ptr [g_EEFreezeRegs], 1
|
||||
|
||||
cmp ecx, [r14+4]
|
||||
jne Execute_Recompile
|
||||
mov edx, [r14]
|
||||
and rdx, 0fffffffh ;; pFnptr
|
||||
jnz Execute_Function
|
||||
|
||||
Execute_Recompile:
|
||||
call recRecompile
|
||||
mov edx, [r14]
|
||||
and rdx, 0fffffffh ;; pFnptr
|
||||
|
||||
Execute_Function:
|
||||
call R5900Interceptor
|
||||
|
||||
;; g_EEFreezeRegs = 0;
|
||||
mov dword ptr [g_EEFreezeRegs], 0
|
||||
|
||||
pop r15
|
||||
pop r14
|
||||
pop r13
|
||||
pop r12
|
||||
pop rdi
|
||||
pop rsi
|
||||
pop rbp
|
||||
pop rbx
|
||||
|
||||
ret
|
||||
|
||||
R5900Execute endp
|
||||
|
||||
Dispatcher proc public
|
||||
|
||||
mov [rsp+40], rdx
|
||||
|
||||
mov eax, dword ptr [cpuRegs + 02a8h]
|
||||
mov ecx, eax
|
||||
mov r14d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r14, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [recLUT]
|
||||
shl r14, 1
|
||||
add r14, [rax]
|
||||
|
||||
|
||||
|
||||
cmp ecx, dword ptr [r14+4]
|
||||
je Dispatcher_CheckPtr
|
||||
|
||||
|
||||
call recRecompile
|
||||
Dispatcher_CheckPtr:
|
||||
mov r14d, dword ptr [r14]
|
||||
|
||||
and r14, 0fffffffh
|
||||
mov rdx, r14
|
||||
mov rcx, [rsp+40]
|
||||
sub rdx, rcx
|
||||
sub rdx, 4
|
||||
mov [rcx], edx
|
||||
|
||||
jmp r14
|
||||
Dispatcher endp
|
||||
|
||||
DispatcherClear proc public
|
||||
|
||||
mov dword ptr [cpuRegs + 02a8h], edx
|
||||
mov eax, edx
|
||||
|
||||
|
||||
|
||||
mov r14d, edx
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r14, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [recLUT]
|
||||
shl r14, 1
|
||||
add r14, [rax]
|
||||
|
||||
cmp edx, dword ptr [r14 + 4]
|
||||
jne DispatcherClear_Recompile
|
||||
|
||||
mov eax, dword ptr [r14]
|
||||
|
||||
and rax, 0fffffffh
|
||||
jmp rax
|
||||
|
||||
DispatcherClear_Recompile:
|
||||
mov ecx, edx
|
||||
call recRecompile
|
||||
mov eax, dword ptr [r14]
|
||||
|
||||
|
||||
and rax, 0fffffffh
|
||||
mov byte ptr [r15], 0e9h
|
||||
mov rdx, rax
|
||||
sub rdx, r15
|
||||
sub rdx, 5
|
||||
mov [r15+1], edx
|
||||
|
||||
jmp rax
|
||||
DispatcherClear endp
|
||||
|
||||
|
||||
|
||||
DispatcherReg proc public
|
||||
|
||||
mov eax, dword ptr [cpuRegs + 02a8h]
|
||||
mov ecx, eax
|
||||
mov r14d, eax
|
||||
shl rax, 32
|
||||
shr rax, 48
|
||||
and r14, 0fffch
|
||||
shl rax, 3
|
||||
add rax, [recLUT]
|
||||
shl r14, 1
|
||||
add r14, [rax]
|
||||
|
||||
|
||||
|
||||
cmp ecx, dword ptr [r14+4]
|
||||
jne DispatcherReg_recomp
|
||||
|
||||
mov r14d, dword ptr [r14]
|
||||
|
||||
and r14, 0fffffffh
|
||||
jmp r14
|
||||
|
||||
DispatcherReg_recomp:
|
||||
call recRecompile
|
||||
|
||||
mov eax, dword ptr [r14]
|
||||
and rax, 0fffffffh
|
||||
jmp rax
|
||||
DispatcherReg endp
|
||||
|
||||
_StartPerfCounter proc public
|
||||
push rax
|
||||
push rbx
|
||||
push rcx
|
||||
|
||||
rdtsc
|
||||
mov dword ptr [lbase], eax
|
||||
mov dword ptr [lbase + 4], edx
|
||||
|
||||
pop rcx
|
||||
pop rbx
|
||||
pop rax
|
||||
ret
|
||||
_StartPerfCounter endp
|
||||
|
||||
_StopPerfCounter proc public
|
||||
push rax
|
||||
push rbx
|
||||
push rcx
|
||||
|
||||
rdtsc
|
||||
|
||||
sub eax, dword ptr [lbase]
|
||||
sbb edx, dword ptr [lbase + 4]
|
||||
mov ecx, [s_pCurBlock_ltime]
|
||||
add eax, dword ptr [ecx]
|
||||
adc edx, dword ptr [ecx + 4]
|
||||
mov dword ptr [ecx], eax
|
||||
mov dword ptr [ecx + 4], edx
|
||||
pop rcx
|
||||
pop rbx
|
||||
pop rax
|
||||
ret
|
||||
_StopPerfCounter endp
|
||||
|
||||
end
|
||||
@@ -1,126 +0,0 @@
|
||||
;; iR3000A.c assembly routines
|
||||
;; zerofrog(@gmail.com)
|
||||
extern svudispfntemp:near
|
||||
extern QueryPerformanceCounter:near
|
||||
extern s_TotalVUCycles:abs
|
||||
extern s_callstack:ptr
|
||||
extern s_vu1esp:abs
|
||||
extern s_writeQ:abs
|
||||
extern s_writeP:abs
|
||||
extern g_curdebugvu:abs
|
||||
extern SuperVUGetProgram:near
|
||||
extern SuperVUCleanupProgram:near
|
||||
extern g_sseVUMXCSR:abs
|
||||
extern g_sseMXCSR:abs
|
||||
|
||||
extern svubase:abs
|
||||
|
||||
.code
|
||||
|
||||
;; SuperVUExecuteProgram(u32 startpc, int vuindex)
|
||||
SuperVUExecuteProgram proc public
|
||||
|
||||
;; uncomment only if SUPERVU_COUNT is defined
|
||||
;; {
|
||||
;push rcx
|
||||
;push rdx
|
||||
;mov rcx, svubase
|
||||
;sub rsp,32
|
||||
;call QueryPerformanceCounter
|
||||
;add rsp,32
|
||||
;pop rdx
|
||||
;pop rcx
|
||||
;; }
|
||||
|
||||
mov rax, [rsp]
|
||||
mov dword ptr [s_TotalVUCycles], 0
|
||||
|
||||
sub rsp, 48-8+80
|
||||
mov [rsp+48], rcx
|
||||
mov [rsp+56], rdx
|
||||
|
||||
mov [s_callstack], rax
|
||||
|
||||
call SuperVUGetProgram
|
||||
|
||||
mov [rsp+64], rbp
|
||||
mov [rsp+72], rsi
|
||||
mov [rsp+80], rdi
|
||||
mov [rsp+88], rbx
|
||||
mov [rsp+96], r12
|
||||
mov [rsp+104], r13
|
||||
mov [rsp+112], r14
|
||||
mov [rsp+120], r15
|
||||
|
||||
;; _DEBUG
|
||||
;;mov [s_vu1esp], rsp
|
||||
|
||||
ldmxcsr [g_sseVUMXCSR]
|
||||
mov dword ptr [s_writeQ], 0ffffffffh
|
||||
mov dword ptr [s_writeP], 0ffffffffh
|
||||
jmp rax
|
||||
SuperVUExecuteProgram endp
|
||||
|
||||
SuperVUEndProgram proc public
|
||||
;; restore cpu state
|
||||
ldmxcsr [g_sseMXCSR]
|
||||
|
||||
mov rcx, [rsp+48]
|
||||
mov rdx, [rsp+56]
|
||||
mov rbp, [rsp+64]
|
||||
mov rsi, [rsp+72]
|
||||
mov rdi, [rsp+80]
|
||||
mov rbx, [rsp+88]
|
||||
mov r12, [rsp+96]
|
||||
mov r13, [rsp+104]
|
||||
mov r14, [rsp+112]
|
||||
mov r15, [rsp+120]
|
||||
|
||||
;; _DEBUG
|
||||
;;sub [s_vu1esp], rsp
|
||||
|
||||
add rsp, 128-32
|
||||
call SuperVUCleanupProgram
|
||||
add rsp, 32
|
||||
jmp [s_callstack] ;; so returns correctly
|
||||
SuperVUEndProgram endp
|
||||
|
||||
svudispfn proc public
|
||||
mov [g_curdebugvu], rax
|
||||
push rcx
|
||||
push rdx
|
||||
push rbp
|
||||
push rsi
|
||||
push rdi
|
||||
push rbx
|
||||
push r8
|
||||
push r9
|
||||
push r10
|
||||
push r11
|
||||
push r12
|
||||
push r13
|
||||
push r14
|
||||
push r15
|
||||
|
||||
sub rsp, 32
|
||||
call svudispfntemp
|
||||
add rsp, 32
|
||||
|
||||
pop r15
|
||||
pop r14
|
||||
pop r13
|
||||
pop r12
|
||||
pop r11
|
||||
pop r10
|
||||
pop r9
|
||||
pop r8
|
||||
pop rbx
|
||||
pop rdi
|
||||
pop rsi
|
||||
pop rbp
|
||||
pop rdx
|
||||
pop rcx
|
||||
ret
|
||||
svudispfn endp
|
||||
|
||||
end
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,294 +0,0 @@
|
||||
; Pcsx2 - Pc Ps2 Emulator
|
||||
; Copyright (C) 2002-2008 Pcsx2 Team
|
||||
;
|
||||
; This program is free software; you can redistribute it and/or modify
|
||||
; it under the terms of the GNU General Public License as published by
|
||||
; the Free Software Foundation; either version 2 of the License, or
|
||||
; (at your option) any later version.
|
||||
|
||||
; This program is distributed in the hope that it will be useful,
|
||||
; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; GNU General Public License for more details.
|
||||
;
|
||||
; You should have received a copy of the GNU General Public License
|
||||
; along with this program; if not, write to the Free Software
|
||||
; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
|
||||
;; Fast assembly routines for x86-64 masm compiler
|
||||
;; zerofrog(@gmail.com)
|
||||
.code
|
||||
|
||||
;; mmx memcmp implementation, size has to be a multiple of 8
|
||||
;; returns 0 is equal, nonzero value if not equal
|
||||
;; ~10 times faster than standard memcmp
|
||||
;; (zerofrog)
|
||||
;; u8 memcmp_mmx(const void* src1, const void* src2, int cmpsize)
|
||||
memcmp_mmx proc public
|
||||
|
||||
cmp r8d, 32
|
||||
jl memcmp_Done4
|
||||
|
||||
;; custom test first 8 to make sure things are ok
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
pcmpeqd mm0, [rcx]
|
||||
pcmpeqd mm1, [rcx+8]
|
||||
pand mm0, mm1
|
||||
movq mm2, [rdx+16]
|
||||
pmovmskb eax, mm0
|
||||
movq mm3, [rdx+24]
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_NextComp
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_NextComp:
|
||||
pcmpeqd mm2, [rcx+16]
|
||||
pcmpeqd mm3, [rcx+24]
|
||||
pand mm2, mm3
|
||||
pmovmskb eax, mm2
|
||||
|
||||
sub r8d, 32
|
||||
add rdx, 32
|
||||
add rcx, 32
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_ContinueTest
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
cmp r8d, 64
|
||||
jl memcmp_Done8
|
||||
|
||||
memcmp_Cmp8:
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
movq mm2, [rdx+16]
|
||||
movq mm3, [rdx+24]
|
||||
movq mm4, [rdx+32]
|
||||
movq mm5, [rdx+40]
|
||||
movq mm6, [rdx+48]
|
||||
movq mm7, [rdx+56]
|
||||
pcmpeqd mm0, [rcx]
|
||||
pcmpeqd mm1, [rcx+8]
|
||||
pcmpeqd mm2, [rcx+16]
|
||||
pcmpeqd mm3, [rcx+24]
|
||||
pand mm0, mm1
|
||||
pcmpeqd mm4, [rcx+32]
|
||||
pand mm0, mm2
|
||||
pcmpeqd mm5, [rcx+40]
|
||||
pand mm0, mm3
|
||||
pcmpeqd mm6, [rcx+48]
|
||||
pand mm0, mm4
|
||||
pcmpeqd mm7, [rcx+56]
|
||||
pand mm0, mm5
|
||||
pand mm0, mm6
|
||||
pand mm0, mm7
|
||||
pmovmskb eax, mm0
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_Continue
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Continue:
|
||||
sub r8d, 64
|
||||
add rdx, 64
|
||||
add rcx, 64
|
||||
memcmp_ContinueTest:
|
||||
cmp r8d, 64
|
||||
jge memcmp_Cmp8
|
||||
|
||||
memcmp_Done8:
|
||||
test r8d, 020h
|
||||
jz memcmp_Done4
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
movq mm2, [rdx+16]
|
||||
movq mm3, [rdx+24]
|
||||
pcmpeqd mm0, [rcx]
|
||||
pcmpeqd mm1, [rcx+8]
|
||||
pcmpeqd mm2, [rcx+16]
|
||||
pcmpeqd mm3, [rcx+24]
|
||||
pand mm0, mm1
|
||||
pand mm0, mm2
|
||||
pand mm0, mm3
|
||||
pmovmskb eax, mm0
|
||||
sub r8d, 32
|
||||
add rdx, 32
|
||||
add rcx, 32
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_Done4
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Done4:
|
||||
cmp r8d, 24
|
||||
jne memcmp_Done2
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
movq mm2, [rdx+16]
|
||||
pcmpeqd mm0, [rcx]
|
||||
pcmpeqd mm1, [rcx+8]
|
||||
pcmpeqd mm2, [rcx+16]
|
||||
pand mm0, mm1
|
||||
pand mm0, mm2
|
||||
pmovmskb eax, mm0
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_Done
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Done2:
|
||||
cmp r8d, 16
|
||||
jne memcmp_Done1
|
||||
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
pcmpeqd mm0, [rcx]
|
||||
pcmpeqd mm1, [rcx+8]
|
||||
pand mm0, mm1
|
||||
pmovmskb eax, mm0
|
||||
|
||||
;; check if eq
|
||||
cmp eax, 0ffh
|
||||
je memcmp_Done
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Done1:
|
||||
cmp r8d, 8
|
||||
jne memcmp_Done
|
||||
|
||||
mov eax, [rdx]
|
||||
mov rdx, [rdx+4]
|
||||
cmp eax, [rcx]
|
||||
je memcmp_Next
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Next:
|
||||
cmp rdx, [rcx+4]
|
||||
je memcmp_Done
|
||||
mov eax, 1
|
||||
jmp memcmp_End
|
||||
|
||||
memcmp_Done:
|
||||
xor eax, eax
|
||||
|
||||
memcmp_End:
|
||||
emms
|
||||
ret
|
||||
memcmp_mmx endp
|
||||
|
||||
;; memxor_mmx
|
||||
memxor_mmx proc public
|
||||
|
||||
cmp r8d, 64
|
||||
jl memxor_Setup4
|
||||
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
movq mm2, [rdx+16]
|
||||
movq mm3, [rdx+24]
|
||||
movq mm4, [rdx+32]
|
||||
movq mm5, [rdx+40]
|
||||
movq mm6, [rdx+48]
|
||||
movq mm7, [rdx+56]
|
||||
sub r8d, 64
|
||||
add rdx, 64
|
||||
cmp r8d, 64
|
||||
jl memxor_End8
|
||||
|
||||
memxor_Cmp8:
|
||||
pxor mm0, [rdx]
|
||||
pxor mm1, [rdx+8]
|
||||
pxor mm2, [rdx+16]
|
||||
pxor mm3, [rdx+24]
|
||||
pxor mm4, [rdx+32]
|
||||
pxor mm5, [rdx+40]
|
||||
pxor mm6, [rdx+48]
|
||||
pxor mm7, [rdx+56]
|
||||
|
||||
sub r8d, 64
|
||||
add rdx, 64
|
||||
cmp r8d, 64
|
||||
jge memxor_Cmp8
|
||||
|
||||
memxor_End8:
|
||||
pxor mm0, mm4
|
||||
pxor mm1, mm5
|
||||
pxor mm2, mm6
|
||||
pxor mm3, mm7
|
||||
|
||||
cmp r8d, 32
|
||||
jl memxor_End4
|
||||
pxor mm0, [rdx]
|
||||
pxor mm1, [rdx+8]
|
||||
pxor mm2, [rdx+16]
|
||||
pxor mm3, [rdx+24]
|
||||
sub r8d, 32
|
||||
add rdx, 32
|
||||
jmp memxor_End4
|
||||
|
||||
memxor_Setup4:
|
||||
cmp r8d, 32
|
||||
jl memxor_Setup2
|
||||
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
movq mm2, [rdx+16]
|
||||
movq mm3, [rdx+24]
|
||||
sub r8d, 32
|
||||
add rdx, 32
|
||||
|
||||
memxor_End4:
|
||||
pxor mm0, mm2
|
||||
pxor mm1, mm3
|
||||
|
||||
cmp r8d, 16
|
||||
jl memxor_End2
|
||||
pxor mm0, [rdx]
|
||||
pxor mm1, [rdx+8]
|
||||
sub r8d, 16
|
||||
add rdx, 16
|
||||
jmp memxor_End2
|
||||
|
||||
memxor_Setup2:
|
||||
cmp r8d, 16
|
||||
jl memxor_Setup1
|
||||
|
||||
movq mm0, [rdx]
|
||||
movq mm1, [rdx+8]
|
||||
sub r8d, 16
|
||||
add rdx, 16
|
||||
|
||||
memxor_End2:
|
||||
pxor mm0, mm1
|
||||
|
||||
cmp r8d, 8
|
||||
jl memxor_End1
|
||||
pxor mm0, [rdx]
|
||||
memxor_End1:
|
||||
movq [rcx], mm0
|
||||
jmp memxor_End
|
||||
|
||||
memxor_Setup1:
|
||||
movq mm0, [rdx]
|
||||
movq [rcx], mm0
|
||||
memxor_End:
|
||||
emms
|
||||
ret
|
||||
|
||||
memxor_mmx endp
|
||||
|
||||
end
|
||||
@@ -1,720 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
#include <malloc.h>
|
||||
|
||||
extern "C" {
|
||||
|
||||
#if defined(_WIN32)
|
||||
#include <windows.h>
|
||||
#endif
|
||||
|
||||
#include "PS2Etypes.h"
|
||||
#include "System.h"
|
||||
#include "R5900.h"
|
||||
#include "Vif.h"
|
||||
#include "VU.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iCore.h"
|
||||
#include "R3000A.h"
|
||||
|
||||
u16 x86FpuState, iCWstate;
|
||||
u16 g_mmxAllocCounter = 0;
|
||||
|
||||
// X86 caching
|
||||
extern _x86regs x86regs[X86REGS];
|
||||
extern u16 g_x86AllocCounter;
|
||||
|
||||
} // end extern "C"
|
||||
|
||||
u32 g_recFnArgs[4];
|
||||
|
||||
#include <vector>
|
||||
using namespace std;
|
||||
|
||||
// use special x86 register allocation for ia32
|
||||
void _initX86regs() {
|
||||
memset(x86regs, 0, sizeof(x86regs));
|
||||
g_x86AllocCounter = 0;
|
||||
}
|
||||
|
||||
uptr _x86GetAddr(int type, int reg)
|
||||
{
|
||||
switch(type&~X86TYPE_VU1) {
|
||||
case X86TYPE_GPR: return (uptr)&cpuRegs.GPR.r[reg];
|
||||
case X86TYPE_VI: {
|
||||
//assert( reg < 16 || reg == REG_R );
|
||||
return (type&X86TYPE_VU1)?(uptr)&VU1.VI[reg]:(uptr)&VU0.VI[reg];
|
||||
}
|
||||
case X86TYPE_MEMOFFSET: return 0;
|
||||
case X86TYPE_VIMEMOFFSET: return 0;
|
||||
case X86TYPE_VUQREAD: return (type&X86TYPE_VU1)?(uptr)&VU1.VI[REG_Q]:(uptr)&VU0.VI[REG_Q];
|
||||
case X86TYPE_VUPREAD: return (type&X86TYPE_VU1)?(uptr)&VU1.VI[REG_P]:(uptr)&VU0.VI[REG_P];
|
||||
case X86TYPE_VUQWRITE: return (type&X86TYPE_VU1)?(uptr)&VU1.q:(uptr)&VU0.q;
|
||||
case X86TYPE_VUPWRITE: return (type&X86TYPE_VU1)?(uptr)&VU1.p:(uptr)&VU0.p;
|
||||
case X86TYPE_PSX: return (uptr)&psxRegs.GPR.r[reg];
|
||||
case X86TYPE_PCWRITEBACK:
|
||||
return (uptr)&g_recWriteback;
|
||||
case X86TYPE_VUJUMP:
|
||||
return (uptr)&g_recWriteback;
|
||||
case X86TYPE_FNARG:
|
||||
return (uptr)&g_recFnArgs[reg];
|
||||
default: assert(0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _getFreeX86reg(int mode)
|
||||
{
|
||||
int i, tempi;
|
||||
u32 bestcount = 0x10000;
|
||||
x86IntRegType* pregs = (mode&MODE_8BITREG)?g_x868bitregs:g_x86allregs;
|
||||
int maxreg = (mode&MODE_8BITREG)?ARRAYSIZE(g_x868bitregs):ARRAYSIZE(g_x86allregs);
|
||||
|
||||
if( !(mode&MODE_8BITREG) && (mode&0x80000000) ) {
|
||||
// prioritize the temp registers
|
||||
for (i=0; i<ARRAYSIZE(g_x86tempregs); i++) {
|
||||
int reg = g_x86tempregs[i];
|
||||
if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
|
||||
|
||||
if (x86regs[reg].inuse == 0) {
|
||||
return reg;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i=0; i<maxreg; i++) {
|
||||
int reg = pregs[i];
|
||||
if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
|
||||
|
||||
if (x86regs[reg].inuse == 0) {
|
||||
return reg;
|
||||
}
|
||||
}
|
||||
|
||||
tempi = -1;
|
||||
for (i=0; i<maxreg; i++) {
|
||||
int reg = pregs[i];
|
||||
if( (mode&MODE_NOFRAME) && reg==EBP ) continue;
|
||||
|
||||
if (x86regs[reg].needed) continue;
|
||||
if (x86regs[reg].type != X86TYPE_TEMP) {
|
||||
|
||||
if( x86regs[reg].counter < bestcount ) {
|
||||
tempi = reg;
|
||||
bestcount = x86regs[reg].counter;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
_freeX86reg(reg);
|
||||
return i;
|
||||
}
|
||||
|
||||
if( tempi != -1 ) {
|
||||
_freeX86reg(tempi);
|
||||
return tempi;
|
||||
}
|
||||
SysPrintf("*PCSX2*: x86 error\n");
|
||||
assert(0);
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _allocX86reg(int x86reg, int type, int reg, int mode)
|
||||
{
|
||||
int i, j;
|
||||
assert( reg >= 0 && reg < 32 );
|
||||
|
||||
// if( X86_ISVI(type) )
|
||||
// assert( reg < 16 || reg == REG_R );
|
||||
|
||||
// don't alloc EAX and ESP,EBP if MODE_NOFRAME
|
||||
int oldmode = mode;
|
||||
int noframe = mode&MODE_NOFRAME;
|
||||
int mode8bit = mode&MODE_8BITREG;
|
||||
x86IntRegType* pregs = (mode&MODE_8BITREG)?g_x868bitregs:g_x86allregs;
|
||||
int maxreg = (mode&MODE_8BITREG)?ARRAYSIZE(g_x868bitregs):ARRAYSIZE(g_x86allregs);
|
||||
mode &= ~(MODE_NOFRAME|MODE_8BITREG);
|
||||
int readfromreg = -1;
|
||||
|
||||
|
||||
if( type != X86TYPE_TEMP ) {
|
||||
|
||||
if( mode8bit ) {
|
||||
// make sure reg isn't in the non8bit regs
|
||||
|
||||
for(j = 0; j < ARRAYSIZE(g_x86non8bitregs); ++j) {
|
||||
int i = g_x86non8bitregs[j];
|
||||
if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg)
|
||||
continue;
|
||||
|
||||
if( mode & MODE_READ ) {
|
||||
readfromreg = i;
|
||||
x86regs[i].inuse = 0;
|
||||
break;
|
||||
}
|
||||
else if( mode & MODE_WRITE ) {
|
||||
x86regs[i].inuse = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (j=0; j<maxreg; j++) {
|
||||
i = pregs[j];
|
||||
|
||||
if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) continue;
|
||||
|
||||
if( (noframe && i == EBP) ) {
|
||||
if( x86regs[i].mode & MODE_READ )
|
||||
readfromreg = i;
|
||||
//if( xmmregs[i].mode & MODE_WRITE ) mode |= MODE_WRITE;
|
||||
mode |= x86regs[i].mode&MODE_WRITE;
|
||||
x86regs[i].inuse = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if( x86reg >= 0 ) {
|
||||
// requested specific reg, so return that instead
|
||||
if( i != x86reg ) {
|
||||
if( x86regs[i].mode & MODE_READ ) readfromreg = i;
|
||||
//if( x86regs[i].mode & MODE_WRITE ) mode |= MODE_WRITE;
|
||||
mode |= x86regs[i].mode&MODE_WRITE;
|
||||
x86regs[i].inuse = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if( type != X86TYPE_TEMP && !(x86regs[i].mode & MODE_READ) && (mode&MODE_READ)) {
|
||||
|
||||
if( type == X86TYPE_GPR ) {
|
||||
|
||||
if( reg == 0 ) XOR64RtoR(i, i);
|
||||
else {
|
||||
if( GPR_IS_CONST1(reg) )
|
||||
MOV64ItoR(i, g_cpuConstRegs[reg].UD[0]);
|
||||
else
|
||||
MOV64MtoR(i, _x86GetAddr(type, reg));
|
||||
}
|
||||
}
|
||||
else if( X86_ISVI(type) && reg < 16 ) MOVZX32M16toR(i, _x86GetAddr(type, reg));
|
||||
else // the rest are 32 bit
|
||||
MOV32MtoR(i, _x86GetAddr(type, reg));
|
||||
|
||||
x86regs[i].mode |= MODE_READ;
|
||||
}
|
||||
|
||||
x86regs[i].needed = 1;
|
||||
x86regs[i].mode|= mode;
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
// currently only gpr regs are const
|
||||
if( type == X86TYPE_GPR && (mode & MODE_WRITE) && reg < 32 ) {
|
||||
//assert( !(g_cpuHasConstReg & (1<<gprreg)) );
|
||||
g_cpuHasConstReg &= ~(1<<reg);
|
||||
}
|
||||
|
||||
if (x86reg == -1) {
|
||||
x86reg = _getFreeX86reg(oldmode|(type==X86TYPE_TEMP?0x80000000:0));
|
||||
}
|
||||
else {
|
||||
_freeX86reg(x86reg);
|
||||
}
|
||||
|
||||
x86regs[x86reg].type = type;
|
||||
x86regs[x86reg].reg = reg;
|
||||
x86regs[x86reg].mode = mode;
|
||||
x86regs[x86reg].needed = 1;
|
||||
x86regs[x86reg].inuse = 1;
|
||||
|
||||
if( readfromreg >= 0 ) MOV64RtoR(x86reg, readfromreg);
|
||||
else {
|
||||
if( type == X86TYPE_GPR ) {
|
||||
|
||||
if( reg == 0 ) {
|
||||
if( mode & MODE_READ )
|
||||
XOR64RtoR(x86reg, x86reg);
|
||||
return x86reg;
|
||||
}
|
||||
|
||||
int xmmreg;
|
||||
if( (xmmreg = _checkXMMreg(XMMTYPE_GPRREG, reg, 0)) >= 0 ) {
|
||||
// destroy the xmm reg, but don't flush
|
||||
SSE_MOVHPS_XMM_to_M64(_x86GetAddr(type, reg)+8, xmmreg);
|
||||
|
||||
if( mode & MODE_READ )
|
||||
SSE2_MOVQ_XMM_to_R(x86reg, xmmreg);
|
||||
|
||||
if( xmmregs[xmmreg].mode & MODE_WRITE )
|
||||
x86regs[x86reg].mode |= MODE_WRITE;
|
||||
|
||||
// don't flush
|
||||
xmmregs[xmmreg].inuse = 0;
|
||||
}
|
||||
else {
|
||||
if( mode & MODE_READ ) {
|
||||
if( GPR_IS_CONST1(reg) )
|
||||
MOV64ItoR(x86reg, g_cpuConstRegs[reg].UD[0]);
|
||||
else
|
||||
MOV64MtoR(x86reg, _x86GetAddr(type, reg));
|
||||
}
|
||||
}
|
||||
}
|
||||
else if( mode & MODE_READ ) {
|
||||
if( X86_ISVI(type) && reg < 16 ) {
|
||||
if( reg == 0 ) XOR32RtoR(x86reg, x86reg);
|
||||
else MOVZX32M16toR(x86reg, _x86GetAddr(type, reg));
|
||||
}
|
||||
else MOV32MtoR(x86reg, _x86GetAddr(type, reg));
|
||||
}
|
||||
}
|
||||
|
||||
return x86reg;
|
||||
}
|
||||
|
||||
int _checkX86reg(int type, int reg, int mode)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (x86regs[i].inuse && x86regs[i].reg == reg && x86regs[i].type == type) {
|
||||
|
||||
if( !(x86regs[i].mode & MODE_READ) && (mode&MODE_READ) ) {
|
||||
if( type == X86TYPE_GPR ) {
|
||||
if( reg == 0 ) XOR64RtoR(i, i);
|
||||
else MOV64MtoR(i, _x86GetAddr(type, reg));
|
||||
}
|
||||
else if( X86_ISVI(type) ) MOVZX32M16toR(i, _x86GetAddr(type, reg));
|
||||
else MOV32MtoR(i, _x86GetAddr(type, reg));
|
||||
}
|
||||
|
||||
x86regs[i].mode |= mode;
|
||||
x86regs[i].counter = g_x86AllocCounter++;
|
||||
x86regs[i].needed = 1;
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _addNeededX86reg(int type, int reg)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (!x86regs[i].inuse || x86regs[i].reg != reg || x86regs[i].type != type ) continue;
|
||||
|
||||
x86regs[i].counter = g_x86AllocCounter++;
|
||||
x86regs[i].needed = 1;
|
||||
}
|
||||
}
|
||||
|
||||
void _clearNeededX86regs() {
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (x86regs[i].needed ) {
|
||||
if( x86regs[i].inuse && (x86regs[i].mode&MODE_WRITE) )
|
||||
x86regs[i].mode |= MODE_READ;
|
||||
|
||||
x86regs[i].needed = 0;
|
||||
}
|
||||
|
||||
if( x86regs[i].inuse ) {
|
||||
assert( x86regs[i].type != X86TYPE_TEMP );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void _deleteX86reg(int type, int reg, int flush)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (x86regs[i].inuse && x86regs[i].reg == reg && x86regs[i].type == type) {
|
||||
switch(flush) {
|
||||
case 0:
|
||||
_freeX86reg(i);
|
||||
break;
|
||||
case 1:
|
||||
if( x86regs[i].mode & MODE_WRITE) {
|
||||
|
||||
if( type == X86TYPE_GPR ) MOV64RtoM(_x86GetAddr(type, x86regs[i].reg), i);
|
||||
if( X86_ISVI(type) && x86regs[i].reg < 16 ) MOV16RtoM(_x86GetAddr(type, x86regs[i].reg), i);
|
||||
else MOV32RtoM(_x86GetAddr(type, x86regs[i].reg), i);
|
||||
|
||||
// get rid of MODE_WRITE since don't want to flush again
|
||||
x86regs[i].mode &= ~MODE_WRITE;
|
||||
x86regs[i].mode |= MODE_READ;
|
||||
}
|
||||
return;
|
||||
case 2:
|
||||
x86regs[i].inuse = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void _freeX86reg(int x86reg)
|
||||
{
|
||||
assert( x86reg >= 0 && x86reg < X86REGS );
|
||||
|
||||
if( x86regs[x86reg].inuse && (x86regs[x86reg].mode&MODE_WRITE) ) {
|
||||
|
||||
if( x86regs[x86reg].type == X86TYPE_GPR )
|
||||
MOV64RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg);
|
||||
if( X86_ISVI(x86regs[x86reg].type) && x86regs[x86reg].reg < 16 )
|
||||
MOV16RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg);
|
||||
else
|
||||
MOV32RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg);
|
||||
}
|
||||
|
||||
x86regs[x86reg].mode &= ~MODE_WRITE;
|
||||
x86regs[x86reg].inuse = 0;
|
||||
}
|
||||
|
||||
void _flushX86regs()
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (x86regs[i].inuse == 0) continue;
|
||||
|
||||
assert( x86regs[i].type != X86TYPE_TEMP );
|
||||
assert( x86regs[i].mode & (MODE_READ|MODE_WRITE) );
|
||||
|
||||
_freeX86reg(i);
|
||||
x86regs[i].inuse = 1;
|
||||
x86regs[i].mode &= ~MODE_WRITE;
|
||||
x86regs[i].mode |= MODE_READ;
|
||||
}
|
||||
}
|
||||
|
||||
void _freeX86regs() {
|
||||
int i;
|
||||
|
||||
for (i=0; i<X86REGS; i++) {
|
||||
if (!x86regs[i].inuse) continue;
|
||||
|
||||
assert( x86regs[i].type != X86TYPE_TEMP );
|
||||
_freeX86reg(i);
|
||||
}
|
||||
}
|
||||
|
||||
//void _flushX86tempregs()
|
||||
//{
|
||||
// int i, j;
|
||||
//
|
||||
// for (j=0; j<ARRAYSIZE(g_x86tempregs); j++) {
|
||||
// i = g_x86tempregs[j];
|
||||
// if (x86regs[i].inuse == 0) continue;
|
||||
//
|
||||
// assert( x86regs[i].type != X86TYPE_TEMP );
|
||||
// assert( x86regs[i].mode & (MODE_READ|MODE_WRITE) );
|
||||
//
|
||||
// _freeX86reg(i);
|
||||
// x86regs[i].inuse = 1;
|
||||
// x86regs[i].mode &= ~MODE_WRITE;
|
||||
// x86regs[i].mode |= MODE_READ;
|
||||
// }
|
||||
//}
|
||||
|
||||
void _freeX86tempregs()
|
||||
{
|
||||
int i, j;
|
||||
|
||||
for (j=0; j<ARRAYSIZE(g_x86tempregs); j++) {
|
||||
i = g_x86tempregs[j];
|
||||
if (!x86regs[i].inuse) continue;
|
||||
|
||||
assert( x86regs[i].type != X86TYPE_TEMP );
|
||||
_freeX86reg(i);
|
||||
}
|
||||
}
|
||||
|
||||
u8 _hasFreeX86reg()
|
||||
{
|
||||
int i, j;
|
||||
|
||||
for (j=0; j<ARRAYSIZE(g_x86allregs); j++) {
|
||||
i = g_x86allregs[j];
|
||||
if (!x86regs[i].inuse) return 1;
|
||||
}
|
||||
|
||||
// check for dead regs
|
||||
for (j=0; j<ARRAYSIZE(g_x86allregs); j++) {
|
||||
i = g_x86allregs[j];
|
||||
if (x86regs[i].needed) continue;
|
||||
if (x86regs[i].type == X86TYPE_GPR ) {
|
||||
if( !EEINST_ISLIVEXMM(x86regs[i].reg) ) {
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// check for dead regs
|
||||
for (j=0; j<ARRAYSIZE(g_x86allregs); j++) {
|
||||
i = g_x86allregs[j];
|
||||
if (x86regs[i].needed) continue;
|
||||
if (x86regs[i].type == X86TYPE_GPR ) {
|
||||
if( !(g_pCurInstInfo->regs[x86regs[i].reg]&EEINST_USED) ) {
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
// EE
|
||||
void _eeMoveGPRtoR(x86IntRegType to, int fromgpr)
|
||||
{
|
||||
if( GPR_IS_CONST1(fromgpr) )
|
||||
MOV64ItoR( to, g_cpuConstRegs[fromgpr].UD[0] );
|
||||
else {
|
||||
int mmreg;
|
||||
|
||||
if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0) {
|
||||
MOV64RtoR(to, mmreg);
|
||||
}
|
||||
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 && (xmmregs[mmreg].mode&MODE_WRITE)) {
|
||||
SSE2_MOVQ_XMM_to_R(to, mmreg);
|
||||
}
|
||||
else {
|
||||
MOV64MtoR(to, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// 32 bit move
|
||||
void _eeMoveGPRtoM(u32 to, int fromgpr)
|
||||
{
|
||||
if( GPR_IS_CONST1(fromgpr) )
|
||||
MOV32ItoM( to, g_cpuConstRegs[fromgpr].UL[0] );
|
||||
else {
|
||||
int mmreg;
|
||||
|
||||
if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0 ) {
|
||||
MOV32RtoM(to, mmreg);
|
||||
}
|
||||
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) {
|
||||
SSEX_MOVD_XMM_to_M32(to, mmreg);
|
||||
}
|
||||
else {
|
||||
MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] );
|
||||
MOV32RtoM(to, EAX );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr)
|
||||
{
|
||||
if( GPR_IS_CONST1(fromgpr) )
|
||||
MOV64ItoRmOffset( to, g_cpuConstRegs[fromgpr].UD[0], 0 );
|
||||
else {
|
||||
int mmreg;
|
||||
|
||||
if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0 ) {
|
||||
MOV64RtoRmOffset(to, mmreg, 0);
|
||||
}
|
||||
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) {
|
||||
SSEX_MOVD_XMM_to_Rm(to, mmreg);
|
||||
}
|
||||
else {
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] );
|
||||
MOV64RtoRmOffset(to, RAX, 0 );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void _callPushArg(u32 arg, uptr argmem, x86IntRegType X86ARG)
|
||||
{
|
||||
if( IS_X86REG(arg) ) {
|
||||
if( (arg&0xff) != X86ARG ) {
|
||||
_freeX86reg(X86ARG);
|
||||
MOV64RtoR(X86ARG, (arg&0xf));
|
||||
}
|
||||
}
|
||||
else if( IS_GPRREG(arg) ) {
|
||||
_allocX86reg(X86ARG, X86TYPE_GPR, arg&0xff, MODE_READ);
|
||||
}
|
||||
else if( IS_CONSTREG(arg) ) {
|
||||
_freeX86reg(X86ARG);
|
||||
MOV32ItoR(X86ARG, argmem);
|
||||
}
|
||||
else if( IS_EECONSTREG(arg) ) {
|
||||
_freeX86reg(X86ARG);
|
||||
MOV32ItoR(X86ARG, g_cpuConstRegs[(arg>>16)&0x1f].UD[0]);
|
||||
}
|
||||
else if( IS_PSXCONSTREG(arg) ) {
|
||||
_freeX86reg(X86ARG);
|
||||
MOV32ItoR(X86ARG, g_psxConstRegs[(arg>>16)&0x1f]);
|
||||
}
|
||||
else if( IS_MEMORYREG(arg) ) {
|
||||
_freeX86reg(X86ARG);
|
||||
MOV64MtoR(X86ARG, argmem);
|
||||
}
|
||||
else if( IS_XMMREG(arg) ) {
|
||||
_freeX86reg(X86ARG);
|
||||
SSEX_MOVD_XMM_to_Rm(X86ARG, arg&0xf);
|
||||
}
|
||||
else {
|
||||
assert((arg&0xfff0)==0);
|
||||
_freeX86reg(X86ARG);
|
||||
MOV64RtoR(X86ARG, (arg&0xf));
|
||||
}
|
||||
}
|
||||
|
||||
void _callFunctionArg1(uptr fn, u32 arg1, uptr arg1mem)
|
||||
{
|
||||
_callPushArg(arg1, arg1mem, X86ARG1);
|
||||
CALLFunc((uptr)fn);
|
||||
}
|
||||
|
||||
void _callFunctionArg2(uptr fn, u32 arg1, u32 arg2, uptr arg1mem, uptr arg2mem)
|
||||
{
|
||||
_callPushArg(arg1, arg1mem, X86ARG1);
|
||||
_callPushArg(arg2, arg2mem, X86ARG2);
|
||||
CALLFunc((uptr)fn);
|
||||
}
|
||||
|
||||
void _callFunctionArg3(uptr fn, u32 arg1, u32 arg2, u32 arg3, uptr arg1mem, uptr arg2mem, uptr arg3mem)
|
||||
{
|
||||
_callPushArg(arg1, arg1mem, X86ARG1);
|
||||
_callPushArg(arg2, arg2mem, X86ARG2);
|
||||
_callPushArg(arg3, arg3mem, X86ARG3);
|
||||
CALLFunc((uptr)fn);
|
||||
}
|
||||
|
||||
void _recPushReg(int mmreg)
|
||||
{
|
||||
assert(0);
|
||||
}
|
||||
|
||||
void _signExtendSFtoM(u32 mem)
|
||||
{
|
||||
assert(0);
|
||||
}
|
||||
|
||||
void _recMove128MtoM(u32 to, u32 from)
|
||||
{
|
||||
MOV64MtoR(RAX, from);
|
||||
MOV64RtoM(to, RAX);
|
||||
MOV64MtoR(RAX, from+8);
|
||||
MOV64RtoM(to+8, RAX);
|
||||
}
|
||||
|
||||
void _recMove128RmOffsettoM(u32 to, u32 offset)
|
||||
{
|
||||
MOV64RmOffsettoR(RAX, RCX, offset);
|
||||
MOV64RtoM(to, RAX);
|
||||
MOV64RmOffsettoR(RAX, RCX, offset+8);
|
||||
MOV64RtoM(to+8, RAX);
|
||||
}
|
||||
|
||||
void _recMove128MtoRmOffset(u32 offset, u32 from)
|
||||
{
|
||||
MOV64MtoR(RAX, from);
|
||||
MOV64RtoRmOffset(RCX, RAX, offset);
|
||||
MOV64MtoR(RAX, from+8);
|
||||
MOV64RtoRmOffset(RCX, RAX, offset+8);
|
||||
}
|
||||
|
||||
// 32 bit
|
||||
void LogicalOp32RtoM(uptr to, x86IntRegType from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND32RtoM(to, from); break;
|
||||
case 1: OR32RtoM(to, from); break;
|
||||
case 2: XOR32RtoM(to, from); break;
|
||||
case 3: OR32RtoM(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
void LogicalOp32MtoR(x86IntRegType to, uptr from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND32MtoR(to, from); break;
|
||||
case 1: OR32MtoR(to, from); break;
|
||||
case 2: XOR32MtoR(to, from); break;
|
||||
case 3: OR32MtoR(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
void LogicalOp32ItoR(x86IntRegType to, u32 from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND32ItoR(to, from); break;
|
||||
case 1: OR32ItoR(to, from); break;
|
||||
case 2: XOR32ItoR(to, from); break;
|
||||
case 3: OR32ItoR(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
void LogicalOp32ItoM(uptr to, u32 from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND32ItoM(to, from); break;
|
||||
case 1: OR32ItoM(to, from); break;
|
||||
case 2: XOR32ItoM(to, from); break;
|
||||
case 3: OR32ItoM(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
// 64 bit
|
||||
void LogicalOp64RtoR(x86IntRegType to, x86IntRegType from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND64RtoR(to, from); break;
|
||||
case 1: OR64RtoR(to, from); break;
|
||||
case 2: XOR64RtoR(to, from); break;
|
||||
case 3: OR64RtoR(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
void LogicalOp64RtoM(uptr to, x86IntRegType from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND64RtoM(to, from); break;
|
||||
case 1: OR64RtoM(to, from); break;
|
||||
case 2: XOR64RtoM(to, from); break;
|
||||
case 3: OR64RtoM(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
void LogicalOp64MtoR(x86IntRegType to, uptr from, int op)
|
||||
{
|
||||
switch(op) {
|
||||
case 0: AND64MtoR(to, from); break;
|
||||
case 1: OR64MtoR(to, from); break;
|
||||
case 2: XOR64MtoR(to, from); break;
|
||||
case 3: OR64MtoR(to, from); break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,213 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Register arithmetic *
|
||||
* Format: OP rd, rs, rt *
|
||||
*********************************************************/
|
||||
|
||||
#ifndef ARITHMETIC_RECOMPILE
|
||||
|
||||
REC_FUNC(ADD);
|
||||
REC_FUNC(ADDU);
|
||||
REC_FUNC(DADD);
|
||||
REC_FUNC(DADDU);
|
||||
REC_FUNC(SUB);
|
||||
REC_FUNC(SUBU);
|
||||
REC_FUNC(DSUB);
|
||||
REC_FUNC(DSUBU);
|
||||
REC_FUNC(AND);
|
||||
REC_FUNC(OR);
|
||||
REC_FUNC(XOR);
|
||||
REC_FUNC(NOR);
|
||||
REC_FUNC(SLT);
|
||||
REC_FUNC(SLTU);
|
||||
|
||||
#else
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recADD( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if (_Rt_ != 0) {
|
||||
ADD32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
}
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recADDU( void )
|
||||
{
|
||||
recADD( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDADD( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Rt_ != 0 ) {
|
||||
ADD64MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
}
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDADDU( void )
|
||||
{
|
||||
recDADD( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSUB( void ) {
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Rt_ != 0 ) {
|
||||
SUB32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
}
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSUBU( void )
|
||||
{
|
||||
recSUB( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSUB( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Rt_ != 0 ) {
|
||||
SUB64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
}
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSUBU( void )
|
||||
{
|
||||
recDSUB( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recAND( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
if (_Rt_ == _Rd_) { // Rd&= Rs
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
AND64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
} else if (_Rs_ == _Rd_) { // Rd&= Rt
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
AND64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
} else { // Rd = Rs & Rt
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
AND64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recOR( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
if ( ( _Rs_ == 0 ) && ( _Rt_ == 0 ) ) {
|
||||
XOR64RtoR(RAX, RAX);
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[0], RAX );
|
||||
} else if ( _Rs_ == 0 ) {
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
else if ( _Rt_ == 0 ) {
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
else {
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
OR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recXOR( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
XOR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recNOR( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
OR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
NOT64R(RAX);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLT( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
CMP64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
SETL8R (EAX);
|
||||
AND64I32toR(EAX, 0xff);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLTU( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]);
|
||||
CMP64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
SBB64RtoR(EAX, EAX);
|
||||
NEG64R (EAX);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,169 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Arithmetic with immediate operand *
|
||||
* Format: OP rt, rs, immediate *
|
||||
*********************************************************/
|
||||
#ifndef ARITHMETICIMM_RECOMPILE
|
||||
|
||||
REC_FUNC(ADDI);
|
||||
REC_FUNC(ADDIU);
|
||||
REC_FUNC(DADDI);
|
||||
REC_FUNC(DADDIU);
|
||||
REC_FUNC(ANDI);
|
||||
REC_FUNC(ORI);
|
||||
REC_FUNC(XORI);
|
||||
|
||||
REC_FUNC(SLTI);
|
||||
REC_FUNC(SLTIU);
|
||||
|
||||
#else
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recADDI( void ) {
|
||||
if (!_Rt_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if (_Imm_ != 0) {
|
||||
ADD32ItoR( EAX, _Imm_ );
|
||||
}
|
||||
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recADDIU( void )
|
||||
{
|
||||
recADDI( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDADDI( void ) {
|
||||
int rsreg;
|
||||
int rtreg;
|
||||
|
||||
if (!_Rt_) return;
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD64ItoR( EAX, _Imm_ );
|
||||
}
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDADDIU( void )
|
||||
{
|
||||
recDADDI( );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLTIU( void )
|
||||
{
|
||||
if ( ! _Rt_ ) return;
|
||||
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
CMP64I32toR(RAX, _Imm_);
|
||||
SETB8R (EAX);
|
||||
AND64I32toR(EAX, 0xff);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLTI( void )
|
||||
{
|
||||
if ( ! _Rt_ )
|
||||
return;
|
||||
|
||||
MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
CMP64I32toR(RAX, _Imm_);
|
||||
SETL8R (EAX);
|
||||
AND64I32toR(EAX, 0xff);
|
||||
MOV64RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recANDI( void ) {
|
||||
if (!_Rt_) return;
|
||||
|
||||
if ( _ImmU_ != 0 ) {
|
||||
if (_Rs_ == _Rt_) {
|
||||
MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
|
||||
AND32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _ImmU_ );
|
||||
}
|
||||
else {
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( EAX, _ImmU_ );
|
||||
MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
|
||||
}
|
||||
}
|
||||
else {
|
||||
MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
|
||||
MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], 0 );
|
||||
}
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recORI( void ) {
|
||||
if (!_Rt_) return;
|
||||
|
||||
if (_Rs_ == _Rt_) {
|
||||
OR32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], _ImmU_ );
|
||||
} else {
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] );
|
||||
if ( _ImmU_ != 0 ) {
|
||||
OR64ItoR( RAX, _ImmU_ );
|
||||
}
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX );
|
||||
}
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recXORI( void ) {
|
||||
if (!_Rt_) return;
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] );
|
||||
XOR64ItoR( RAX, _ImmU_ );
|
||||
MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX );
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,537 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Register branch logic *
|
||||
* Format: OP rs, rt, offset *
|
||||
*********************************************************/
|
||||
#ifndef BRANCH_RECOMPILE
|
||||
|
||||
REC_SYS(BEQ);
|
||||
REC_SYS(BEQL);
|
||||
REC_SYS(BNE);
|
||||
REC_SYS(BNEL);
|
||||
REC_SYS(BLTZ);
|
||||
REC_SYS(BGTZ);
|
||||
REC_SYS(BLEZ);
|
||||
REC_SYS(BGEZ);
|
||||
REC_SYS(BGTZL);
|
||||
REC_SYS(BLTZL);
|
||||
REC_SYS(BLTZAL);
|
||||
REC_SYS(BLTZALL);
|
||||
REC_SYS(BLEZL);
|
||||
REC_SYS(BGEZL);
|
||||
REC_SYS(BGEZAL);
|
||||
REC_SYS(BGEZALL);
|
||||
|
||||
#else
|
||||
|
||||
u32 target;
|
||||
////////////////////////////////////////////////////
|
||||
void recBEQ( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
if ( _Rs_ == _Rt_ )
|
||||
{
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
}
|
||||
else
|
||||
{
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
j32Ptr[ 0 ] = JNE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBNE( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
if ( _Rs_ == _Rt_ )
|
||||
{
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(pc);
|
||||
return;
|
||||
}
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
j32Ptr[ 0 ] = JE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
/*********************************************************
|
||||
* Register branch logic *
|
||||
* Format: OP rs, offset *
|
||||
*********************************************************/
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLTZAL( void )
|
||||
{
|
||||
SysPrintf("BLTZAL\n");
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc( (u32)BLTZAL );
|
||||
branch = 2;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGEZAL( void )
|
||||
{
|
||||
SysPrintf("BGEZAL\n");
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc( (u32)BGEZAL );
|
||||
branch = 2;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLEZ( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] <= 0) )
|
||||
branchTo = pc+4;
|
||||
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
return;
|
||||
}
|
||||
|
||||
_deleteEEreg(_Rs_, 1);
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JL32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGTZ( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] > 0) )
|
||||
branchTo = pc+4;
|
||||
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
return;
|
||||
}
|
||||
|
||||
_deleteEEreg(_Rs_, 1);
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JGE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLTZ( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) )
|
||||
branchTo = pc+4;
|
||||
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
return;
|
||||
}
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JLE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGEZ( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) )
|
||||
branchTo = pc+4;
|
||||
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
return;
|
||||
}
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JG32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
pc -= 4;
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
/*********************************************************
|
||||
* Register branch logic Likely *
|
||||
* Format: OP rs, offset *
|
||||
*********************************************************/
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLEZL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] <= 0) )
|
||||
SetBranchImm( pc + 4);
|
||||
else {
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
_deleteEEreg(_Rs_, 1);
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JL32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
LoadBranchState();
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGTZL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] > 0) )
|
||||
SetBranchImm( pc + 4);
|
||||
else {
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
_deleteEEreg(_Rs_, 1);
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JGE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
LoadBranchState();
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLTZL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) )
|
||||
SetBranchImm( pc + 4);
|
||||
else {
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JLE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
LoadBranchState();
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGEZL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
_eeFlushAllUnused();
|
||||
|
||||
if( GPR_IS_CONST1(_Rs_) ) {
|
||||
if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) )
|
||||
SetBranchImm( pc + 4);
|
||||
else {
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm( branchTo );
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
XOR64RtoR(RAX, RAX);
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
|
||||
j32Ptr[ 0 ] = JG32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
LoadBranchState();
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBLTZALL( void )
|
||||
{
|
||||
SysPrintf("BLTZALL\n");
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc( (u32)BLTZALL );
|
||||
branch = 2;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBGEZALL( void )
|
||||
{
|
||||
SysPrintf("BGEZALL\n");
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc( (u32)BGEZALL );
|
||||
branch = 2;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBEQL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
j32Ptr[ 0 ] = JNE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
LoadBranchState();
|
||||
SetBranchImm(pc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recBNEL( void )
|
||||
{
|
||||
u32 branchTo = ((s32)_Imm_ * 4) + pc;
|
||||
|
||||
MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
j32Ptr[ 0 ] = JNE32( 0 );
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
|
||||
SaveBranchState();
|
||||
SetBranchImm(pc+4);
|
||||
|
||||
x86SetJ32( j32Ptr[ 0 ] );
|
||||
|
||||
// recopy the next inst
|
||||
LoadBranchState();
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(branchTo);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,114 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Jump to target *
|
||||
* Format: OP target *
|
||||
*********************************************************/
|
||||
#ifndef JUMP_RECOMPILE
|
||||
|
||||
REC_SYS(J);
|
||||
REC_SYS(JAL);
|
||||
REC_SYS(JR);
|
||||
REC_SYS(JALR);
|
||||
|
||||
#else
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recJ( void )
|
||||
{
|
||||
u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 );
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(newpc);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recJAL( void )
|
||||
{
|
||||
u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 );
|
||||
_deleteEEreg(31, 0);
|
||||
GPR_SET_CONST(31);
|
||||
g_cpuConstRegs[31].UL[0] = pc + 4;
|
||||
g_cpuConstRegs[31].UL[1] = 0;
|
||||
|
||||
recompileNextInstruction(1);
|
||||
SetBranchImm(newpc);
|
||||
}
|
||||
|
||||
/*********************************************************
|
||||
* Register jump *
|
||||
* Format: OP rs, rd *
|
||||
*********************************************************/
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recJR( void )
|
||||
{
|
||||
SetBranchReg( _Rs_ );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recJALR( void )
|
||||
{
|
||||
_allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE);
|
||||
_eeMoveGPRtoR(ESI, _Rs_);
|
||||
|
||||
if ( _Rd_ ) {
|
||||
_deleteEEreg(_Rd_, 0);
|
||||
GPR_SET_CONST(_Rd_);
|
||||
g_cpuConstRegs[_Rd_].UL[0] = pc + 4;
|
||||
g_cpuConstRegs[_Rd_].UL[1] = 0;
|
||||
}
|
||||
|
||||
_clearNeededX86regs();
|
||||
_clearNeededXMMregs();
|
||||
recompileNextInstruction(1);
|
||||
|
||||
if( x86regs[ESI].inuse ) {
|
||||
assert( x86regs[ESI].type == X86TYPE_PCWRITEBACK );
|
||||
MOV32RtoM((int)&cpuRegs.pc, ESI);
|
||||
x86regs[ESI].inuse = 0;
|
||||
}
|
||||
else {
|
||||
MOV32MtoR(EAX, (u32)&g_recWriteback);
|
||||
MOV32RtoM((int)&cpuRegs.pc, EAX);
|
||||
}
|
||||
|
||||
SetBranchReg(0xffffffff);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,423 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
#include "VU0.h"
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Load and store for GPR *
|
||||
* Format: OP rt, offset(base) *
|
||||
*********************************************************/
|
||||
#ifndef LOADSTORE_RECOMPILE
|
||||
|
||||
REC_FUNC(LB);
|
||||
REC_FUNC(LBU);
|
||||
REC_FUNC(LH);
|
||||
REC_FUNC(LHU);
|
||||
REC_FUNC(LW);
|
||||
REC_FUNC(LWU);
|
||||
REC_FUNC(LWL);
|
||||
REC_FUNC(LWR);
|
||||
REC_FUNC(LD);
|
||||
REC_FUNC(LDR);
|
||||
REC_FUNC(LDL);
|
||||
REC_FUNC(LQ);
|
||||
REC_FUNC(SB);
|
||||
REC_FUNC(SH);
|
||||
REC_FUNC(SW);
|
||||
REC_FUNC(SWL);
|
||||
REC_FUNC(SWR);
|
||||
REC_FUNC(SD);
|
||||
REC_FUNC(SDL);
|
||||
REC_FUNC(SDR);
|
||||
REC_FUNC(SQ);
|
||||
REC_FUNC(LWC1);
|
||||
REC_FUNC(SWC1);
|
||||
REC_FUNC(LQC2);
|
||||
REC_FUNC(SQC2);
|
||||
|
||||
void SetFastMemory(int bSetFast) {}
|
||||
|
||||
#else
|
||||
|
||||
static int s_bFastMemory = 0;
|
||||
void SetFastMemory(int bSetFast)
|
||||
{
|
||||
s_bFastMemory = bSetFast;
|
||||
}
|
||||
|
||||
u64 retValue;
|
||||
u64 dummyValue[ 4 ];
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLB( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc( (uptr)memRead8RS );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLBU( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc((uptr)memRead8RU );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLH( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ){
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
CALLFunc((uptr)memRead16RS );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLHU( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc((uptr)memRead16RU );
|
||||
}
|
||||
|
||||
void tests() {
|
||||
SysPrintf("Err\n");
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLW( void ) {
|
||||
int rsreg;
|
||||
int rtreg;
|
||||
int t0reg;
|
||||
int t1reg;
|
||||
int t2reg;
|
||||
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc((uptr)memRead32RS );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLWU( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc((uptr)memRead32RU );
|
||||
}
|
||||
|
||||
void recLWL( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)LWL );
|
||||
}
|
||||
|
||||
void recLWR( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)LWR );
|
||||
}
|
||||
|
||||
void recLD( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
}
|
||||
else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc((uptr)memRead64 );
|
||||
}
|
||||
|
||||
void recLDL( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)LDL );
|
||||
}
|
||||
|
||||
void recLDR( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)LDR );
|
||||
}
|
||||
|
||||
void recLQ( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_);
|
||||
}
|
||||
AND32ItoR( X86ARG1, ~0xf );
|
||||
|
||||
if ( _Rt_ ) {
|
||||
MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
} else {
|
||||
MOV64ItoR( X86ARG2, (uptr)&dummyValue );
|
||||
}
|
||||
CALLFunc((uptr)memRead128 );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSB( void ) {
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_);
|
||||
}
|
||||
MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
CALLFunc((uptr)memWrite8 );
|
||||
}
|
||||
|
||||
void recSH( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
CALLFunc((uptr)memWrite16 );
|
||||
}
|
||||
|
||||
void recSW( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
CALLFunc((uptr)memWrite32 );
|
||||
}
|
||||
|
||||
void recSWL( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)SWL );
|
||||
}
|
||||
|
||||
void recSWR( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)SWR );
|
||||
}
|
||||
|
||||
void recSD( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
MOV64MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
CALLFunc((uptr)memWrite64 );
|
||||
}
|
||||
|
||||
void recSDL( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)SDL );
|
||||
}
|
||||
|
||||
void recSDR( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code );
|
||||
MOV32ItoM( (uptr)&cpuRegs.pc, pc );
|
||||
CALLFunc((uptr)SDR );
|
||||
}
|
||||
|
||||
void recSQ( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 ) {
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
}
|
||||
AND32ItoR( X86ARG1, ~0xf );
|
||||
|
||||
MOV32ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] );
|
||||
CALLFunc((uptr)memWrite128 );
|
||||
}
|
||||
|
||||
#define _Ft_ _Rt_
|
||||
#define _Fs_ _Rd_
|
||||
#define _Fd_ _Sa_
|
||||
|
||||
// Load and store for COP1
|
||||
// Format: OP rt, offset(base)
|
||||
void recLWC1( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 )
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
MOV64ItoR( X86ARG2, (uptr)&fpuRegs.fpr[ _Ft_ ].UL );
|
||||
|
||||
CALLFunc((uptr)memRead32 );
|
||||
}
|
||||
|
||||
void recSWC1( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 )
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
|
||||
MOV32MtoR( X86ARG2, (uptr)&fpuRegs.fpr[ _Ft_ ].UL );
|
||||
|
||||
CALLFunc((uptr)memWrite32 );
|
||||
}
|
||||
|
||||
void recLQC2( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 )
|
||||
ADD32ItoR( X86ARG1, _Imm_);
|
||||
|
||||
if ( _Rt_ )
|
||||
MOV64ItoR(X86ARG2, (uptr)&VU0.VF[_Ft_].UD[0] );
|
||||
else
|
||||
MOV64ItoR(X86ARG2, (uptr)&dummyValue );
|
||||
|
||||
CALLFunc((uptr)memRead128 );
|
||||
}
|
||||
|
||||
void recSQC2( void )
|
||||
{
|
||||
iFlushCall(FLUSH_EVERYTHING);
|
||||
|
||||
MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
if ( _Imm_ != 0 )
|
||||
ADD32ItoR( X86ARG1, _Imm_ );
|
||||
|
||||
MOV64ItoR(X86ARG2, (uptr)&VU0.VF[_Ft_].UD[0] );
|
||||
|
||||
CALLFunc((uptr)memWrite128 );
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,85 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Shift arithmetic with constant shift *
|
||||
* Format: OP rd, rt, sa *
|
||||
*********************************************************/
|
||||
#ifndef MOVE_RECOMPILE
|
||||
|
||||
REC_FUNC(LUI);
|
||||
REC_FUNC(MFLO);
|
||||
REC_FUNC(MFHI);
|
||||
REC_FUNC(MTLO);
|
||||
REC_FUNC(MTHI);
|
||||
REC_FUNC(MOVZ);
|
||||
REC_FUNC(MOVN);
|
||||
|
||||
REC_FUNC( MFHI1 );
|
||||
REC_FUNC( MFLO1 );
|
||||
REC_FUNC( MTHI1 );
|
||||
REC_FUNC( MTLO1 );
|
||||
|
||||
#else
|
||||
REC_FUNC(MFLO, _Rd_);
|
||||
REC_FUNC(MFHI, _Rd_);
|
||||
REC_FUNC(MTLO, 0);
|
||||
REC_FUNC(MTHI, 0);
|
||||
REC_FUNC(MOVZ, _Rd_);
|
||||
REC_FUNC(MOVN, _Rd_);
|
||||
|
||||
REC_FUNC( MFHI1, _Rd_ );
|
||||
REC_FUNC( MFLO1, _Rd_ );
|
||||
REC_FUNC( MTHI1, 0 );
|
||||
REC_FUNC( MTLO1, 0 );
|
||||
|
||||
/*********************************************************
|
||||
* Load higher 16 bits of the first word in GPR with imm *
|
||||
* Format: OP rt, immediate *
|
||||
*********************************************************/
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recLUI( void ) {
|
||||
int rtreg;
|
||||
|
||||
if (!_Rt_) return;
|
||||
|
||||
MOV64I32toM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], (s32)(_Imm_ << 16));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,164 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Register mult/div & Register trap logic *
|
||||
* Format: OP rs, rt *
|
||||
*********************************************************/
|
||||
#ifndef MULTDIV_RECOMPILE
|
||||
|
||||
REC_FUNC(MULT);
|
||||
REC_FUNC(MULTU);
|
||||
REC_FUNC( MULT1 );
|
||||
REC_FUNC( MULTU1 );
|
||||
|
||||
REC_FUNC(DIV);
|
||||
REC_FUNC(DIVU);
|
||||
REC_FUNC( DIV1 );
|
||||
REC_FUNC( DIVU1 );
|
||||
|
||||
REC_FUNC( MADD );
|
||||
REC_FUNC( MADDU );
|
||||
REC_FUNC( MADD1 );
|
||||
REC_FUNC( MADDU1 );;
|
||||
|
||||
#else
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recMULT( void )
|
||||
{
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
|
||||
MOV32RtoR( ECX, EDX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX );
|
||||
if ( _Rd_ )
|
||||
{
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
MOV32RtoR( EAX, ECX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recMULTU( void )
|
||||
{
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
|
||||
MOV32RtoR( ECX, EDX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX );
|
||||
if ( _Rd_ != 0 )
|
||||
{
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
MOV32RtoR( EAX, ECX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
REC_FUNC( MULT1, _Rd_ );
|
||||
REC_FUNC( MULTU1, _Rd_ );
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDIV( void )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
OR32RtoR( ECX, ECX );
|
||||
j8Ptr[ 0 ] = JE8( 0 );
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
// XOR32RtoR( EDX,EDX );
|
||||
CDQ();
|
||||
IDIV32R( ECX );
|
||||
|
||||
MOV32RtoR( ECX, EDX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX );
|
||||
|
||||
MOV32RtoR( EAX, ECX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX );
|
||||
|
||||
x86SetJ8( j8Ptr[ 0 ] );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDIVU( void )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
OR32RtoR( ECX, ECX );
|
||||
j8Ptr[ 0 ] = JE8( 0 );
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
XOR32RtoR( EDX, EDX );
|
||||
// CDQ();
|
||||
DIV32R( ECX );
|
||||
|
||||
MOV32RtoR( ECX, EDX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX );
|
||||
|
||||
MOV32RtoR( EAX,ECX );
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX );
|
||||
x86SetJ8( j8Ptr[ 0 ] );
|
||||
}
|
||||
|
||||
REC_FUNC( DIV1, _Rd_ );
|
||||
REC_FUNC( DIVU1, _Rd_ );
|
||||
|
||||
REC_FUNC( MADD, _Rd_ );
|
||||
REC_FUNC( MADDU, _Rd_ );
|
||||
REC_FUNC( MADD1, _Rd_ );
|
||||
REC_FUNC( MADDU1, _Rd_ );
|
||||
|
||||
#endif
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,264 +0,0 @@
|
||||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2008 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
// stop compiling if NORECBUILD build (only for Visual Studio)
|
||||
#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "Common.h"
|
||||
#include "InterTables.h"
|
||||
#include "ix86/ix86.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
|
||||
#ifdef _WIN32
|
||||
#pragma warning(disable:4244)
|
||||
#pragma warning(disable:4761)
|
||||
#endif
|
||||
|
||||
/*********************************************************
|
||||
* Shift arithmetic with constant shift *
|
||||
* Format: OP rd, rt, sa *
|
||||
*********************************************************/
|
||||
#ifndef SHIFT_RECOMPILE
|
||||
|
||||
REC_FUNC(SLL);
|
||||
REC_FUNC(SRL);
|
||||
REC_FUNC(SRA);
|
||||
REC_FUNC(DSLL);
|
||||
REC_FUNC(DSRL);
|
||||
REC_FUNC(DSRA);
|
||||
REC_FUNC(DSLL32);
|
||||
REC_FUNC(DSRL32);
|
||||
REC_FUNC(DSRA32);
|
||||
|
||||
REC_FUNC(SLLV);
|
||||
REC_FUNC(SRLV);
|
||||
REC_FUNC(SRAV);
|
||||
REC_FUNC(DSLLV);
|
||||
REC_FUNC(DSRLV);
|
||||
REC_FUNC(DSRAV);
|
||||
|
||||
#else
|
||||
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRA( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Sa_ != 0 ) {
|
||||
SAR64ItoR( RAX, _Sa_ );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRA32(void) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
SAR64ItoR( RAX, _Sa_ + 32 );
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLL(void) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
if (_Sa_ != 0) {
|
||||
SHL32ItoR(EAX, _Sa_);
|
||||
}
|
||||
CDQ();
|
||||
MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX);
|
||||
MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], EDX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSRL(void) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]);
|
||||
if (_Sa_ != 0) {
|
||||
SHR32ItoR(EAX, _Sa_);
|
||||
}
|
||||
CDQ();
|
||||
MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX);
|
||||
MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], EDX);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSRA(void) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Sa_ != 0 ) {
|
||||
SAR32ItoR( EAX, _Sa_);
|
||||
}
|
||||
CDQ();
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSLL(void) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Sa_ != 0 ) {
|
||||
SHL64ItoR( RAX, _Sa_ );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRL( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Sa_ != 0 ) {
|
||||
SHR64ItoR( RAX, _Sa_ );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSLL32(void) {
|
||||
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
SHL64ItoR( RAX, _Sa_ + 32 );
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRL32( void ) {
|
||||
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
SHR64ItoR( RAX, _Sa_ + 32 );
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
/*********************************************************
|
||||
* Shift arithmetic with variant register shift *
|
||||
* Format: OP rd, rt, rs *
|
||||
*********************************************************/
|
||||
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSLLV( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 ) {
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x1f );
|
||||
SHL32CLtoR( EAX );
|
||||
}
|
||||
CDQ();
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSRLV( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x1f );
|
||||
SHR32CLtoR( EAX );
|
||||
}
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recSRAV( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x1f );
|
||||
SAR32CLtoR( EAX );
|
||||
}
|
||||
CDQ( );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX );
|
||||
MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSLLV( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x3f );
|
||||
SHL64CLtoR( RAX );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRLV( void ) {
|
||||
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x3f );
|
||||
SHR64CLtoR( RAX );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
void recDSRAV( void ) {
|
||||
if (!_Rd_) return;
|
||||
|
||||
MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] );
|
||||
if ( _Rs_ != 0 )
|
||||
{
|
||||
MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
|
||||
AND32ItoR( ECX, 0x3f );
|
||||
SAR64CLtoR( RAX );
|
||||
}
|
||||
MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX );
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif // PCSX2_NORECBUILD
|
||||
@@ -1,9 +0,0 @@
|
||||
INCLUDES = -I@srcdir@/.. -I@srcdir@/../../
|
||||
noinst_LIBRARIES = libix86.a
|
||||
|
||||
libix86_a_SOURCES = ix86_3dnow.c ix86.c ix86_cpudetect.c ix86_fpu.c ix86.h ix86_sse.c
|
||||
|
||||
if X86_64
|
||||
else
|
||||
libix86_a_SOURCES += ix86_mmx.c
|
||||
endif
|
||||
@@ -1,6 +0,0 @@
|
||||
noinst_LIBRARIES = libpcsx2zlib.a
|
||||
|
||||
libpcsx2zlib_a_SOURCES = \
|
||||
adler32.c crc32.c deflate.h inffast.c inflate.c inftrees.h trees.h zlib.h \
|
||||
crc32.h gzio.c inffast.h inflate.h uncompr.c zutil.c \
|
||||
compress.c deflate.c infback.c inffixed.h inftrees.c trees.c zconf.h zutil.h
|
||||
Reference in New Issue
Block a user