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Couple of counter gate fixes to stop normal updates of them. Fixed a vif stall issue, jiggled some mfifo stuff about to improve how it works slightly and reduce the amount of silly condition checks needed

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This commit is contained in:
refractionpcsx2
2008-01-15 23:32:08 +00:00
parent e8e22271e4
commit 3b518d3772
6 changed files with 181 additions and 119 deletions
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4
pcsx2/Counters.c
View File

@@ -472,6 +472,10 @@ void rcntUpdate()
{
int i;
for (i=0; i<=3; i++) {
if(gates & (1<<i)){
//SysPrintf("Stopped accidental update of ee counter %x when using a gate\n", i);
continue;
}
if ((counters[i].mode & 0x80)) counters[i].count += (int)((cpuRegs.cycle - counters[i].sCycleT) / counters[i].rate);
counters[i].sCycleT = cpuRegs.cycle - ((cpuRegs.cycle - counters[i].sCycleT) % counters[i].rate);
}

102
pcsx2/GS.cpp
View File

@@ -1070,10 +1070,7 @@ void GIFdma() {
SysPrintf("DMA Stall Control %x\n",(psHu32(DMAC_CTRL) & 0xC0));
}*/
if ((psHu32(DMAC_CTRL) & 0xC) == 0xC ) { // GIF MFIFO
gifMFIFOInterrupt();
return;
}
if( (psHu32(GIF_CTRL) & 8) ) {
// temporarily stop
SysPrintf("Gif dma temp paused?\n");
@@ -1264,6 +1261,13 @@ void dmaGIF() {
if(gif->qwc > 0 && (gif->chcr & 0x4) == 0x4)
gspath3done = 1; //Halflife sets a QWC amount in chain mode, no tadr set.
if ((psHu32(DMAC_CTRL) & 0xC) == 0xC ) { // GIF MFIFO
//SysPrintf("GIF MFIFO\n");
gifMFIFOInterrupt();
return;
}
GIFdma();
}
@@ -1281,6 +1285,7 @@ int mfifoGIFrbTransfer() {
u32 maddr = psHu32(DMAC_RBOR);
int msize = psHu32(DMAC_RBSR)+16;
u32 qwc = (psHu32(GIF_MODE) & 0x4) ? min(8, (int)gif->qwc) : gif->qwc;
int mfifoqwc = ((gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) ? min(gif->qwc, qwc) : qwc;
u32 *src;
if(qwc > gifqwc) qwc = gifqwc;
@@ -1288,9 +1293,9 @@ int mfifoGIFrbTransfer() {
if (qwc == 0) return 0;
/* Check if the transfer should wrap around the ring buffer */
if ((gif->madr+qwc*16) >= (maddr+msize)) {
if ((gif->madr+mfifoqwc*16) >= (maddr+msize)) {
int s1 = (maddr+msize) - gif->madr;
int s2 = qwc*16 - s1;
int s2 = mfifoqwc*16 - s1;
/* it does, so first copy 's1' bytes from 'addr' to 'data' */
src = (u32*)PSM(gif->madr);
@@ -1308,13 +1313,13 @@ int mfifoGIFrbTransfer() {
src = (u32*)PSM(gif->madr);
if (src == NULL) return -1;
WRITERING_DMA(src, qwc);
WRITERING_DMA(src, mfifoqwc);
}
gifqwc -= qwc;
gif->qwc -= qwc;
gif->madr+= qwc*16;
mfifocycles+= (qwc) * 2; /* guessing */
gifqwc -= mfifoqwc;
gif->qwc -= mfifoqwc;
gif->madr+= mfifoqwc*16;
mfifocycles+= (mfifoqwc) * 2; /* guessing */
gif->madr = psHu32(DMAC_RBOR) + (gif->madr & psHu32(DMAC_RBSR));
return 0;
@@ -1331,13 +1336,14 @@ int mfifoGIFchain() {
if (mfifoGIFrbTransfer() == -1) return -1;
} else {
u32 qwc = (psHu32(GIF_MODE) & 0x4) ? min(8, (int)gif->qwc) : gif->qwc;
int mfifoqwc = ((gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) ? min(gif->qwc, qwc) : qwc;
u32 *pMem = (u32*)dmaGetAddr(gif->madr);
if (pMem == NULL) return -1;
WRITERING_DMA(pMem, qwc);
gif->madr+= qwc*16;
gif->qwc -= qwc;
mfifocycles+= (qwc) * 2; /* guessing */
WRITERING_DMA(pMem, mfifoqwc);
gif->madr+= mfifoqwc*16;
gif->qwc -= mfifoqwc;
mfifocycles+= (mfifoqwc) * 2; /* guessing */
}
@@ -1393,32 +1399,32 @@ void mfifoGIFtransfer(int qwc) {
GIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x\n",
ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr);
#endif
gifqwc--;
switch (id) {
case 0: // Refe - Transfer Packet According to ADDR field
/*if(gifqwc < gif->qwc && (gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
//SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
return;
}*/
if(gifqwc < gif->qwc && (gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
//return;
}
gif->tadr += 16;
gifdone = 2; //End Transfer
break;
case 1: // CNT - Transfer QWC following the tag.
/*if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
//SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
return;
}*/
if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
//return;
}
gif->madr = gif->tadr + 16; //Set MADR to QW after Tag
gif->tadr = gif->madr + (gif->qwc << 4); //Set TADR to QW following the data
gifdone = 0;
break;
case 2: // Next - Transfer QWC following tag. TADR = ADDR
/*if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
//SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
return;
}*/
if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
//return;
}
temp = gif->madr; //Temporarily Store ADDR
gif->madr = gif->tadr + 16; //Set MADR to QW following the tag
gif->tadr = temp; //Copy temporarily stored ADDR to Tag
@@ -1427,25 +1433,25 @@ void mfifoGIFtransfer(int qwc) {
case 3: // Ref - Transfer QWC from ADDR field
case 4: // Refs - Transfer QWC from ADDR field (Stall Control)
/*if(gifqwc < gif->qwc && (gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
//SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
return;
}*/
if(gifqwc < gif->qwc && (gif->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
//return;
}
gif->tadr += 16; //Set TADR to next tag
gifdone = 0;
break;
case 7: // End - Transfer QWC following the tag
/*if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
//SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
return;
}*/
if(gifqwc < gif->qwc && ((gif->tadr + 16) & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
SysPrintf("Sliced GIF MFIFO Transfer %d\n", id);
//return;
}
gif->madr = gif->tadr + 16; //Set MADR to data following the tag
gif->tadr = gif->madr + (gif->qwc << 4); //Set TADR to QW following the data
gifdone = 2; //End Transfer
break;
}
gifqwc--;
//SysPrintf("GIF MFIFO qwc %d gif qwc %d, madr = %x, tadr = %x\n", qwc, gif->qwc, gif->madr, gif->tadr);
gif->tadr = psHu32(DMAC_RBOR) + (gif->tadr & psHu32(DMAC_RBSR));
@@ -1481,11 +1487,11 @@ void mfifoGIFtransfer(int qwc) {
}*/
if(gif->qwc == 0 && gifdone == 2) gifdone = 1;
if(gifqwc == 0) psHu32(GIF_STAT) &= ~0xE00;
//if(gifqwc == 0) psHu32(GIF_STAT) &= ~0xE00;
INT(11,mfifocycles);
//hwDmacIrq(1);
#ifdef SPR_LOG
SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
#ifdef GIF_LOG
GIF_LOG("mfifoGIFtransfer end %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
#endif
}
@@ -1493,23 +1499,25 @@ void gifMFIFOInterrupt()
{
mfifocycles = 0;
if(!(gif->chcr & 0x100)) {cpuRegs.interrupt &= ~(1 << 11); return ; }
else if(gifqwc == 0 && (gifdone == 0 || gif->qwc > 0)) {
if(gifqwc <= 0 && gifdone == 0) {
//SysPrintf("Empty\n");
psHu32(GIF_STAT)&= ~0xE00; // OPH=0 | APATH=0
hwDmacIrq(14);
cpuRegs.interrupt &= ~(1 << 11);
cpuRegs.interrupt &= ~(1 << 11);
return;
}
}
if(!(gif->chcr & 0x100)) { SysPrintf("WTF GIFMFIFO\n");cpuRegs.interrupt &= ~(1 << 11); return ; }
if(gifdone != 1) {
mfifoGIFtransfer(0);
if(gifqwc == 0 || (gif->tadr == spr0->madr)) {cpuRegs.interrupt &= ~(1 << 11); return; }
else return;
return;
}
if(gifdone == 0 || gif->qwc > 0) {
SysPrintf("Shouldnt go here\n");
cpuRegs.interrupt &= ~(1 << 11);
return;
}
gifqwc = 0;
gifdone = 0;
gif->chcr &= ~0x100;
hwDmacIrq(DMAC_GIF);

8
pcsx2/PsxCounters.c
View File

@@ -213,7 +213,7 @@ void psxCheckStartGate(int counter) { //Check Gate events when Vsync Starts
if(counter < 3){ //Gates for 16bit counters
if((psxCounters[i].mode & 0x1) == 0) return; //Ignore Gate
SysPrintf("PSX Gate %x\n", i);
//SysPrintf("PSX Gate %x\n", i);
switch((psxCounters[i].mode & 0x6) >> 1) {
case 0x0: //GATE_ON_count
psxRcntUpd32(i);
@@ -238,7 +238,7 @@ void psxCheckStartGate(int counter) { //Check Gate events when Vsync Starts
if(counter >= 3){ //Gates for 32bit counters
if((psxCounters[i].mode & 0x1) == 0) return; //Ignore Gate
SysPrintf("PSX Gate %x\n", i);
//SysPrintf("PSX Gate %x\n", i);
switch((psxCounters[i].mode & 0x6) >> 1) {
case 0x0: //GATE_ON_count
psxRcntUpd32(i);
@@ -383,6 +383,10 @@ void psxRcntUpdate() {
int i;
for (i=0; i<=5; i++) {
if((psxCounters[i].mode & 0x1) != 0){
//SysPrintf("Stopped accidental update of psx counter %x when using a gate\n", i);
continue;
}
psxCounters[i].count += (psxRegs.cycle - psxCounters[i].sCycleT) / psxCounters[i].rate;
psxCounters[i].sCycleT = psxRegs.cycle - ((psxRegs.cycle - psxCounters[i].sCycleT) % psxCounters[i].rate);
}

42
pcsx2/SPR.c
View File

@@ -220,36 +220,40 @@ void _dmaSPR0() {
INT(8, cycles);
}
void SPRFROMinterrupt()
{
spr0->chcr&= ~0x100;
hwDmacIrq(8);
cpuRegs.interrupt &= ~(1 << 8);
}
extern int vifqwc;
extern void mfifoGIFtransfer(int);
#define gif ((DMACh*)&PS2MEM_HW[0xA000])
int transqwc = 0;
void SPRFROMinterrupt()
{
if ((psHu32(DMAC_CTRL) & 0xC) == 0xC) { // GIF MFIFO
spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR));
//SysPrintf("mfifoGIFtransfer %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
mfifoGIFtransfer(transqwc);
} else
if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) { // VIF1 MFIFO
spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR));
//SysPrintf("mfifoVIF1transfer %x madr %x, tadr %x\n", vif1ch->chcr, vif1ch->madr, vif1ch->tadr);
//vifqwc+= qwc;
mfifoVIF1transfer(transqwc);
}
transqwc = 0;
spr0->chcr&= ~0x100;
hwDmacIrq(8);
cpuRegs.interrupt &= ~(1 << 8);
}
void dmaSPR0() { // fromSPR
int qwc = spr0->qwc;
if ((psHu32(DMAC_CTRL) & 0xC))transqwc = spr0->qwc;
#ifdef SPR_LOG
SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n",
spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr);
#endif
_dmaSPR0();
if ((psHu32(DMAC_CTRL) & 0xC) == 0xC) { // GIF MFIFO
spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR));
//SysPrintf("mfifoGIFtransfer %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr);
mfifoGIFtransfer(qwc);
} else
if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) { // VIF1 MFIFO
spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR));
//SysPrintf("mfifoVIF1transfer %x madr %x, tadr %x\n", vif1ch->chcr, vif1ch->madr, vif1ch->tadr);
//vifqwc+= qwc;
mfifoVIF1transfer(qwc);
}
FreezeMMXRegs(0);
FreezeXMMRegs(0);

120
pcsx2/Vif.c
View File

@@ -413,18 +413,22 @@ int vifqwc = 0;
int mfifoVIF1rbTransfer() {
u32 maddr = psHu32(DMAC_RBOR);
int msize = psHu32(DMAC_RBSR)+16, ret;
int mfifoqwc = ((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR) && vif1.vifstalled == 0) ? min(vif1ch->qwc, vifqwc) : vif1ch->qwc;
u32 *src;
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR) && vif1.vifstalled == 0) {
if(vifqwc < vif1ch->qwc)vifqwc = 0;
else vifqwc -= vif1ch->qwc;
}
/* Check if the transfer should wrap around the ring buffer */
if ((vif1ch->madr+(vif1ch->qwc << 4)) >= (maddr+msize)) {
if ((vif1ch->madr+(mfifoqwc << 4)) >= (maddr+msize)) {
int s1 = (maddr+msize) - vif1ch->madr;
int s2 = (vif1ch->qwc << 4) - s1;
int s2 = (mfifoqwc << 4) - s1;
/*#ifdef VIF_LOG
VIF_LOG("Split\n");
VIF_LOG("Split\n");
#endif*/
/* it does, so first copy 's1' bytes from 'addr' to 'data' */
src = (u32*)PSM(vif1ch->madr);
@@ -452,9 +456,9 @@ int mfifoVIF1rbTransfer() {
src = (u32*)PSM(vif1ch->madr);
if (src == NULL) return -1;
if(vif1.vifstalled == 1)
ret = VIF1transfer(src+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0);
ret = VIF1transfer(src+vif1.irqoffset, mfifoqwc*4-vif1.irqoffset, 0);
else
ret = VIF1transfer(src, vif1ch->qwc << 2, 0);
ret = VIF1transfer(src, mfifoqwc << 2, 0);
if(ret == -2) return ret;
vif1ch->madr = psHu32(DMAC_RBOR) + (vif1ch->madr & psHu32(DMAC_RBSR));
//assert(ret == 0 ); // vif stall code not implemented
@@ -483,16 +487,20 @@ int mfifoVIF1chain() {
//vifqwc -= (mfifoqwc - vif1ch->qwc);
//SysPrintf("end MFIFO QWC %x, VIF QWC %x oldqwc %x taken from vifqwc %x\n", vifqwc, vif1ch->qwc, mfifoqwc, (mfifoqwc - vif1ch->qwc));
} else {
int mfifoqwc = vif1ch->qwc;
int mfifoqwc = ((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR) && vif1.vifstalled == 0) ? min(vif1ch->qwc, vifqwc) : vif1ch->qwc;
u32 *pMem = (u32*)dmaGetAddr(vif1ch->madr);
if (pMem == NULL) return -1;
/*#ifdef VIF_LOG
VIF_LOG("Other src\n");
#endif*/
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR) && vif1.vifstalled == 0) {
if(vifqwc < vif1ch->qwc)vifqwc = 0;
else vifqwc -= vif1ch->qwc;
}
if(vif1.vifstalled == 1){
ret = VIF1transfer(pMem+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0);
ret = VIF1transfer(pMem+vif1.irqoffset, mfifoqwc*4-vif1.irqoffset, 0);
}else
ret = VIF1transfer(pMem, vif1ch->qwc << 2, 0);
ret = VIF1transfer(pMem, mfifoqwc << 2, 0);
//assert(ret == 0 ); // vif stall code not implemented
//vif1ch->madr+= (vif1ch->qwc << 4);
@@ -525,9 +533,38 @@ void mfifoVIF1transfer(int qwc) {
#ifdef VIF_LOG
VIF_LOG("Added %x qw to mfifo, total now %x\n", qwc, vifqwc);
#endif
if((vif1ch->chcr & 0x100) == 0) return;
}
//if(qwc > 0) SysPrintf("Added %x to MFIFO, new total %x\n", qwc, vifqwc);
if(vifqwc < 0 || (vif1ch->chcr & 0x100) == 0) return;
if(vifqwc < 0 || (vif1ch->chcr & 0x100) == 0) {
SysPrintf("WTF\n");
return;
}
if(vif1.vifstalled == 1 && vif1.stallontag == 0){
ret = mfifoVIF1chain();
if (ret == -1) {
SysPrintf("VIF MFIFO Stall dmaChain error madr=%lx, tadr=%lx\n",
vif1ch->madr, vif1ch->tadr);
vif1.done = 1;
INT(10,g_vifCycles);
}
if(ret == -2){
//SysPrintf("VIF MFIFO Stall\n");
//vif1.vifstalled = 1;
#ifdef VIF_LOG
VIF_LOG("MFIFO Stall\n");
#endif
FreezeMMXRegs(0);
FreezeXMMRegs(0);
}
INT(10,g_vifCycles);
return;
}
if((vif1ch->tadr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) {
SysPrintf("VIF MFIFO TADR out of range\n");
}
//if(vif1.vifstalled == 1 && (vif1Regs->stat & (VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS)))return;
/*if(vifqwc == 0) {
//#ifdef PCSX2_DEVBUILD
@@ -551,13 +588,12 @@ void mfifoVIF1transfer(int qwc) {
if(vif1ch->tadr == spr0->madr) {
#ifdef PCSX2_DEVBUILD
/*if( vifqwc > 1 )
SysPrintf("vif mfifo tadr==madr but qwc = %d\n", vifqwc);*/
SysPrintf("vif mfifo tadr==madr but qwc = %d\n", vifqwc);
#endif
FreezeMMXRegs(0);
/*FreezeMMXRegs(0);
FreezeXMMRegs(0);
//hwDmacIrq(14);
return;
return;*/
}
ptag = (u32*)dmaGetAddr(vif1ch->tadr);
@@ -605,10 +641,11 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 2; //End Transfer
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
if(vifqwc < vif1ch->qwc) {
vifqwc -= vif1ch->qwc;
FreezeMMXRegs(0);
SysPrintf("Crap\n");
//vifqwc -= vif1ch->qwc;
/*FreezeMMXRegs(0);
FreezeXMMRegs(0);
return;
return;*/
}
}
break;
@@ -619,10 +656,11 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 0;
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
if(vifqwc < vif1ch->qwc) {
vifqwc -= vif1ch->qwc;
SysPrintf("Crap\n");
/*vifqwc -= vif1ch->qwc;
FreezeMMXRegs(0);
FreezeXMMRegs(0);
return;
return;*/
}
}
break;
@@ -634,10 +672,11 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 0;
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
if(vifqwc < vif1ch->qwc) {
vifqwc -= vif1ch->qwc;
SysPrintf("Crap\n");
/*vifqwc -= vif1ch->qwc;
FreezeMMXRegs(0);
FreezeXMMRegs(0);
return;
return;*/
}
}
break;
@@ -648,10 +687,11 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 0;
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
if(vifqwc < vif1ch->qwc) {
vifqwc -= vif1ch->qwc;
SysPrintf("Crap\n");
/*vifqwc -= vif1ch->qwc;
FreezeMMXRegs(0);
FreezeXMMRegs(0);
return;
return;*/
}
}
break;
@@ -662,10 +702,11 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 2; //End Transfer
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)) {
if(vifqwc < vif1ch->qwc) {
vifqwc -= vif1ch->qwc;
SysPrintf("Crap\n");
/*vifqwc -= vif1ch->qwc;
FreezeMMXRegs(0);
FreezeXMMRegs(0);
return;
return;*/
}
}
break;
@@ -677,9 +718,7 @@ void mfifoVIF1transfer(int qwc) {
//SysPrintf("VIF1 MFIFO qwc %d vif1 qwc %d, madr = %x, tadr = %x\n", qwc, vif1ch->qwc, vif1ch->madr, vif1ch->tadr);
if((vif1ch->madr & ~psHu32(DMAC_RBSR)) == psHu32(DMAC_RBOR)){
vifqwc -= vif1ch->qwc;
}
//}
if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31)) {
#ifdef VIF_LOG
@@ -690,8 +729,7 @@ void mfifoVIF1transfer(int qwc) {
vif1.done = 2;
}
//if(vif1ch->qwc == 0 && vifqwc > 0 && done == 0) mfifoVIF1transfer(0);
}
} else if(vifqwc == 0) SysPrintf("poo\n");
ret = mfifoVIF1chain();
if (ret == -1) {
SysPrintf("VIF dmaChain error %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
@@ -724,8 +762,8 @@ void mfifoVIF1transfer(int qwc) {
//SysPrintf("vifqwc %x, vif1ch->qwc %x, vifstalled %x, vifdone %x\n", vifqwc, vif1ch->qwc, vif1.vifstalled, vif1.done);
if(vif1.done == 2 && vif1ch->qwc == 0) vif1.done = 1;
if(vifqwc <= 0 && vif1.done == 0 && vif1.vifstalled == 0) hwDmacIrq(14);
INT(10,g_vifCycles);
INT(10,g_vifCycles);
// if(vifqwc == 0) vif1Regs->stat&= ~0x1F000000; // FQC=0
//hwDmacIrq(1);
@@ -743,6 +781,12 @@ void mfifoVIF1transfer(int qwc) {
void vifMFIFOInterrupt()
{
if(vifqwc <= 0 && vif1.done == 0 && vif1.vifstalled == 0) {
//SysPrintf("Empty\n");
hwDmacIrq(14);
cpuRegs.interrupt &= ~(1 << 10);
return;
}
if(!(vif1ch->chcr & 0x100)) { cpuRegs.interrupt &= ~(1 << 10); return; }
//if(vif1.vifstalled == 1 && (vif1Regs->stat & (VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS))) {
if(vif1.irq && vif1.tag.size == 0) {
@@ -761,15 +805,11 @@ if(!(vif1ch->chcr & 0x100)) { cpuRegs.interrupt &= ~(1 << 10); return; }
}
//}
if(vif1.done != 1) {
if(vif1.done != 1 || vif1ch->qwc != 0) {
mfifoVIF1transfer(0);
if(vifqwc <= 0 && vif1.done != 1) { cpuRegs.interrupt &= ~(1 << 10); return; }
else {
if((vif1ch->madr == spr0->madr && vif1ch->tadr == spr0->madr) && vif1.done == 0) cpuRegs.interrupt &= ~(1 << 10);
return;
}
} else if(vif1.done != 1) { cpuRegs.interrupt &= ~(1 << 10); return; }
return;
}
vifqwc = 0;
vif1.done = 0;
vif1ch->chcr &= ~0x100;
hwDmacIrq(DMAC_VIF1);

24
pcsx2/VifDma.c
View File

@@ -1087,12 +1087,9 @@ int VIF0transfer(u32 *data, int size, int istag) {
VIF_LOG( "Interrupt on VIFcmd: %x (INTC_MASK = %x)\n", vif0.cmd, psHu32(INTC_MASK) );
#endif
if(((vif0Regs->code >> 24) & 0x7f) != 0x7)vif0Regs->stat|= VIF0_STAT_VIS;
else SysPrintf("VIF0 IRQ on MARK\n");
++vif0.irq;
vif0.cmd &= 0x7f;
if(istag) vif0.stallontag = 1;
if(istag && vif0.tag.size == 0) vif0.stallontag = 1;
}
}
g_vifCycles+= (transferred >> 2)*BIAS; /* guessing */
@@ -1101,9 +1098,11 @@ int VIF0transfer(u32 *data, int size, int istag) {
if( !vif0.tag.size )
vif0Regs->stat &= ~VIF0_STAT_VPS_W;
if ((vif0Regs->stat & VIF0_STAT_VIS) && vif0.tag.size == 0) {
if (vif0.irq && vif0.tag.size == 0) {
vif0.vifstalled = 1;
if(((vif0Regs->code >> 24) & 0x7f) != 0x7)vif0Regs->stat|= VIF0_STAT_VIS;
else SysPrintf("VIF0 IRQ on MARK\n");
// spiderman doesn't break on qw boundaries
vif0.irqoffset = transferred%4; // cannot lose the offset
if(vif0.tag.size > 0) SysPrintf("Oh dear, possible VIF0 stall problem. CMD %x, tag.size %x\n", vif0.cmd, vif0.tag.size);
@@ -1947,11 +1946,11 @@ int VIF1transfer(u32 *data, int size, int istag) {
/*if((psHu32(DMAC_CTRL) & 0xC) == 0x8){
SysPrintf("VIF1 Stall on MFIFO, not implemented!\n");
}*/
if(((vif1Regs->code >> 24) & 0x7f) != 0x7)vif1Regs->stat|= VIF1_STAT_VIS;
else SysPrintf("Stall on Vif1 MARK\n");
++vif1.irq;
vif1.cmd &= 0x7f;
if(istag) vif1.stallontag = 1;
if(istag && vif1.tag.size == 0) vif1.stallontag = 1;
}
}
g_vifCycles+= (transferred>>2)*BIAS; /* guessing */
@@ -1960,8 +1959,10 @@ int VIF1transfer(u32 *data, int size, int istag) {
if( !vif1.tag.size )
vif1Regs->stat &= ~VIF1_STAT_VPS_W;
if ((vif1Regs->stat & VIF1_STAT_VIS) && vif1.tag.size == 0) {
if (vif1.irq && vif1.tag.size == 0) {
vif1.vifstalled = 1;
if(((vif1Regs->code >> 24) & 0x7f) != 0x7)vif1Regs->stat|= VIF1_STAT_VIS;
else SysPrintf("Stall on Vif1 MARK\n");
// spiderman doesn't break on qw boundaries
vif1.irqoffset = transferred%4; // cannot lose the offset
if(vif1.tag.size > 0) SysPrintf("Oh dear, possible VIF1 stall problem. CMD %x, tag.size %x\n", vif1.cmd, vif1.tag.size);
@@ -2190,7 +2191,7 @@ void vif1Interrupt() {
extern void gsWaitGS();
extern u32 g_MTGSVifStart, g_MTGSVifCount;
#define spr0 ((DMACh*)&PS2MEM_HW[0xD000])
void dmaVIF1()
{
@@ -2240,7 +2241,8 @@ void dmaVIF1()
}*/
if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) { // VIF MFIFO
vifMFIFOInterrupt();
//SysPrintf("VIFMFIFO\n");
if(vif1ch->madr != spr0->madr)vifMFIFOInterrupt();
return;
}