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IOP: Switch to 64bit cycle counter

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This commit is contained in:
Ziemas
2026-03-07 09:31:05 -05:00
committed by Ty
parent 14db91f756
commit 9a2561d9cf
13 changed files with 37 additions and 36 deletions
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pcsx2/HwWrite.cpp
+1 -1
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@@ -175,7 +175,7 @@ void _hwWrite32( u32 mem, u32 value )
}
if (value & (1 << 19))
{
u32 cycle = psxRegs.cycle;
u64 cycle = psxRegs.cycle;
//pgifInit();
psxReset();
PSXCLK = 33868800;
pcsx2/IopCounters.cpp
+4 -3
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@@ -33,7 +33,7 @@
psxCounter psxCounters[NUM_COUNTERS];
s32 psxNextDeltaCounter;
u32 psxNextStartCounter;
u64 psxNextStartCounter;
bool hBlanking = false;
bool vBlanking = false;
@@ -132,7 +132,8 @@ static void _rcntSet(int cntidx)
return;
}
c = (u64)((overflowCap - counter.count) * counter.rate) - (psxRegs.cycle - counter.startCycle);
// FIXME: the u32 casts in this expression exist to match pre-64bit counter code, rewrite these
c = (u64)((overflowCap - counter.count) * counter.rate) - ((u32)psxRegs.cycle - (u32)counter.startCycle);
c += psxRegs.cycle - psxNextStartCounter; // adjust for time passed since last rcntUpdate();
if (c < (u64)psxNextDeltaCounter)
@@ -144,7 +145,7 @@ static void _rcntSet(int cntidx)
if (counter.target & IOPCNT_FUTURE_TARGET)
return;
c = (s64)((counter.target - counter.count) * counter.rate) - (psxRegs.cycle - counter.startCycle);
c = (s64)((counter.target - counter.count) * counter.rate) - ((u32)psxRegs.cycle - (u32)counter.startCycle);
c += psxRegs.cycle - psxNextStartCounter; // adjust for time passed since last rcntUpdate();
if (c < (u64)psxNextDeltaCounter)
pcsx2/IopCounters.h
+1 -1
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@@ -38,7 +38,7 @@ struct psxCounter {
u64 count, target;
u32 rate, interrupt;
u32 startCycle;
u64 startCycle;
s32 deltaCycles;
psxCounterMode mode;
pcsx2/IopHw.h
+1 -1
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@@ -316,7 +316,7 @@ enum IopEventId
extern void PSX_INT( IopEventId n, s32 ecycle);
extern int psxRemainingCycles(IopEventId n);
extern void psxSetNextBranch( u32 startCycle, s32 delta );
extern void psxSetNextBranch( u64 startCycle, s32 delta );
extern void psxSetNextBranchDelta( s32 delta );
extern void psxHwReset();
pcsx2/R3000A.cpp
+2 -2
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@@ -94,7 +94,7 @@ void psxException(u32 code, u32 bd)
}*/
}
__fi void psxSetNextBranch( u32 startCycle, s32 delta )
__fi void psxSetNextBranch( u64 startCycle, s32 delta )
{
// typecast the conditional to signed so that things don't blow up
// if startCycle is greater than our next branch cycle.
@@ -108,7 +108,7 @@ __fi void psxSetNextBranchDelta( s32 delta )
psxSetNextBranch( psxRegs.cycle, delta );
}
__fi int psxTestCycle( u32 startCycle, s32 delta )
__fi int psxTestCycle( u64 startCycle, s32 delta )
{
// typecast the conditional to signed so that things don't explode
// if the startCycle is ahead of our current cpu cycle.
pcsx2/R3000A.h
+4 -4
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@@ -94,12 +94,12 @@ struct psxRegisters {
CP2Ctrl CP2C; /* Cop2 control registers */
u32 pc; /* Program counter */
u32 code; /* The instruction */
u32 cycle;
u64 cycle;
u32 interrupt;
u32 pcWriteback;
// Controls when branch tests are performed.
u32 iopNextEventCycle;
u64 iopNextEventCycle;
// This value is used when the IOP execution is broken to return control to the EE.
// (which happens when the IOP throws EE-bound interrupts). It holds the value of
@@ -112,7 +112,7 @@ struct psxRegisters {
s32 iopCycleEE;
u32 iopCycleEECarry;
u32 sCycle[32]; // start cycle for signaled ints
u64 sCycle[32]; // start cycle for signaled ints
s32 eCycle[32]; // cycle delta for signaled ints (sCycle + eCycle == branch cycle)
//u32 _msflag[32];
//u32 _smflag[32];
@@ -167,7 +167,7 @@ alignas(16) extern psxRegisters psxRegs;
#endif
extern s32 psxNextDeltaCounter;
extern u32 psxNextStartCounter;
extern u64 psxNextStartCounter;
extern bool iopEventAction;
extern bool iopEventTestIsActive;
pcsx2/R3000AInterpreter.cpp
+1 -1
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@@ -270,7 +270,7 @@ static s32 intExecuteBlock( s32 eeCycles )
{
psxRegs.iopBreak = 0;
psxRegs.iopCycleEE = eeCycles;
u32 lastIOPCycle = 0;
u64 lastIOPCycle = 0;
while (psxRegs.iopCycleEE > 0)
{
pcsx2/SPU2/defs.h
+1 -1
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@@ -437,7 +437,7 @@ struct V_Core
u32 NoiseOut; // Noise Output
u16 AutoDMACtrl; // AutoDMA Status
s32 DMAICounter; // DMA Interrupt Counter
u32 LastClock; // DMA Interrupt Clock Cycle Counter
u64 LastClock; // DMA Interrupt Clock Cycle Counter
u32 InputDataLeft; // Input Buffer
u32 InputDataTransferred; // Used for simulating MADR increase (GTA VC)
u32 InputPosWrite;
pcsx2/SPU2/spu2.cpp
+1 -1
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@@ -24,7 +24,7 @@ namespace SPU2
static void InternalReset(bool psxmode);
} // namespace SPU2
u32 lClocks = 0;
u64 lClocks = 0;
static bool s_audio_capture_active = false;
static bool s_psxmode = false;
pcsx2/SPU2/spu2.h
+1 -1
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@@ -78,7 +78,7 @@ void SPU2interruptDMA7();
void SPU2readDMA7Mem(u16* pMem, u32 size);
void SPU2writeDMA7Mem(u16* pMem, u32 size);
extern u32 lClocks;
extern u64 lClocks;
extern void CounterUpdate(u32 DMAICounter);
extern void TimeUpdate(u32 cClocks);
pcsx2/SPU2/spu2freeze.cpp
+1 -1
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@@ -34,7 +34,7 @@ struct SPU2Savestate::DataBlock
u16 OutPos;
u16 InputPos;
u32 Cycles;
u32 lClocks;
u64 lClocks;
int PlayMode;
};
pcsx2/SPU2/spu2sys.cpp
+1 -1
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@@ -257,7 +257,7 @@ __forceinline void CheckDMAProgress(int cid)
if (core.DMAICounter > 0 && (psxRegs.cycle - core.LastClock) > 0)
{
const u32 amt = std::min(psxRegs.cycle - core.LastClock, (u32)core.DMAICounter);
const u32 amt = std::min<u64>(psxRegs.cycle - core.LastClock, (u32)core.DMAICounter);
core.DMAICounter -= amt;
core.LastClock = psxRegs.cycle;
pcsx2/x86/iR3000A.cpp
+18 -18
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@@ -1146,17 +1146,17 @@ static void iPsxBranchTest(u32 newpc, u32 cpuBranch)
if (EmuConfig.Speedhacks.WaitLoop && s_nBlockFF && newpc == s_branchTo)
{
xMOV(eax, ptr32[&psxRegs.cycle]);
xMOV(ecx, eax);
xMOV(edx, ptr32[&psxRegs.iopCycleEE]);
xADD(edx, 7);
xSHR(edx, 3);
xADD(eax, edx);
xCMP(eax, ptr32[&psxRegs.iopNextEventCycle]);
xCMOVNS(eax, ptr32[&psxRegs.iopNextEventCycle]);
xMOV(ptr32[&psxRegs.cycle], eax);
xSUB(eax, ecx);
xSHL(eax, 3);
xMOV(rax, ptr64[&psxRegs.cycle]);
xMOV(rcx, rax);
xMOV(rdx, ptr32[&psxRegs.iopCycleEE]);
xADD(rdx, 7);
xSHR(rdx, 3);
xADD(rax, rdx);
xCMP(rax, ptr64[&psxRegs.iopNextEventCycle]);
xCMOVNS(rax, ptr64[&psxRegs.iopNextEventCycle]);
xMOV(ptr64[&psxRegs.cycle], rax);
xSUB(rax, rcx);
xSHL(rax, 3);
iPsxAddEECycles(0xFFFFFFFF);
xJLE(iopExitRecompiledCode);
@@ -1170,16 +1170,16 @@ static void iPsxBranchTest(u32 newpc, u32 cpuBranch)
}
else
{
xMOV(ebx, ptr32[&psxRegs.cycle]);
xADD(ebx, blockCycles);
xMOV(ptr32[&psxRegs.cycle], ebx); // update cycles
xMOV(rbx, ptr64[&psxRegs.cycle]);
xADD(rbx, blockCycles);
xMOV(ptr64[&psxRegs.cycle], rbx); // update cycles
// jump if iopCycleEE <= 0 (iop's timeslice timed out, so time to return control to the EE)
iPsxAddEECycles(blockCycles);
xJLE(iopExitRecompiledCode);
// check if an event is pending
xSUB(ebx, ptr32[&psxRegs.iopNextEventCycle]);
xSUB(rbx, ptr64[&psxRegs.iopNextEventCycle]);
xForwardJS<u8> nointerruptpending;
xFastCall((void*)iopEventTest);
@@ -1225,7 +1225,7 @@ void rpsxSYSCALL()
xCMP(ptr32[&psxRegs.pc], psxpc - 4);
j8Ptr[0] = JE8(0);
xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles());
xADD(ptr64[&psxRegs.cycle], psxScaleBlockCycles());
iPsxAddEECycles(psxScaleBlockCycles());
JMP32((uptr)iopDispatcherReg - ((uptr)x86Ptr + 5));
@@ -1247,7 +1247,7 @@ void rpsxBREAK()
xCMP(ptr32[&psxRegs.pc], psxpc - 4);
j8Ptr[0] = JE8(0);
xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles());
xADD(ptr64[&psxRegs.cycle], psxScaleBlockCycles());
iPsxAddEECycles(psxScaleBlockCycles());
JMP32((uptr)iopDispatcherReg - ((uptr)x86Ptr + 5));
x86SetJ8(j8Ptr[0]);
@@ -1742,7 +1742,7 @@ StartRecomp:
pxAssert(!link_next_block);
else
{
xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles());
xADD(ptr64[&psxRegs.cycle], psxScaleBlockCycles());
iPsxAddEECycles(psxScaleBlockCycles());
}