Commit Graph

159350 Commits

Author SHA1 Message Date
Florian Hahn
2d05f76ffa [ValueLattice] Use union to shave off ptr size bytes from elements.
By using a union for Constant* and ConstantRange we can shave off ptr
size bytes off lattice elements. On 64 bit systems, it brings down the
size to 40 bytes from 48 bytes.

Initialization of Range happens on-demand using placement new, if the
state changes to constantrange from non-constantrange. Similarly, the
Range object is destroyed if the state changes from constantrange to
non-constantrange.

Reviewers: reames, anna, davide

Reviewed By: reames, davide

Differential Revision: https://reviews.llvm.org/D41903


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323049 91177308-0d34-0410-b5e6-96231b3b80d8
untagged-8a4b648117aef2132a93
2018-01-20 19:52:16 +00:00
Craig Topper
10fbe29b93 [X86] Add an override of targetShrinkDemandedConstant to limit the damage that shrinkdemandedbits can do to zext_in_reg operations
Summary:
This patch adds an implementation of targetShrinkDemandedConstant that tries to keep shrinkdemandedbits from removing bits that would otherwise have been recognized as a movzx.

We still need a follow patch to stop moving ands across srl if the and could be represented as a movzx before the shift but not after. I think this should help with some of the cases that D42088 ended up removing during isel.

Reviewers: spatel, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323048 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 18:50:09 +00:00
Simon Pilgrim
f91a072745 [X86][SSE] Check for out of bounds PEXTR/PINSR indices during faux shuffle combining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323045 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 17:16:01 +00:00
Jonas Paulsson
9ed46d5b97 Move new test from Generic to SystemZ.
A few build bots failed with r323042 because they are not configured to
build the SystemZ target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323044 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 16:57:06 +00:00
Sanjay Patel
58ea0e72d4 [InstCombine] add baseline tests for (X << Y) / X -> 1 << Y; NFC
This fold is proposed in D42032.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323043 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 16:13:40 +00:00
Jonas Paulsson
e64dbcb7af [SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
This was completely broken, but hopefully fixed by this patch.

In cases where it is needed, a vector with non byte-sized elements is stored
by extracting, zero-extending, shift:ing and or:ing the elements into an
integer of the same width as the vector, which is then stored.

Review: Eli Friedman, Ulrich Weigand
https://reviews.llvm.org/D42100#inline-369520
https://bugs.llvm.org/show_bug.cgi?id=35520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323042 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 16:05:10 +00:00
Martin Storsjo
9188313527 [COFF] Keep the underscore on exported decorated stdcall functions in MSVC mode
This (together with the corresponding LLD commit, that contains the
testcase updates) fixes PR35733.

Differential Revision: https://reviews.llvm.org/D41631

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323035 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 11:44:32 +00:00
David Green
6d979aef2d [Dominators] Fix some edge cases for PostDomTree updating
These fix some odd cfg cases where batch-updating the post
dom tree fails. Usually around infinite loops and roots
ending up being different.

Differential Revision: https://reviews.llvm.org/D42247



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323034 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 10:29:37 +00:00
Craig Topper
7987a0b910 [X86] Add some more v32i1 shuffle tests with shuffles between mask creation and mask usage rather than being just shuffling input arguments.
The existing tests just tested shuffles of v32i1 inputs, but arguments are promoted to v32i8. So it wasn't a good demonstration of v32i1 shuffle handling.

The new test cases use compares and selects to get k-register operations around the shuffle.

This is prep work for demonstrating changes from D42031.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323031 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 08:13:35 +00:00
Craig Topper
54aeb345dd [X86] Add test cases for failures to use movzx due to various issues with demanded bits.
D42265 and D42313 should help with some of these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323030 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 07:50:57 +00:00
Saleem Abdulrasool
7cc04d977c test: fix ARM tests harder
Remove the missed check update for the removal of the x86 specific
vector call on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323023 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 01:26:46 +00:00
Saleem Abdulrasool
d6398c64e4 test: move ARM test from x86
The ARM backend is not guaranteed to be present on x86, move the test to
the ARM tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323021 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 01:03:11 +00:00
Saleem Abdulrasool
860652c3f8 CodeGen: handle llvm.used properly for COFF
`llvm.used` contains a list of pointers to named values which the
compiler, assembler, and linker are required to treat as if there is a
reference that they cannot see.  Ensure that the symbols are preserved
by adding an explicit `-include` reference to the linker command.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323017 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 00:28:02 +00:00
Craig Topper
8bb1297fe0 [X86] Teach X86 codegen to use vector width preference to avoid promoting to 512-bit types when VLX is enabled and the preference is for a smaller size.
This change applies to places where we would turn 128/256-bit code into 512-bit in order to get a wider element type through sext/zext. Any 512-bit types that already existed in the IR/DAG will be left that way.

The width preference has no effect on codegen behavior when the target does not have AVX512 enabled. So AVX/AVX2 codegen cannot be limited via this mechanism yet.

If the preference is lower than 256 we may still use a 256 bit type to do the operation. Constraining to 128 bits makes it much more difficult to support some operations. For many of these cases we need to change element width while keeping element count constant which is easiest done by switching between 256 and 128 bit.

The preference is only obeyed when AVX512 and VLX are available. This means the preference is not obeyed for KNL, but is obeyed for SKX, Cannonlake, and Icelake. For KNL, the only way to do masked operation is on 512-bit registers so we would have to completely disable masking to obey the preference. We would also lose support for gather, scatter, ctlz, vXi64 multiplies, etc. This may change in the future, but this simplifies the initial implementation.

Differential Revision: https://reviews.llvm.org/D41895

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323016 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 00:26:12 +00:00
Craig Topper
2f472871bc [X86] Add support for passing 'prefer-vector-width' function attribute into X86Subtarget and exposing via X86's getRegisterWidth TTI interface.
This will cause the vectorizers to do some limiting of the vector widths they create. This is not a strict limit. There are reasons I know of that the loop vectorizer will generate larger vectors for.

I've written this in such a way that the interface will only return a properly supported width(0/128/256/512) even if the attribute says something funny like 384 or 10.

This has been split from D41895 with the remainder in a follow up commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323015 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 00:26:08 +00:00
Derek Schuff
889833f36e [WebAssembly] Fix MSVC build
nullptr_t can't be used left of boolean &&

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323012 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-20 00:01:18 +00:00
Akira Hatanaka
9b103df21b [ObjCARC] Do not turn a call to @objc_autoreleaseReturnValue into a call
to @objc_autorelease if its operand is a PHI and the PHI has an
equivalent value that is used by a return instruction.

For example, ARC optimizer shouldn't replace the call in the following
example, as doing so breaks the AutoreleaseRV/RetainRV optimization:

  %v1 = bitcast i32* %v0 to i8*
  br label %bb3
bb2:
  %v3 = bitcast i32* %v2 to i8*
  br label %bb3
bb3:
  %p = phi i8* [ %v1, %bb1 ], [ %v3, %bb2 ]
  %retval = phi i32* [ %v0, %bb1 ], [ %v2, %bb2 ] ; equivalent to %p
  %v4 = tail call i8* @objc_autoreleaseReturnValue(i8* %p)
  ret i32* %retval

Also, make sure ObjCARCContract replaces @objc_autoreleaseReturnValue's
operand uses with its value so that the call gets tail-called.

rdar://problem/15894705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323009 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 23:51:13 +00:00
Abderrazek Zaafrani
4c73606e33 [AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323005 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 23:10:56 +00:00
Rui Ueyama
598fd0131b Fix -Wunused-variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323004 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 22:56:04 +00:00
Sanjay Patel
250016404b [x86] add tests for sqrt estimate that should respect denorms; NFC (PR34994)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323003 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 22:47:49 +00:00
Lang Hames
156b994bce [ORC] Re-apply r322913 with a fix for a read-after-free error.
ExternalSymbolMap now stores the string key (rather than using a StringRef),
as the object file backing the key may be removed at any time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323001 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 22:24:13 +00:00
Craig Topper
6c4e0e3baf [X86] Autogenerate complete checks on a couple tests. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322997 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 22:04:20 +00:00
Jakub Kuderski
b552ffa812 [Dominators] Visit affected node candidates found at different root levels
Summary:
This patch attempts to fix the DomTree incremental insertion bug found here [[ https://bugs.llvm.org/show_bug.cgi?id=35969 | PR35969 ]] .

When performing an insertion into a piece of unreachable CFG, we may find the same not at different levels. When this happens, the node can turn out to be affected when we find it starting from a node with a lower level in the tree. The level at which we start visitation affects if we consider a node affected or not.

This patch tracks the lowest level at which each node was visited during insertion and allows it to be visited multiple times, if it can cause it to be considered affected.

Reviewers: brzycki, davide, dberlin, grosser

Reviewed By: brzycki

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322993 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 21:27:24 +00:00
Jessica Paquette
fa14209a6c Add optional DICompileUnit to DIBuilder + make outliner debug info use it
Previously, the DIBuilder didn't expose functionality to set its compile unit
in any other way than calling createCompileUnit. This meant that the outliner,
which creates new functions, had to create a new compile unit for its debug
info.

This commit adds an optional parameter in the DIBuilder's constructor which
lets you set its CU at construction.

It also changes the MachineOutliner so that it keeps track of the DISubprograms
for each outlined sequence. If debugging information is requested, then it
uses one of the outlined sequence's DISubprograms to grab a CU. It then uses
that CU to construct the DISubprogram for the new outlined function.

The test has also been updated to reflect this change.

See https://reviews.llvm.org/D42254 for more information. Also see the e-mail
discussion on D42254 in llvm-commits for more context.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322992 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 21:21:49 +00:00
Ulrich Weigand
8466b57b53 [SystemZ] Prefer LOCHI over generating IPM sequences
On current machines we have load-on-condition instructions that can be
used to directly implement the SETCC semantics.  If we have those, it is
always preferable to use them instead of generating the IPM sequence.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322989 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 20:56:04 +00:00
Ulrich Weigand
ff28671f85 [SystemZ] Directly use CC result of compare-and-swap
In order to implement a test whether a compare-and-swap succeeded, the
SystemZ back-end currently emits a rather inefficient sequence of first
converting the CC result into an integer, and then testing that integer
against zero.  This commit changes the back-end to simply directly test
the CC value set by the compare-and-swap instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322988 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 20:54:18 +00:00
Ulrich Weigand
e762c03a67 [SystemZ] Rework IPM sequence generation
The SystemZ back-end uses a sequence of IPM followed by arithmetic
operations to implement the SETCC primitive.  This is currently done
early during SelectionDAG.  This patch moves generating those sequences
to much later in SelectionDAG (during PreprocessISelDAG).

This doesn't change much in generated code by itself, but it allows
further enhancements that will be checked-in as follow-on commits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322987 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 20:52:04 +00:00
Ulrich Weigand
1166428e09 [SystemZ] Implement computeKnownBitsForTargetNode
This provides a computeKnownBits implementation for SystemZ target
nodes.  Currently only SystemZISD::SELECT_CCMASK is supported.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322986 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 20:49:05 +00:00
Ulrich Weigand
f937aee178 [SelectionDAG] Teach computeKnownBits about ATOMIC_CMP_SWAP_WITH_SUCCESS boolean return value
The second return value of ATOMIC_CMP_SWAP_WITH_SUCCESS is known to be a
boolean, and should therefore be treated by computeKnownBits just like
the second return values of SMULO / UMULO.

Differential Revision: https://reviews.llvm.org/D42067


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322985 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 20:47:14 +00:00
Ulrich Weigand
a565e7db88 [SystemZ] Run branch-12.ll test only if long tests enabled
This avoids excessive test run times e.g. with expensive checks enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322983 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 19:51:38 +00:00
Sam Clegg
3fb85bc80d [WebAssembly] MC: Start table at offset 1 rather than 0
Summary:
For consistency with the output of lld.

This is useful in runnable binaries as can them be sure the
null function pointer will never be a valid argument
call_indirect.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D42284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322978 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 18:57:01 +00:00
Simon Pilgrim
b1c9d37e54 [X86][SSE] Add SSE2 gather tests
Check codegen without PEXTRD 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322974 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:50:25 +00:00
Michal Gorny
5dc05a9e89 [cmake] Include LLVM_LIBXML2_ENABLED in LLVMConfig.cmake, PR36006
Include the LLVM_LIBXML2_ENABLED cache variable in LLVMConfig.cmake
in order to make it available for other LLVM packages to query. This
is necessary to fix stand-alone testing of LLD.

Differential Revision: https://reviews.llvm.org/D42252

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322973 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:47:03 +00:00
Joel Galenson
1f504230b9 [ARM] Fix perf regression in compare optimization.
Fix a performance regression caused by r322737.

While trying to make it easier to replace compares with existing adds and
subtracts, I accidentally stopped it from doing so in some cases.  This should
fix that.  I'm also fixing another potential bug in that commit.

Differential Revision: https://reviews.llvm.org/D42263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322972 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:46:27 +00:00
Derek Schuff
667e26447a [WebAssembly] Fix libcall signature lookup
RuntimeLibcallSignatures previously manually initialized all the libcall
names into an array and searched it linearly for the first match to lookup
the corresponding index.
r322802 switched that to initializing a map keyed by the libcall name.
Neither of these approaches works correctly because some libcall numbers use
the same name on different platforms (e.g. the "l" suffixed functions
use f80 or f128 or ppcf128).

This change fixes that by ensuring that each name only goes into the map
once. It also adds tests.

Differential Revision: https://reviews.llvm.org/D42271

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322971 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:45:54 +00:00
Daniel Neilson
4f82436e1d Additional fixes for docs in addition to r322968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322969 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:32:33 +00:00
Daniel Neilson
f445ab028c Fix docs build break caused by r322965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322968 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:24:21 +00:00
Dan Gohman
cee475a4d7 [WebAssembly] Make sign-extension opcodes a distinct feature.
Sign-extension opcodes have been split into a separate proposal from
the main threads proposal, so switch them to their own target
feature. See:

https://github.com/WebAssembly/sign-extension-ops


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322966 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:16:24 +00:00
Daniel Neilson
afa2e7e6a6 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
Summary:
 This is a resurrection of work first proposed and discussed in Aug 2015:
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

 The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

 This change is the first in a series that allows source and dest to each
have their own alignments by using the alignment attribute on their arguments.

 In this change we:
1) Remove the alignment argument.
2) Add alignment attributes to the source & dest arguments. We, temporarily,
   require that the alignments for source & dest be equal.

 For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)

 Downstream users may have to update their lit tests that check for
@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script
may help with updating the majority of your tests, but it does not catch all possible
patterns so some manual checking and updating will be required.

s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g

 The remaining changes in the series will:
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
   source and dest alignments.
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
        and those that use use MemIntrinsicInst::[get|set]Alignment() to use
        getDestAlignment() and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
        MemIntrinsicInst::[get|set]Alignment() methods.

Reviewers: pete, hfinkel, lhames, reames, bollu

Reviewed By: reames

Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits

Differential Revision: https://reviews.llvm.org/D41675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322965 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:13:12 +00:00
Petr Hosek
757e87a197 Fallback option for colorized output when terminfo isn't available
Try to detect the terminal color support by checking the value of the
TERM environment variable. This is not great, but it's better than
nothing when terminfo library isn't available, which may still be the
case on some Linux distributions.

Differential Revision: https://reviews.llvm.org/D42055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322962 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:10:55 +00:00
Sanjay Patel
9e17395714 [x86] add RUN line and auto-generate checks
There were checks for a 32-bit target here, but no RUN line
corresponding to that prefix. I don't know what the intent
of these tests is, but at least now we can see what happens
for both targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322961 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:09:28 +00:00
Sanjay Patel
13149c89f3 [x86] regenerate complete checks; NFC
D42265 will improve something here, but it's not obvious how without more checks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322960 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:05:16 +00:00
Don Hinton
1256d61e28 [cmake] Fix typo in LLVM_UTILS_INSTALL_DIR definition.
Differential Revision: https://reviews.llvm.org/D41804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322959 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 17:02:12 +00:00
Carey Williams
9b8cffe9a6 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322958 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 16:55:23 +00:00
Sanjay Patel
4956f49847 [x86] shrink 'and' immediate values by setting the high bits (PR35907)
Try to reverse the constant-shrinking that happens in SimplifyDemandedBits()
for 'and' masks when it results in a smaller sign-extended immediate.

We are also able to detect dead 'and' ops here (the mask is all ones). In
that case, we replace and return without selecting the 'and'.

Other targets might want to share some of this logic by enabling this under a
target hook, but I didn't see diffs for simple cases with PowerPC or AArch64,
so they may already have some specialized logic for this kind of thing or have
different needs.

This should solve PR35907:
https://bugs.llvm.org/show_bug.cgi?id=35907

Differential Revision: https://reviews.llvm.org/D42088


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322957 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 16:37:25 +00:00
Sanjay Patel
b1b5a889fa [InstSimplify] use m_Specific and commutative matcher to reduce code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322955 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 16:12:55 +00:00
Nirav Dave
d5dd5d3520 [X86] Extend load-op-store fusion merge to ADC/SBB.
Summary: Add handling of EFLAG input to X86 Load-op-store fusion checking.

Reviewers: craig.topper, RKSimon

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D42128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322952 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 15:37:57 +00:00
Sander de Smalen
b2debb2fad [AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
Reviewers: fhahn, rengolin, t.p.northover, echristo, olista01, SjoerdMeijer

Reviewed By: SjoerdMeijer

Subscribers: SjoerdMeijer, aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D41900

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322951 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 15:22:00 +00:00
Simon Pilgrim
cc8b87e080 [X86][AVX] Add more variable permute tests for source vectors smaller than destination
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322948 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 14:55:22 +00:00
Alexey Bataev
0d23c0467f [SLP] Fix vectorization for tree with trunc to minimum required bit width.
Summary:
If the vectorized tree has truncate to minimum required bit width and
the vector type of the cast operation after the truncation is the same
as the vector type of the cast operands, count cost of the vector cast
operation as 0, because this cast will be later removed.
Also, if the vectorization tree root operations are integer cast operations, do not consider them as candidates for truncation. It will just create extra number of the same vector/scalar operations, which will be removed by instcombiner.

Reviewers: RKSimon, spatel, mkuper, hfinkel, mssimpso

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41948

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322946 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-19 14:40:13 +00:00