Commit Graph

10 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov
d0eb792425 AMDGPU: Enable code object v3 for AMDHSA only
Differential Revision: https://reviews.llvm.org/D54186


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346923 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-15 02:32:43 +00:00
Konstantin Zhuravlyov
b5d6bd0e48 Revert r345542: AMDGPU: Enable code object v3 by default
It breaks mesa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345662 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-30 22:02:40 +00:00
Konstantin Zhuravlyov
93ce40bd23 AMDGPU: Enable code object v3 by default
Differential Revision: https://reviews.llvm.org/D53525


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345542 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-29 21:07:27 +00:00
Dmitry Preobrazhensky
6bc93b9a3b [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}
See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765

Reviewers: tamazov, SamWot, arsenm, vpykhtin

Differential Revision: https://reviews.llvm.org/D40088

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318675 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-20 18:24:21 +00:00
Konstantin Zhuravlyov
7624630b81 AMDGPU: Add ELFOSABI_AMDGPU_PAL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314843 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 20:54:07 +00:00
Sam Kolton
ae331608b7 [AMDGPU] llvm-objdump: Skip amd_kernel_code_t only at the begining of kernel symbol.
Summary: This change fix bug in AMDGPU disassembly. Previously, presence of symbols other than kernel symbols caused objdump to skip begining of those symbols.

Reviewers: tstellarAMD, vpykhtin, Bigcheese, ruiu

Subscribers: kzhuravl, arsenm

Differential Revision: http://reviews.llvm.org/D21966

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278921 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-17 10:17:57 +00:00
Tom Stellard
66eb4d17bb AMDGPU/SI: Add support for AMD code object version 2.
Summary:
Version 2 is now the default.  If you want to emit version 1, use
the amdgcn--amdhsa-amdcov1 triple.

Reviewers: arsenm, kzhuravl

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268647 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:03:33 +00:00
Valery Pykhtin
514b0038dd [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.
Reenable reverted r265550 with endianness issue fixed. Variables of
endian-aware types such as ulittle32_t should be explicitly casted
to their natural equivalent types before passing it as vararg to
printf like functions (format in my case). Added lit config file
depending on AMDGPU target as the testcase uses assembler.

Differential revision: http://reviews.llvm.org/D16998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265645 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 07:24:01 +00:00
Valery Pykhtin
8950a8d2f9 Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."
This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265554 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-06 16:30:21 +00:00
Valery Pykhtin
496db86011 [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.
Differential revision: http://reviews.llvm.org/D16998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265550 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-06 15:55:10 +00:00