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775d402bf1
Detailed description:
After https://reviews.llvm.org/D59990 submit several issues were discovered.
Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly.
Discovered issues were addressed in the following commits:
https://reviews.llvm.org/D67662
https://reviews.llvm.org/D67101
https://reviews.llvm.org/D63953
https://reviews.llvm.org/D63731
This change brings back AMDGPU specific changes.
Reviewed by: rampitec, arsenm
Differential Revision: https://reviews.llvm.org/D68635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374767 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
756 B
LLVM
24 lines
756 B
LLVM
; RUN: llc -march=amdgcn -stop-after=amdgpu-isel -verify-machineinstrs -o - %s | FileCheck %s
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; CHECK-LABEL: vcopy_i1_undef
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; CHECK: [[IMPDEF0:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; CHECK-NOT: COPY
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; CHECK: [[IMPDEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; CHECK-NOT: COPY [[IMPDEF0]]
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; CHECK-NOT: COPY [[IMPDEF1]]
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; CHECK: .false:
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define <2 x float> @vcopy_i1_undef(<2 x float> addrspace(1)* %p) {
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entry:
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br i1 undef, label %exit, label %false
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false:
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%x = load <2 x float>, <2 x float> addrspace(1)* %p
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%cmp = fcmp one <2 x float> %x, zeroinitializer
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br label %exit
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exit:
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%c = phi <2 x i1> [ undef, %entry ], [ %cmp, %false ]
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%ret = select <2 x i1> %c, <2 x float> <float 2.0, float 2.0>, <2 x float> <float 4.0, float 4.0>
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ret <2 x float> %ret
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}
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