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Summary: - As LCSSA is turned on just before isel, it may create PHI of the flow, which is consumed by pseudo structurized CFG instructions. When that PHIs are eliminated in O0, COPY may be placed wrongly as the these pseudo structurized CFG instructions are considering prologue of MBB. - Run extra `unreachable-mbb-elimination` at the end of isel to clean up PHIs. Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64353 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367023 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
542 B
LLVM
27 lines
542 B
LLVM
; RUN: llc -march=amdgcn -O0 -o - %s | FileCheck %s
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; CHECK-LABEL: non_uniform_loop
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; CHECK: s_endpgm
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define amdgpu_kernel void @non_uniform_loop(float addrspace(1)* %array) {
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entry:
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%w = tail call i32 @llvm.amdgcn.workitem.id.x()
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br label %for.cond
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for.cond:
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%i = phi i32 [0, %entry], [%i.next, %for.inc]
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%cmp = icmp ult i32 %i, %w
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br i1 %cmp, label %for.body, label %for.end
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for.body:
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br label %for.inc
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for.inc:
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%i.next = add i32 %i, 1
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br label %for.cond
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for.end:
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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