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695940b0f1
Reapply r346374 with the fixes for modules build. Original summary: This change implements assembler parser, code emitter, ELF object writer and disassembler for the MSP430 ISA. Also, more instruction forms are added to the target description. Patch by Michael Skvortsov! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346948 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
928 B
LLVM
47 lines
928 B
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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@foo = common global i16 0, align 2
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define i16 @add(i16 %a) nounwind {
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; CHECK-LABEL: add:
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; CHECK: add &foo, r12
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%1 = load i16, i16* @foo
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%2 = add i16 %a, %1
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ret i16 %2
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}
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define i16 @and(i16 %a) nounwind {
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; CHECK-LABEL: and:
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; CHECK: and &foo, r12
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%1 = load i16, i16* @foo
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%2 = and i16 %a, %1
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ret i16 %2
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}
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define i16 @bis(i16 %a) nounwind {
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; CHECK-LABEL: bis:
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; CHECK: bis &foo, r12
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%1 = load i16, i16* @foo
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%2 = or i16 %a, %1
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ret i16 %2
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}
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define i16 @bic(i16 %a) nounwind {
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; CHECK-LABEL: bic:
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; CHECK: bic &foo, r12
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%1 = load i16, i16* @foo
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%2 = xor i16 %1, -1
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%3 = and i16 %a, %2
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ret i16 %3
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}
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define i16 @xor(i16 %a) nounwind {
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; CHECK-LABEL: xor:
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; CHECK: xor &foo, r12
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%1 = load i16, i16* @foo
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%2 = xor i16 %a, %1
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ret i16 %2
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}
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