Files
archived-llvm/test/CodeGen/SystemZ/vec-conv-03.ll
Ulrich Weigand 3e44783bf7 [SystemZ] Support z15 processor name
The recently announced IBM z15 processor implements the architecture
already supported as "arch13" in LLVM.  This patch adds support for
"z15" as an alternate architecture name for arch13.

The patch also uses z15 in a number of places where we used arch13
as long as the official name was not yet announced.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372435 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-20 23:04:45 +00:00

41 lines
1.0 KiB
LLVM

; Test conversions between integer and float elements on z15.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
; Test conversion of f32s to signed i32s.
define <4 x i32> @f1(<4 x float> %floats) {
; CHECK-LABEL: f1:
; CHECK: vcfeb %v24, %v24, 0, 5
; CHECK: br %r14
%dwords = fptosi <4 x float> %floats to <4 x i32>
ret <4 x i32> %dwords
}
; Test conversion of f32s to unsigned i32s.
define <4 x i32> @f2(<4 x float> %floats) {
; CHECK-LABEL: f2:
; CHECK: vclfeb %v24, %v24, 0, 5
; CHECK: br %r14
%dwords = fptoui <4 x float> %floats to <4 x i32>
ret <4 x i32> %dwords
}
; Test conversion of signed i32s to f32s.
define <4 x float> @f3(<4 x i32> %dwords) {
; CHECK-LABEL: f3:
; CHECK: vcefb %v24, %v24, 0, 0
; CHECK: br %r14
%floats = sitofp <4 x i32> %dwords to <4 x float>
ret <4 x float> %floats
}
; Test conversion of unsigned i32s to f32s.
define <4 x float> @f4(<4 x i32> %dwords) {
; CHECK-LABEL: f4:
; CHECK: vcelfb %v24, %v24, 0, 0
; CHECK: br %r14
%floats = uitofp <4 x i32> %dwords to <4 x float>
ret <4 x float> %floats
}