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archived-llvm/lib/Target/AArch64
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David Blaikie 48319238e4 Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering 
This header includes CodeGen headers, and is not, itself, included by
any Target headers, so move it into CodeGen to match the layering of its
implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317647 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-08 01:01:31 +00:00
..
AsmParser
[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
2017-11-07 16:45:48 +00:00
Disassembler
[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
2017-11-07 16:45:48 +00:00
InstPrinter
[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
2017-11-07 16:45:48 +00:00
MCTargetDesc
[AArch64] Use dwarf exception handling on MinGW
2017-11-03 07:33:20 +00:00
TargetInfo
Move the global variables representing each Target behind accessor function
2016-10-09 23:00:34 +00:00
Utils
[AArch64] Add support for dllimport of values and functions
2017-10-25 07:25:18 +00:00
AArch64.h
[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2)
2017-07-18 16:14:22 +00:00
AArch64.td
AArch64: Enable AES instruction fusion on Cyclone.
2017-10-17 21:46:15 +00:00
AArch64A53Fix835769.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64A57FPLoadBalancing.cpp
LiveRegUnits: Rename accumulateBackward()->accumulate()
2017-07-07 03:02:17 +00:00
AArch64AdvSIMDScalarPass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AArch64AsmPrinter.cpp
[AArch64] Support COFF linker directives
2017-08-31 08:28:48 +00:00
AArch64CallingConvention.h
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64CallingConvention.td
AArch64: support SwiftCC properly on AAPCS64
2017-09-22 04:31:44 +00:00
AArch64CallLowering.cpp
[GISel]: Fix generation of illegal COPYs during CallLowering
2017-10-09 20:07:43 +00:00
AArch64CallLowering.h
GlobalISel (AArch64): fix ABI at border between GPRs and SP.
2017-08-21 21:56:11 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
fix trivial typos in comments; NFC
2017-07-03 06:32:59 +00:00
AArch64CollectLOH.cpp
AArch64CollectLOH: Rewrite as block-local analysis.
2017-01-06 19:22:01 +00:00
AArch64CondBrTuning.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64ConditionalCompares.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64ConditionOptimizer.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64ExpandPseudoInsts.cpp
Insert IMPLICIT_DEFS for undef uses in tail merging
2017-09-06 20:45:24 +00:00
AArch64FalkorHWPFFix.cpp
[AArch64][Falkor] Ignore SP based loads in HW prefetch fixups.
2017-09-27 17:14:10 +00:00
AArch64FastISel.cpp
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
2017-07-25 23:51:02 +00:00
AArch64FrameLowering.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64FrameLowering.h
Move TargetFrameLowering.h to CodeGen where it's implemented
2017-11-03 22:32:11 +00:00
AArch64GenRegisterBankInfo.def
[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
2017-11-02 23:38:19 +00:00
AArch64InstrAtomics.td
[AArch64] LSE Atomics reorg - part 1
2017-08-05 04:30:55 +00:00
AArch64InstrFormats.td
[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
2017-10-23 18:19:24 +00:00
AArch64InstrInfo.cpp
AArch64: account for possible frame index operand in compares.
2017-10-17 21:43:52 +00:00
AArch64InstrInfo.h
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64InstrInfo.td
[AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ
2017-11-07 16:58:13 +00:00
AArch64InstructionSelector.cpp
InstructionSelectorImpl.h: Modularize/remove ODR violations by using a static member function to expose the debug name
2017-10-26 23:39:54 +00:00
AArch64ISelDAGToDAG.cpp
[AArch64] Avoid selecting XZR inline ASM memory operand
2017-07-14 21:46:16 +00:00
AArch64ISelLowering.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64ISelLowering.h
[AArch64] Add support for dllimport of values and functions
2017-10-25 07:25:18 +00:00
AArch64LegalizerInfo.cpp
[GlobalISel] Enable legalizing non-power-of-2 sized types.
2017-11-07 10:34:34 +00:00
AArch64LegalizerInfo.h
GlobalISel: legalize va_arg on AArch64.
2017-02-15 23:22:50 +00:00
AArch64LoadStoreOptimizer.cpp
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores.
2017-08-04 16:44:06 +00:00
AArch64MachineFunctionInfo.h
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
2017-07-25 23:51:02 +00:00
AArch64MacroFusion.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64MacroFusion.h
Recommit rL305677: [CodeGen] Add generic MacroFusion pass
2017-06-19 12:53:31 +00:00
AArch64MCInstLower.cpp
[AArch64] Add support for dllimport of values and functions
2017-10-25 07:25:18 +00:00
AArch64MCInstLower.h
[COFF, ARM64] Add support for Windows ARM64 COFF format
2017-06-27 23:58:19 +00:00
AArch64PBQPRegAlloc.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AArch64PBQPRegAlloc.h
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
2017-06-01 23:25:02 +00:00
AArch64PerfectShuffle.h
…
AArch64PromoteConstant.cpp
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
2017-07-25 23:51:02 +00:00
AArch64RedundantCopyElimination.cpp
AArch64: account for possible frame index operand in compares.
2017-10-17 21:43:52 +00:00
AArch64RegisterBankInfo.cpp
[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
2017-11-02 23:38:19 +00:00
AArch64RegisterBankInfo.h
[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
2017-11-02 23:38:19 +00:00
AArch64RegisterBanks.td
[aarch64][globalisel] Register banks and classes should have distinct names.
2017-10-18 00:12:43 +00:00
AArch64RegisterInfo.cpp
Move TargetFrameLowering.h to CodeGen where it's implemented
2017-11-03 22:32:11 +00:00
AArch64RegisterInfo.h
AArch64: Enable post-ra liveness updates
2016-12-16 23:55:43 +00:00
AArch64RegisterInfo.td
[AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support
2017-11-07 16:45:48 +00:00
AArch64SchedA53.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedA57.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedA57WriteRes.td
[AArch64] Cortex-A57 FDIV/FSQRT scheduling fix (W-unit)
2016-12-23 12:51:41 +00:00
AArch64SchedCyclone.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedFalkor.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedFalkorDetails.td
[AArch64][Falkor] Remove some non-existent opcodes from sched detail regexes. NFC.
2017-06-23 21:59:09 +00:00
AArch64SchedKryo.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedKryoDetails.td
[AArch64][Kryo] Add missing write latency for LDAXP, LDXP second destination.
2017-06-19 21:57:42 +00:00
AArch64SchedM1.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedThunderX2T99.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64SchedThunderX.td
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
2017-11-07 15:03:11 +00:00
AArch64Schedule.td
CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
2016-06-30 00:01:54 +00:00
AArch64SelectionDAGInfo.cpp
[AArch64] Drive-by cleanup, make this code shorter. NFCI.
2017-03-22 23:37:58 +00:00
AArch64SelectionDAGInfo.h
Pass DebugLoc and SDLoc by const ref.
2016-06-12 15:39:02 +00:00
AArch64StorePairSuppress.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
AArch64Subtarget.cpp
[AArch64] Add basic support for Qualcomm's Saphira CPU.
2017-09-25 14:05:00 +00:00
AArch64Subtarget.h
[AArch64] Add basic support for Qualcomm's Saphira CPU.
2017-09-25 14:05:00 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ
2017-11-07 16:58:13 +00:00
AArch64SystemOperands.td
[AArch64] IDSAR6 register assembler support
2017-08-31 08:36:45 +00:00
AArch64TargetMachine.cpp
[SimplifyCFG] use pass options and remove the latesimplifycfg pass
2017-10-28 18:43:07 +00:00
AArch64TargetMachine.h
Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"
2017-10-12 22:57:28 +00:00
AArch64TargetObjectFile.cpp
Move Object format code to lib/BinaryFormat.
2017-06-07 03:48:56 +00:00
AArch64TargetObjectFile.h
[COFF, ARM64] Add support for Windows ARM64 COFF format
2017-06-27 23:58:19 +00:00
AArch64TargetTransformInfo.cpp
Sink some IntrinsicInst.h and Intrinsics.h out of llvm/include
2017-09-07 23:27:44 +00:00
AArch64TargetTransformInfo.h
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
2017-07-25 23:51:02 +00:00
AArch64VectorByElementOpt.cpp
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
2017-11-08 01:01:31 +00:00
CMakeLists.txt
[GlobalISel] Make GlobalISel a non-optional library.
2017-08-03 21:52:25 +00:00
LLVMBuild.txt
[AArch64] Plug the beginning of the GlobalISel pipeline.
2016-02-11 19:35:06 +00:00
SVEInstrFormats.td
[AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ
2017-11-07 16:58:13 +00:00