Files
archived-llvm/lib/Target/RISCV/Disassembler
Alex Bradbury 1437cc9a52 [RISCV] Prepare for the use of variable-sized register classes
While parameterising by XLen, also take the opportunity to clean up the 
formatting of the RISCV .td files.

This commit unifies the in-tree code with my patchset at 
<https://github.com/lowrisc/riscv-llvm>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316159 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 14:29:03 +00:00
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