Roman Lebedev f9fcbf5fb1 [DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2 ...

Summary:
Only vector tests are being affected here,
since subtraction by scalar constant is rewritten
as addition by negated constant.

No surprising test changes.

https://rise4fun.com/Alive/pbT

This is a recommit, originally committed in rL361852, but reverted
to investigate test-suite compile-time hangs.

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362146 91177308-0d34-0410-b5e6-96231b3b80d8

2019-05-30 20:37:49 +00:00

..

AArch64

[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2

2019-05-30 20:37:49 +00:00

AMDGPU

[DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold. Try 3

2019-05-30 20:37:29 +00:00

ARC

…

ARM

[ARM] add target arch definitions for 8.1-M and MVE

2019-05-30 12:57:04 +00:00

AVR

Add TargetLoweringInfo hook for explicitly setting the ABI calling convention endianess

2019-05-21 06:38:02 +00:00

BPF

[BPF] generate R_BPF_NONE relocation for BTF DataSec variables

2019-05-26 21:26:06 +00:00

Generic

[IR] allow fast-math-flags on select of FP values

2019-05-22 15:50:46 +00:00

Hexagon

[NFC] Make tests more robust for new optimizations

2019-05-25 14:10:20 +00:00

Inputs

…

Lanai

UpdateTestChecks: Lanai triple support

2019-05-29 20:03:00 +00:00

Mips

[mips] Use reg-exp in tests to tolerate register indexes changing. NFC

2019-05-29 14:59:07 +00:00

MIR

[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.

2019-05-30 18:06:28 +00:00

MSP430

[AsmPrinter] refactor to support %c w/ GlobalAddress'

2019-04-26 18:45:04 +00:00

NVPTX

SelectionDAG: accommodate atomic floating stores.

2019-05-10 11:23:04 +00:00

PowerPC

Partial revert of revert of r361827: Add constrained intrinsic tests for powerpc64le.

2019-05-29 16:29:31 +00:00

RISCV

[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV

2019-05-23 12:43:13 +00:00

SPARC

[DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold. Try 3

2019-05-30 20:37:18 +00:00

SystemZ

[DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold. Try 3

2019-05-30 20:37:18 +00:00

Thumb

[TargetLowering] Extend bool args to inline-asm according to getBooleanType

2019-05-22 16:16:15 +00:00

Thumb2

[ARM] Replace fp-only-sp and d16 with fp64 and d32.

2019-05-28 16:13:20 +00:00

WebAssembly

[WebAssembly] Support for atomic fences

2019-05-28 22:09:12 +00:00

WinCFGuard

…

WinEH

…

X86

[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2

2019-05-30 20:37:49 +00:00

XCore

[AsmPrinter] refactor to support %c w/ GlobalAddress'

2019-04-26 18:45:04 +00:00