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2edda5220d
Those two subtarget features were awkward because their semantics are reversed: each one indicates the _lack_ of support for something in the architecture, rather than the presence. As a consequence, you don't get the behavior you want if you combine two sets of feature bits. Each SubtargetFeature for an FP architecture version now comes in four versions, one for each combination of those options. So you can still say (for example) '+vfp2' in a feature string and it will mean what it's always meant, but there's a new string '+vfp2d16sp' meaning the version without those extra options. A lot of this change is just mechanically replacing positive checks for the old features with negative checks for the new ones. But one more interesting change is that I've rearranged getFPUFeatures() so that the main FPU feature is appended to the output list *before* rather than after the features derived from the Restriction field, so that -fp64 and -d32 can override defaults added by the main feature. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361845 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
2.3 KiB
LLVM
82 lines
2.3 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-OLD
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; RUN: llc < %s -mtriple=thumbv7s-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-F16
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; RUN: llc < %s -mtriple=thumbv8-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8
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; RUN: llc < %s -mtriple=armv8r-none-none-eabi | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8
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; RUN: llc < %s -mtriple=armv8r-none-none-eabi -mattr=-fp64 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8-SP
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define void @test_load_store(half* %in, half* %out) {
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; CHECK-LABEL: test_load_store:
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; CHECK: ldrh [[TMP:r[0-9]+]], [r0]
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; CHECK: strh [[TMP]], [r1]
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%val = load half, half* %in
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store half %val, half* %out
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ret void
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}
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define i16 @test_bitcast_from_half(half* %addr) {
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; CHECK-LABEL: test_bitcast_from_half:
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; CHECK: ldrh r0, [r0]
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%val = load half, half* %addr
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%val_int = bitcast half %val to i16
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ret i16 %val_int
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}
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define void @test_bitcast_to_half(half* %addr, i16 %in) {
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; CHECK-LABEL: test_bitcast_to_half:
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; CHECK: strh r1, [r0]
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%val_fp = bitcast i16 %in to half
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store half %val_fp, half* %addr
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ret void
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}
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define float @test_extend32(half* %addr) {
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; CHECK-LABEL: test_extend32:
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; CHECK-OLD: b.w ___extendhfsf2
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; CHECK-F16: vcvtb.f32.f16
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; CHECK-V8: vcvtb.f32.f16
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; CHECK-V8-SP: vcvtb.f32.f16
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%val16 = load half, half* %addr
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%val32 = fpext half %val16 to float
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ret float %val32
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}
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define double @test_extend64(half* %addr) {
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; CHECK-LABEL: test_extend64:
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; CHECK-OLD: bl ___extendhfsf2
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; CHECK-OLD: vcvt.f64.f32
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; CHECK-F16: vcvtb.f32.f16
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; CHECK-F16: vcvt.f64.f32
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; CHECK-V8: vcvtb.f64.f16
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; CHECK-V8-SP: vcvtb.f32.f16
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; CHECK-V8-SP: bl __aeabi_f2d
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%val16 = load half, half* %addr
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%val32 = fpext half %val16 to double
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ret double %val32
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}
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define void @test_trunc32(float %in, half* %addr) {
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; CHECK-LABEL: test_trunc32:
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; CHECK-OLD: bl ___truncsfhf2
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; CHECK-F16: vcvtb.f16.f32
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; CHECK-V8: vcvtb.f16.f32
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; CHECK-V8-SP: vcvtb.f16.f32
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%val16 = fptrunc float %in to half
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store half %val16, half* %addr
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ret void
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}
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define void @test_trunc64(double %in, half* %addr) {
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; CHECK-LABEL: test_trunc64:
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; CHECK-OLD: bl ___truncdfhf2
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; CHECK-F16: bl ___truncdfhf2
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; CHECK-V8: vcvtb.f16.f64
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; CHECK-V8-SP: bl __aeabi_d2h
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%val16 = fptrunc double %in to half
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store half %val16, half* %addr
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ret void
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}
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