glslang/Test/baseResults/hlsl.intrinsics.promote.outputs.frag.out

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HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
hlsl.intrinsics.promote.outputs.frag
Shader version: 450
gl_FragCoord origin is upper left
0:? Sequence
0:20 Function Definition: @main( (temp structure{temp 4-component vector of float color})
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
0:20 Function Parameters:
0:? Sequence
0:37 clamp (temp float)
0:37 fpos: direct index for structure (layout(offset=52 ) uniform float)
0:37 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
0:37 Constant:
0:37 9 (const uint)
0:37 Constant:
0:37 0.000000
0:37 Constant:
0:37 1.000000
0:40 Sequence
0:40 move second child to first child (temp uint)
0:40 'sizeQueryTemp' (temp uint)
0:40 textureSize (temp uint)
0:40 'g_tTex1df4' (uniform texture1D)
0:40 move second child to first child (temp int)
0:40 'WidthI' (temp int)
0:40 Convert uint to int (temp int)
0:40 'sizeQueryTemp' (temp uint)
0:41 Sequence
0:41 move second child to first child (temp uint)
0:41 'sizeQueryTemp' (temp uint)
0:41 textureSize (temp uint)
0:41 'g_tTex1df4' (uniform texture1D)
0:41 Constant:
0:41 6 (const uint)
0:41 move second child to first child (temp int)
0:41 'WidthI' (temp int)
0:41 Convert uint to int (temp int)
0:41 'sizeQueryTemp' (temp uint)
0:41 move second child to first child (temp uint)
0:41 'NumberOfLevelsU' (temp uint)
0:41 textureQueryLevels (temp uint)
0:41 'g_tTex1df4' (uniform texture1D)
0:42 Sequence
0:42 move second child to first child (temp uint)
0:42 'sizeQueryTemp' (temp uint)
0:42 textureSize (temp uint)
0:42 'g_tTex1df4' (uniform texture1D)
0:42 Constant:
0:42 6 (const uint)
0:42 move second child to first child (temp uint)
0:42 'WidthU' (temp uint)
0:42 'sizeQueryTemp' (temp uint)
0:42 move second child to first child (temp int)
0:42 'NumberOfLevelsI' (temp int)
0:42 Convert uint to int (temp int)
0:42 textureQueryLevels (temp uint)
0:42 'g_tTex1df4' (uniform texture1D)
0:43 Sequence
0:43 move second child to first child (temp uint)
0:43 'sizeQueryTemp' (temp uint)
0:43 textureSize (temp uint)
0:43 'g_tTex1df4' (uniform texture1D)
0:43 Constant:
0:43 6 (const uint)
0:43 move second child to first child (temp int)
0:43 'WidthI' (temp int)
0:43 Convert uint to int (temp int)
0:43 'sizeQueryTemp' (temp uint)
0:43 move second child to first child (temp int)
0:43 'NumberOfLevelsI' (temp int)
0:43 Convert uint to int (temp int)
0:43 textureQueryLevels (temp uint)
0:43 'g_tTex1df4' (uniform texture1D)
0:47 move second child to first child (temp 4-component vector of float)
0:47 color: direct index for structure (temp 4-component vector of float)
0:47 'ps_output' (temp structure{temp 4-component vector of float color})
0:47 Constant:
0:47 0 (const int)
0:47 Constant:
0:47 0.000000
0:47 0.000000
0:47 0.000000
0:47 0.000000
0:48 Branch: Return with expression
0:48 'ps_output' (temp structure{temp 4-component vector of float color})
0:20 Function Definition: main( (temp void)
0:20 Function Parameters:
0:? Sequence
0:20 Sequence
0:20 move second child to first child (temp 4-component vector of float)
0:? 'color' (layout(location=0 ) out 4-component vector of float)
0:20 color: direct index for structure (temp 4-component vector of float)
0:20 Function Call: @main( (temp structure{temp 4-component vector of float color})
0:20 Constant:
0:20 0 (const int)
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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0:? Linker Objects
0:? 'g_tTexbfs' (layout(r32f ) uniform samplerBuffer)
0:? 'g_tTex1df4' (uniform texture1D)
0:? 'color' (layout(location=0 ) out 4-component vector of float)
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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0:? 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
Linked fragment stage:
Shader version: 450
gl_FragCoord origin is upper left
0:? Sequence
0:20 Function Definition: @main( (temp structure{temp 4-component vector of float color})
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
0:20 Function Parameters:
0:? Sequence
0:37 clamp (temp float)
0:37 fpos: direct index for structure (layout(offset=52 ) uniform float)
0:37 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
0:37 Constant:
0:37 9 (const uint)
0:37 Constant:
0:37 0.000000
0:37 Constant:
0:37 1.000000
0:40 Sequence
0:40 move second child to first child (temp uint)
0:40 'sizeQueryTemp' (temp uint)
0:40 textureSize (temp uint)
0:40 'g_tTex1df4' (uniform texture1D)
0:40 move second child to first child (temp int)
0:40 'WidthI' (temp int)
0:40 Convert uint to int (temp int)
0:40 'sizeQueryTemp' (temp uint)
0:41 Sequence
0:41 move second child to first child (temp uint)
0:41 'sizeQueryTemp' (temp uint)
0:41 textureSize (temp uint)
0:41 'g_tTex1df4' (uniform texture1D)
0:41 Constant:
0:41 6 (const uint)
0:41 move second child to first child (temp int)
0:41 'WidthI' (temp int)
0:41 Convert uint to int (temp int)
0:41 'sizeQueryTemp' (temp uint)
0:41 move second child to first child (temp uint)
0:41 'NumberOfLevelsU' (temp uint)
0:41 textureQueryLevels (temp uint)
0:41 'g_tTex1df4' (uniform texture1D)
0:42 Sequence
0:42 move second child to first child (temp uint)
0:42 'sizeQueryTemp' (temp uint)
0:42 textureSize (temp uint)
0:42 'g_tTex1df4' (uniform texture1D)
0:42 Constant:
0:42 6 (const uint)
0:42 move second child to first child (temp uint)
0:42 'WidthU' (temp uint)
0:42 'sizeQueryTemp' (temp uint)
0:42 move second child to first child (temp int)
0:42 'NumberOfLevelsI' (temp int)
0:42 Convert uint to int (temp int)
0:42 textureQueryLevels (temp uint)
0:42 'g_tTex1df4' (uniform texture1D)
0:43 Sequence
0:43 move second child to first child (temp uint)
0:43 'sizeQueryTemp' (temp uint)
0:43 textureSize (temp uint)
0:43 'g_tTex1df4' (uniform texture1D)
0:43 Constant:
0:43 6 (const uint)
0:43 move second child to first child (temp int)
0:43 'WidthI' (temp int)
0:43 Convert uint to int (temp int)
0:43 'sizeQueryTemp' (temp uint)
0:43 move second child to first child (temp int)
0:43 'NumberOfLevelsI' (temp int)
0:43 Convert uint to int (temp int)
0:43 textureQueryLevels (temp uint)
0:43 'g_tTex1df4' (uniform texture1D)
0:47 move second child to first child (temp 4-component vector of float)
0:47 color: direct index for structure (temp 4-component vector of float)
0:47 'ps_output' (temp structure{temp 4-component vector of float color})
0:47 Constant:
0:47 0 (const int)
0:47 Constant:
0:47 0.000000
0:47 0.000000
0:47 0.000000
0:47 0.000000
0:48 Branch: Return with expression
0:48 'ps_output' (temp structure{temp 4-component vector of float color})
0:20 Function Definition: main( (temp void)
0:20 Function Parameters:
0:? Sequence
0:20 Sequence
0:20 move second child to first child (temp 4-component vector of float)
0:? 'color' (layout(location=0 ) out 4-component vector of float)
0:20 color: direct index for structure (temp 4-component vector of float)
0:20 Function Call: @main( (temp structure{temp 4-component vector of float color})
0:20 Constant:
0:20 0 (const int)
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
0:? Linker Objects
0:? 'g_tTexbfs' (layout(r32f ) uniform samplerBuffer)
0:? 'g_tTex1df4' (uniform texture1D)
0:? 'color' (layout(location=0 ) out 4-component vector of float)
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
0:? 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
// Module Version 10000
// Generated by (magic number): 80001
// Id's are bound by 81
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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Capability Shader
Capability Sampled1D
Capability SampledBuffer
Capability ImageQuery
1: ExtInstImport "GLSL.std.450"
MemoryModel Logical GLSL450
EntryPoint Fragment 4 "main" 74
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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ExecutionMode 4 OriginUpperLeft
Name 4 "main"
Name 8 "PS_OUTPUT"
MemberName 8(PS_OUTPUT) 0 "color"
Name 10 "@main("
Name 17 "$Global"
MemberName 17($Global) 0 "i"
MemberName 17($Global) 1 "u"
MemberName 17($Global) 2 "f"
MemberName 17($Global) 3 "b"
MemberName 17($Global) 4 "i2"
MemberName 17($Global) 5 "u2"
MemberName 17($Global) 6 "f2"
MemberName 17($Global) 7 "b2"
MemberName 17($Global) 8 "upos"
MemberName 17($Global) 9 "fpos"
Name 19 ""
Name 28 "sizeQueryTemp"
Name 31 "g_tTex1df4"
Name 35 "WidthI"
Name 38 "sizeQueryTemp"
Name 44 "NumberOfLevelsU"
Name 47 "sizeQueryTemp"
Name 50 "WidthU"
Name 52 "NumberOfLevelsI"
Name 56 "sizeQueryTemp"
Name 65 "ps_output"
Name 74 "color"
Name 80 "g_tTexbfs"
MemberDecorate 17($Global) 0 Offset 0
MemberDecorate 17($Global) 1 Offset 4
MemberDecorate 17($Global) 2 Offset 8
MemberDecorate 17($Global) 3 Offset 12
MemberDecorate 17($Global) 4 Offset 16
MemberDecorate 17($Global) 5 Offset 24
MemberDecorate 17($Global) 6 Offset 32
MemberDecorate 17($Global) 7 Offset 40
MemberDecorate 17($Global) 8 Offset 48
MemberDecorate 17($Global) 9 Offset 52
Decorate 17($Global) Block
Decorate 19 DescriptorSet 0
Decorate 31(g_tTex1df4) DescriptorSet 0
Decorate 74(color) Location 0
Decorate 80(g_tTexbfs) DescriptorSet 0
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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2: TypeVoid
3: TypeFunction 2
6: TypeFloat 32
7: TypeVector 6(float) 4
8(PS_OUTPUT): TypeStruct 7(fvec4)
9: TypeFunction 8(PS_OUTPUT)
12: TypeInt 32 1
13: TypeInt 32 0
14: TypeVector 12(int) 2
15: TypeVector 13(int) 2
16: TypeVector 6(float) 2
17($Global): TypeStruct 12(int) 13(int) 6(float) 13(int) 14(ivec2) 15(ivec2) 16(fvec2) 15(ivec2) 13(int) 6(float)
18: TypePointer Uniform 17($Global)
19: 18(ptr) Variable Uniform
20: 12(int) Constant 9
21: TypePointer Uniform 6(float)
24: 6(float) Constant 0
25: 6(float) Constant 1065353216
27: TypePointer Function 13(int)
29: TypeImage 6(float) 1D sampled format:Unknown
30: TypePointer UniformConstant 29
31(g_tTex1df4): 30(ptr) Variable UniformConstant
34: TypePointer Function 12(int)
40: 13(int) Constant 6
64: TypePointer Function 8(PS_OUTPUT)
66: 12(int) Constant 0
67: 7(fvec4) ConstantComposite 24 24 24 24
68: TypePointer Function 7(fvec4)
73: TypePointer Output 7(fvec4)
74(color): 73(ptr) Variable Output
77: TypeImage 6(float) Buffer sampled format:R32f
78: TypeSampledImage 77
79: TypePointer UniformConstant 78
80(g_tTexbfs): 79(ptr) Variable UniformConstant
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
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4(main): 2 Function None 3
5: Label
75:8(PS_OUTPUT) FunctionCall 10(@main()
76: 7(fvec4) CompositeExtract 75 0
Store 74(color) 76
HLSL: add intrinsic function implicit promotions This PR handles implicit promotions for intrinsics when there is no exact match, such as for example clamp(int, bool, float). In this case the int and bool will be promoted to a float, and the clamp(float, float, float) form used. These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2). Output conversions are handled either via the existing addOutputArgumentConversion function, which this PR generalizes to handle either aggregates or unaries, or by intrinsic decomposition. If there are methods or intrinsics to be decomposed, then decomposition is responsible for any output conversions, which turns out to happen automatically in all current cases. This can be revisited once inout conversions are in place. Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.* Some intrinsics with only uint versions were expanded to signed ints natively, where the underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous conversion nodes. A new function promoteAggregate is added, and used by findFunction. This is essentially a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary. The actual selection proceeds in three steps, as described in the comments in hlslParseContext::findFunction: 1. Attempt an exact match. If found, use it. 2. If not, obtain the operator from step 1, and promote arguments. 3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
Return
FunctionEnd
10(@main():8(PS_OUTPUT) Function None 9
11: Label
28(sizeQueryTemp): 27(ptr) Variable Function
35(WidthI): 34(ptr) Variable Function
38(sizeQueryTemp): 27(ptr) Variable Function
44(NumberOfLevelsU): 27(ptr) Variable Function
47(sizeQueryTemp): 27(ptr) Variable Function
50(WidthU): 27(ptr) Variable Function
52(NumberOfLevelsI): 34(ptr) Variable Function
56(sizeQueryTemp): 27(ptr) Variable Function
65(ps_output): 64(ptr) Variable Function
22: 21(ptr) AccessChain 19 20
23: 6(float) Load 22
26: 6(float) ExtInst 1(GLSL.std.450) 43(FClamp) 23 24 25
32: 29 Load 31(g_tTex1df4)
33: 12(int) ImageQuerySize 32
Store 28(sizeQueryTemp) 33
36: 13(int) Load 28(sizeQueryTemp)
37: 12(int) Bitcast 36
Store 35(WidthI) 37
39: 29 Load 31(g_tTex1df4)
41: 12(int) ImageQuerySizeLod 39 40
Store 38(sizeQueryTemp) 41
42: 13(int) Load 38(sizeQueryTemp)
43: 12(int) Bitcast 42
Store 35(WidthI) 43
45: 29 Load 31(g_tTex1df4)
46: 12(int) ImageQueryLevels 45
Store 44(NumberOfLevelsU) 46
48: 29 Load 31(g_tTex1df4)
49: 12(int) ImageQuerySizeLod 48 40
Store 47(sizeQueryTemp) 49
51: 13(int) Load 47(sizeQueryTemp)
Store 50(WidthU) 51
53: 29 Load 31(g_tTex1df4)
54: 12(int) ImageQueryLevels 53
55: 12(int) Bitcast 54
Store 52(NumberOfLevelsI) 55
57: 29 Load 31(g_tTex1df4)
58: 12(int) ImageQuerySizeLod 57 40
Store 56(sizeQueryTemp) 58
59: 13(int) Load 56(sizeQueryTemp)
60: 12(int) Bitcast 59
Store 35(WidthI) 60
61: 29 Load 31(g_tTex1df4)
62: 12(int) ImageQueryLevels 61
63: 12(int) Bitcast 62
Store 52(NumberOfLevelsI) 63
69: 68(ptr) AccessChain 65(ps_output) 66
Store 69 67
70:8(PS_OUTPUT) Load 65(ps_output)
ReturnValue 70
FunctionEnd