HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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hlsl.intrinsics.promote.outputs.frag
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Shader version: 450
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gl_FragCoord origin is upper left
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0:? Sequence
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2017-01-19 22:41:47 +00:00
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0:20 Function Definition: @main( (temp structure{temp 4-component vector of float color})
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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0:20 Function Parameters:
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0:? Sequence
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0:37 clamp (temp float)
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0:37 fpos: direct index for structure (layout(offset=52 ) uniform float)
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0:37 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
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0:37 Constant:
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0:37 9 (const uint)
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0:37 Constant:
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0:37 0.000000
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0:37 Constant:
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0:37 1.000000
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0:40 Sequence
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0:40 move second child to first child (temp uint)
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0:40 'sizeQueryTemp' (temp uint)
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0:40 textureSize (temp uint)
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0:40 'g_tTex1df4' (uniform texture1D)
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0:40 move second child to first child (temp int)
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0:40 'WidthI' (temp int)
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0:40 Convert uint to int (temp int)
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0:40 'sizeQueryTemp' (temp uint)
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0:41 Sequence
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0:41 move second child to first child (temp uint)
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0:41 'sizeQueryTemp' (temp uint)
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0:41 textureSize (temp uint)
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0:41 'g_tTex1df4' (uniform texture1D)
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0:41 Constant:
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0:41 6 (const uint)
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0:41 move second child to first child (temp int)
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0:41 'WidthI' (temp int)
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0:41 Convert uint to int (temp int)
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0:41 'sizeQueryTemp' (temp uint)
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0:41 move second child to first child (temp uint)
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0:41 'NumberOfLevelsU' (temp uint)
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0:41 textureQueryLevels (temp uint)
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0:41 'g_tTex1df4' (uniform texture1D)
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0:42 Sequence
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0:42 move second child to first child (temp uint)
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0:42 'sizeQueryTemp' (temp uint)
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0:42 textureSize (temp uint)
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0:42 'g_tTex1df4' (uniform texture1D)
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0:42 Constant:
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0:42 6 (const uint)
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0:42 move second child to first child (temp uint)
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0:42 'WidthU' (temp uint)
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0:42 'sizeQueryTemp' (temp uint)
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0:42 move second child to first child (temp int)
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0:42 'NumberOfLevelsI' (temp int)
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0:42 Convert uint to int (temp int)
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0:42 textureQueryLevels (temp uint)
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0:42 'g_tTex1df4' (uniform texture1D)
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0:43 Sequence
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0:43 move second child to first child (temp uint)
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0:43 'sizeQueryTemp' (temp uint)
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0:43 textureSize (temp uint)
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0:43 'g_tTex1df4' (uniform texture1D)
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0:43 Constant:
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0:43 6 (const uint)
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0:43 move second child to first child (temp int)
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0:43 'WidthI' (temp int)
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0:43 Convert uint to int (temp int)
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0:43 'sizeQueryTemp' (temp uint)
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0:43 move second child to first child (temp int)
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0:43 'NumberOfLevelsI' (temp int)
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0:43 Convert uint to int (temp int)
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0:43 textureQueryLevels (temp uint)
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0:43 'g_tTex1df4' (uniform texture1D)
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0:47 move second child to first child (temp 4-component vector of float)
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0:47 color: direct index for structure (temp 4-component vector of float)
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0:47 'ps_output' (temp structure{temp 4-component vector of float color})
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0:47 Constant:
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0:47 0 (const int)
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0:47 Constant:
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0:47 0.000000
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0:47 0.000000
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0:47 0.000000
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0:47 0.000000
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2017-01-19 22:41:47 +00:00
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0:48 Branch: Return with expression
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0:48 'ps_output' (temp structure{temp 4-component vector of float color})
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0:20 Function Definition: main( (temp void)
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0:20 Function Parameters:
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0:? Sequence
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0:20 Sequence
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0:20 move second child to first child (temp 4-component vector of float)
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0:? 'color' (layout(location=0 ) out 4-component vector of float)
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0:20 color: direct index for structure (temp 4-component vector of float)
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0:20 Function Call: @main( (temp structure{temp 4-component vector of float color})
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0:20 Constant:
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0:20 0 (const int)
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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0:? Linker Objects
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0:? 'g_tTexbfs' (layout(r32f ) uniform samplerBuffer)
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0:? 'g_tTex1df4' (uniform texture1D)
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2017-01-19 22:41:47 +00:00
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0:? 'color' (layout(location=0 ) out 4-component vector of float)
|
HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
|
|
|
0:? 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
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Linked fragment stage:
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Shader version: 450
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gl_FragCoord origin is upper left
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0:? Sequence
|
2017-01-19 22:41:47 +00:00
|
|
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0:20 Function Definition: @main( (temp structure{temp 4-component vector of float color})
|
HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
|
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|
0:20 Function Parameters:
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0:? Sequence
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0:37 clamp (temp float)
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0:37 fpos: direct index for structure (layout(offset=52 ) uniform float)
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0:37 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
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0:37 Constant:
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0:37 9 (const uint)
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0:37 Constant:
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0:37 0.000000
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0:37 Constant:
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0:37 1.000000
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0:40 Sequence
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0:40 move second child to first child (temp uint)
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0:40 'sizeQueryTemp' (temp uint)
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0:40 textureSize (temp uint)
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0:40 'g_tTex1df4' (uniform texture1D)
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0:40 move second child to first child (temp int)
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0:40 'WidthI' (temp int)
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0:40 Convert uint to int (temp int)
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0:40 'sizeQueryTemp' (temp uint)
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0:41 Sequence
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0:41 move second child to first child (temp uint)
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0:41 'sizeQueryTemp' (temp uint)
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0:41 textureSize (temp uint)
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0:41 'g_tTex1df4' (uniform texture1D)
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0:41 Constant:
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0:41 6 (const uint)
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0:41 move second child to first child (temp int)
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0:41 'WidthI' (temp int)
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0:41 Convert uint to int (temp int)
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0:41 'sizeQueryTemp' (temp uint)
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0:41 move second child to first child (temp uint)
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0:41 'NumberOfLevelsU' (temp uint)
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0:41 textureQueryLevels (temp uint)
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0:41 'g_tTex1df4' (uniform texture1D)
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0:42 Sequence
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0:42 move second child to first child (temp uint)
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0:42 'sizeQueryTemp' (temp uint)
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0:42 textureSize (temp uint)
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0:42 'g_tTex1df4' (uniform texture1D)
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0:42 Constant:
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0:42 6 (const uint)
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0:42 move second child to first child (temp uint)
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0:42 'WidthU' (temp uint)
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0:42 'sizeQueryTemp' (temp uint)
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0:42 move second child to first child (temp int)
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0:42 'NumberOfLevelsI' (temp int)
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0:42 Convert uint to int (temp int)
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0:42 textureQueryLevels (temp uint)
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0:42 'g_tTex1df4' (uniform texture1D)
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0:43 Sequence
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0:43 move second child to first child (temp uint)
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0:43 'sizeQueryTemp' (temp uint)
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0:43 textureSize (temp uint)
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0:43 'g_tTex1df4' (uniform texture1D)
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0:43 Constant:
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0:43 6 (const uint)
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0:43 move second child to first child (temp int)
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0:43 'WidthI' (temp int)
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0:43 Convert uint to int (temp int)
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0:43 'sizeQueryTemp' (temp uint)
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0:43 move second child to first child (temp int)
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0:43 'NumberOfLevelsI' (temp int)
|
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0:43 Convert uint to int (temp int)
|
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0:43 textureQueryLevels (temp uint)
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0:43 'g_tTex1df4' (uniform texture1D)
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0:47 move second child to first child (temp 4-component vector of float)
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0:47 color: direct index for structure (temp 4-component vector of float)
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0:47 'ps_output' (temp structure{temp 4-component vector of float color})
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0:47 Constant:
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0:47 0 (const int)
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0:47 Constant:
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0:47 0.000000
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0:47 0.000000
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0:47 0.000000
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0:47 0.000000
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2017-01-19 22:41:47 +00:00
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0:48 Branch: Return with expression
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0:48 'ps_output' (temp structure{temp 4-component vector of float color})
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0:20 Function Definition: main( (temp void)
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0:20 Function Parameters:
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0:? Sequence
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0:20 Sequence
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0:20 move second child to first child (temp 4-component vector of float)
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0:? 'color' (layout(location=0 ) out 4-component vector of float)
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0:20 color: direct index for structure (temp 4-component vector of float)
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0:20 Function Call: @main( (temp structure{temp 4-component vector of float color})
|
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0:20 Constant:
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0:20 0 (const int)
|
HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
|
|
|
0:? Linker Objects
|
|
|
|
0:? 'g_tTexbfs' (layout(r32f ) uniform samplerBuffer)
|
|
|
|
0:? 'g_tTex1df4' (uniform texture1D)
|
2017-01-19 22:41:47 +00:00
|
|
|
0:? 'color' (layout(location=0 ) out 4-component vector of float)
|
HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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0:? 'anon@0' (layout(row_major std140 ) uniform block{layout(offset=0 ) uniform int i, layout(offset=4 ) uniform uint u, layout(offset=8 ) uniform float f, layout(offset=12 ) uniform bool b, layout(offset=16 ) uniform 2-component vector of int i2, layout(offset=24 ) uniform 2-component vector of uint u2, layout(offset=32 ) uniform 2-component vector of float f2, layout(offset=40 ) uniform 2-component vector of bool b2, layout(offset=48 ) uniform uint upos, layout(offset=52 ) uniform float fpos})
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// Module Version 10000
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// Generated by (magic number): 80001
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2017-01-19 22:41:47 +00:00
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// Id's are bound by 81
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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Capability Shader
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Capability Sampled1D
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Capability SampledBuffer
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Capability ImageQuery
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1: ExtInstImport "GLSL.std.450"
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MemoryModel Logical GLSL450
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2017-01-19 22:41:47 +00:00
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EntryPoint Fragment 4 "main" 74
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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ExecutionMode 4 OriginUpperLeft
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Name 4 "main"
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2017-01-19 22:41:47 +00:00
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Name 8 "PS_OUTPUT"
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MemberName 8(PS_OUTPUT) 0 "color"
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Name 10 "@main("
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Name 17 "$Global"
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MemberName 17($Global) 0 "i"
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MemberName 17($Global) 1 "u"
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MemberName 17($Global) 2 "f"
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MemberName 17($Global) 3 "b"
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MemberName 17($Global) 4 "i2"
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MemberName 17($Global) 5 "u2"
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MemberName 17($Global) 6 "f2"
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MemberName 17($Global) 7 "b2"
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MemberName 17($Global) 8 "upos"
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MemberName 17($Global) 9 "fpos"
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Name 19 ""
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Name 28 "sizeQueryTemp"
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Name 31 "g_tTex1df4"
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Name 35 "WidthI"
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Name 38 "sizeQueryTemp"
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Name 44 "NumberOfLevelsU"
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Name 47 "sizeQueryTemp"
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Name 50 "WidthU"
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Name 52 "NumberOfLevelsI"
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Name 56 "sizeQueryTemp"
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Name 65 "ps_output"
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Name 74 "color"
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Name 80 "g_tTexbfs"
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MemberDecorate 17($Global) 0 Offset 0
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MemberDecorate 17($Global) 1 Offset 4
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MemberDecorate 17($Global) 2 Offset 8
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MemberDecorate 17($Global) 3 Offset 12
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MemberDecorate 17($Global) 4 Offset 16
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MemberDecorate 17($Global) 5 Offset 24
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MemberDecorate 17($Global) 6 Offset 32
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MemberDecorate 17($Global) 7 Offset 40
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MemberDecorate 17($Global) 8 Offset 48
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MemberDecorate 17($Global) 9 Offset 52
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Decorate 17($Global) Block
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Decorate 19 DescriptorSet 0
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Decorate 31(g_tTex1df4) DescriptorSet 0
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Decorate 74(color) Location 0
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Decorate 80(g_tTexbfs) DescriptorSet 0
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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2: TypeVoid
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3: TypeFunction 2
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2017-01-19 22:41:47 +00:00
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6: TypeFloat 32
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7: TypeVector 6(float) 4
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8(PS_OUTPUT): TypeStruct 7(fvec4)
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9: TypeFunction 8(PS_OUTPUT)
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12: TypeInt 32 1
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13: TypeInt 32 0
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14: TypeVector 12(int) 2
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15: TypeVector 13(int) 2
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16: TypeVector 6(float) 2
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17($Global): TypeStruct 12(int) 13(int) 6(float) 13(int) 14(ivec2) 15(ivec2) 16(fvec2) 15(ivec2) 13(int) 6(float)
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18: TypePointer Uniform 17($Global)
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19: 18(ptr) Variable Uniform
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20: 12(int) Constant 9
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21: TypePointer Uniform 6(float)
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24: 6(float) Constant 0
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25: 6(float) Constant 1065353216
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27: TypePointer Function 13(int)
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29: TypeImage 6(float) 1D sampled format:Unknown
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30: TypePointer UniformConstant 29
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31(g_tTex1df4): 30(ptr) Variable UniformConstant
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34: TypePointer Function 12(int)
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40: 13(int) Constant 6
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64: TypePointer Function 8(PS_OUTPUT)
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66: 12(int) Constant 0
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67: 7(fvec4) ConstantComposite 24 24 24 24
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68: TypePointer Function 7(fvec4)
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73: TypePointer Output 7(fvec4)
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74(color): 73(ptr) Variable Output
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77: TypeImage 6(float) Buffer sampled format:R32f
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78: TypeSampledImage 77
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79: TypePointer UniformConstant 78
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80(g_tTexbfs): 79(ptr) Variable UniformConstant
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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4(main): 2 Function None 3
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5: Label
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2017-01-19 22:41:47 +00:00
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75:8(PS_OUTPUT) FunctionCall 10(@main()
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76: 7(fvec4) CompositeExtract 75 0
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Store 74(color) 76
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HLSL: add intrinsic function implicit promotions
This PR handles implicit promotions for intrinsics when there is no exact match,
such as for example clamp(int, bool, float). In this case the int and bool will
be promoted to a float, and the clamp(float, float, float) form used.
These promotions can be mixed with shape conversions, e.g, clamp(int, bool2, float2).
Output conversions are handled either via the existing addOutputArgumentConversion
function, which this PR generalizes to handle either aggregates or unaries, or by
intrinsic decomposition. If there are methods or intrinsics to be decomposed,
then decomposition is responsible for any output conversions, which turns out to
happen automatically in all current cases. This can be revisited once inout
conversions are in place.
Some cases of actual ambiguity were fixed in several tests, e.g, spv.register.autoassign.*
Some intrinsics with only uint versions were expanded to signed ints natively, where the
underlying AST and SPIR-V supports that. E.g, countbits. This avoids extraneous
conversion nodes.
A new function promoteAggregate is added, and used by findFunction. This is essentially
a generalization of the "promote 1st or 2nd arg" algorithm in promoteBinary.
The actual selection proceeds in three steps, as described in the comments in
hlslParseContext::findFunction:
1. Attempt an exact match. If found, use it.
2. If not, obtain the operator from step 1, and promote arguments.
3. Re-select the intrinsic overload from the results of step 2.
2016-11-02 18:42:34 +00:00
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Return
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FunctionEnd
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2017-01-19 22:41:47 +00:00
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10(@main():8(PS_OUTPUT) Function None 9
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11: Label
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28(sizeQueryTemp): 27(ptr) Variable Function
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35(WidthI): 34(ptr) Variable Function
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38(sizeQueryTemp): 27(ptr) Variable Function
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44(NumberOfLevelsU): 27(ptr) Variable Function
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47(sizeQueryTemp): 27(ptr) Variable Function
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50(WidthU): 27(ptr) Variable Function
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52(NumberOfLevelsI): 34(ptr) Variable Function
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56(sizeQueryTemp): 27(ptr) Variable Function
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65(ps_output): 64(ptr) Variable Function
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22: 21(ptr) AccessChain 19 20
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23: 6(float) Load 22
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26: 6(float) ExtInst 1(GLSL.std.450) 43(FClamp) 23 24 25
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32: 29 Load 31(g_tTex1df4)
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33: 12(int) ImageQuerySize 32
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Store 28(sizeQueryTemp) 33
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36: 13(int) Load 28(sizeQueryTemp)
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37: 12(int) Bitcast 36
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Store 35(WidthI) 37
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39: 29 Load 31(g_tTex1df4)
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41: 12(int) ImageQuerySizeLod 39 40
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Store 38(sizeQueryTemp) 41
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42: 13(int) Load 38(sizeQueryTemp)
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43: 12(int) Bitcast 42
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Store 35(WidthI) 43
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45: 29 Load 31(g_tTex1df4)
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46: 12(int) ImageQueryLevels 45
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Store 44(NumberOfLevelsU) 46
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48: 29 Load 31(g_tTex1df4)
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49: 12(int) ImageQuerySizeLod 48 40
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Store 47(sizeQueryTemp) 49
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51: 13(int) Load 47(sizeQueryTemp)
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Store 50(WidthU) 51
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53: 29 Load 31(g_tTex1df4)
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54: 12(int) ImageQueryLevels 53
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55: 12(int) Bitcast 54
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Store 52(NumberOfLevelsI) 55
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57: 29 Load 31(g_tTex1df4)
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58: 12(int) ImageQuerySizeLod 57 40
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Store 56(sizeQueryTemp) 58
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59: 13(int) Load 56(sizeQueryTemp)
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60: 12(int) Bitcast 59
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Store 35(WidthI) 60
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61: 29 Load 31(g_tTex1df4)
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62: 12(int) ImageQueryLevels 61
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63: 12(int) Bitcast 62
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Store 52(NumberOfLevelsI) 63
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69: 68(ptr) AccessChain 65(ps_output) 66
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Store 69 67
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70:8(PS_OUTPUT) Load 65(ps_output)
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ReturnValue 70
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FunctionEnd
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