llvm-mirror/test/CodeGen/X86/sse-align-4.ll

; RUN: llc < %s -march=x86-64 | grep movup | count 2

define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
  store <4 x float> %x, <4 x float>* %p, align 4
  ret void
}
define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {
  store <2 x double> %x, <2 x double>* %p, align 8
  ret void
}
Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290 2009-09-08 23:54:48 +00:00			`; RUN: llc < %s -march=x86-64 \| grep movup \| count 2`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00
Add nounwind. llvm-svn: 50837 2008-05-07 22:59:08 +00:00			`define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00			`store <4 x float> %x, <4 x float>* %p, align 4`
			`ret void`
			`}`
Add nounwind. llvm-svn: 50837 2008-05-07 22:59:08 +00:00			`define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00			`store <2 x double> %x, <2 x double>* %p, align 8`
			`ret void`
			`}`