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released this
2025-12-22 02:42:31 -05:00 | 0 commits to master since this release📅 Originally published on GitHub: Sat, 24 Jan 2026 11:07:22 GMT
🏷️ Git tag created: Mon, 22 Dec 2025 07:42:31 GMTWhat's Changed
- Bump llvm to 21.1.8
- This release is generated by https://github.com/Megamouse/rpcs3/actions/runs/21312728363
- We now use the official llvm repository and only use our llvm-mirror for publishing the releases
- The source code in this release does belong to the llvm-mirror and does not match the actual release. See https://github.com/llvm/llvm-project/releases/tag/llvmorg-21.1.8 for the actual source code
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released this
2025-02-05 12:46:23 -05:00 | 3 commits to master since this release📅 Originally published on GitHub: Thu, 06 Feb 2025 00:12:15 GMT
🏷️ Git tag created: Wed, 05 Feb 2025 17:46:23 GMTWhat's Changed
- Bump to LLVM 19.1.7 by @kd-11 in https://github.com/RPCS3/llvm-mirror/pull/19
- Export token from pipeline by @kd-11 in https://github.com/RPCS3/llvm-mirror/pull/21
Full Changelog: https://github.com/RPCS3/llvm-mirror/compare/custom-build-win-18.1.8...custom-build-win-19.1.7
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released this
2024-09-01 18:51:23 -04:00 | 9 commits to master since this release📅 Originally published on GitHub: Tue, 10 Sep 2024 06:41:46 GMT
🏷️ Git tag created: Sun, 01 Sep 2024 22:51:23 GMTChanges:
ac2765e624Workaround for cmake bug when compiling with /MT7d99be9394Create test.txt
This list of changes was auto generated.
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released this
2023-04-08 06:50:41 -04:00 | 10 commits to master since this release📅 Originally published on GitHub: Sat, 08 Apr 2023 12:17:01 GMT
🏷️ Git tag created: Sat, 08 Apr 2023 10:50:41 GMTChanges:
f7a5e52b3316.0.1
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released this
2023-03-21 07:41:10 -04:00 | 11 commits to master since this release📅 Originally published on GitHub: Tue, 21 Mar 2023 13:20:15 GMT
🏷️ Git tag created: Tue, 21 Mar 2023 11:41:10 GMTChanges:
89d5468e95*** USE llvm/llvm-project ***9b52b6c39aClean up and improve Zen CPU detectionbc7b2ed172Quick hack for Zen 4, more Zen 3 detectione8f2aa0ae4add raptorlake target5521155be5Fix register clobbering on aarch64 GHC when mixing tail/non-tail callsc725f494c9X86: Avoid converting EVEX to VEX when disp8 would be beneficialeb7a5e5301Fix tail call guarantee setting for GHC on arm64 backend509d31ad89Force ELF on macOS1c0ca194dcRelax volatile stores (always return)a670c459eaEnable LLVM_USE_PERF
See More
318b8fe374X86: fixup matchPMADDWD_31cc7bdd501X86: improve (V)PMADDWD detection (2)610c27aa1cX86: disable AVX512 truncate with saturation instructions747fc0efaalib/Support: Detect AVX-512 on Alderlake CPUs18f153b33blib/Support: Add Tigerlake and Alderlake detection6382230f0etest: Remove test files05332b78c7TypeSize.h: add integral constructor to ElementCount902970b075IRBuilder.h: remove deprecationsc9fceef173X86: fixup (V)PMADDWD detectionf7d625e31aX86: improve (V)PMADDWD detectionc36b21c023X86: modify PreserveAll CC to save full AVX-512 state2e65b3a418Fix possible compilation issue with gcc-11548daf04b5X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.d5bc359dfdX86: add patterns for X86ISD::VSHLV and X86ISD::VSRLVbed700114eX86: add pattern for X86ISD::VSRAV2ffa82223fX86: expand detectAVGPattern()5ff8f4151cX86: optimize VSELECT for v16i8 with shl + sign bit test4743d020ceX86: LowerShift: new algorithm for vector-vector shiftsd5b5885c23Disable GDBRegistrationListener6516f565edMCJIT: don't finalize modules on symbol lookup (workaround)d18817ded9X86: Fix/workaround Small Code Model for JIT8edd96e498Set up CI with Azure Pipelines39c406a58f[AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)zbe1489a181[debuginfo-test][cross-project-tests] Release note for new project nameaed4e7449f[X86] combineX86ShuffleChain - ensure we only peek through bitcasts to vectors (PR51858)47e63cb60e[openmp] Apply code change from D109500fca643847d[VPlan] Fix crash caused by not updating all users properly.7b93a88a1eRevert "[AArch64][GlobalISel] Legalize bswap <2 x i16>"b6614b2353Revert [MC][ELF] Emit separate unique sections for different flagsa967752a95[X86] Don't clobber EBX in stackprobes7d56483207[IR] Handle constant expressions in containsUndefinedElement()bedf13b1a7[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)5e5115bbd0[MemCpyOpt] Fix a variety of scalable-type crashes28d769100dWorkaround incorrect types when lowering fixed length gather/scatterb37f5f2114Inform pass manager when child loops are deleted601c2dd9ddFine grain control over some symbol visibility5f6ef6fbfd[AArch64][SME] Fix imm bug in mov vector to tile aliases921995afd5Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."d21237cb11[SelectionDAGBuilder] Bugfix in visitInlineAsm()64f4a52b52[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations09c230ececAdd llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)e0d7c39869[AArch64][sve] Prevent incorrect function call on fixed width vector3c59cf5aa7[SCEV] Fix applyLoopGuards() with range check idiom (PR51760)8830999b87[DAGCombine] Prevent the transform of combine for multi-use operand6d085fa2f5[tests] precommit tests for D107692bf02d31357[docs] Update release notes with items related to Flang12537ac90c[libomptarget][amdcgn] Only add opt/llvm-link dependency if TARGET is available [ org/D107156#2969862 ]4b60833c5b[libomptarget][amdcgn] Add build dependency for llvm-link and optba85498148[RISCV] Fix reporting of incorrect commutable operand indicesbf7908ca9b[Orc] Enable debug object tests only on x86_64 hosts683bdb08a0[Linker] Support weak symbols in nodeduplicate COMDAT groupe415eb692a[docs] Mention that the legacy PM is deprecated and will be removed after 14fda0edff63[NewPM] Add missing LTO ArgPromotion pass72d2352801[AlignFromAssume] Bailout w/non-constant alignments (pr51680)6d1749e6c0[SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero4ddceef928[WebAssembly] Fix FastISel of condition in different block (PR51651)8fbe4ddc7c[M68k] Update pointer data layoutde85b171b7[M68k][NFC] Rename M68kOperand::Kind to KindTyab550c798f[CMake] Change -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=off to -DLLVM_ENABLE_NEW_PASS_MANAGER=off79ff6e4b2d[LoopIdiom] Don't transform loop into memmove when load from body has more than one useb61f80921f[NFC][LoopIdiom] Add reproducer of wrong memmove transformation5aea8f0472Revert "[RISCV] Fix reporting of incorrect commutable operand indices"8a19c7f52bThinLTO: Fix inline assembly references to static functions with CFI2424302e99[RISCV] Fix reporting of incorrect commutable operand indices13fbbfff3a[Coverage][llvm-cov] Correctly export branch coverage in LCOV formatfa3a9f0fc7Revert sharing subprograms across CUse4e6f3eeff[AArch64] Fix comparison peephole opt with non-0/1 immediate (PR51476)45d26b8826[X86][AVX] Extract SUBV_BROADCAST constant bits from just the lower subvector range (PR51281)4d78ad44fb[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert8202608068[PowerPC] Disable CTR Loop generate for fma with the PPC double double type.22b0c02125[DAGCombiner] Stop visitEXTRACT_SUBVECTOR creating illegal BITCASTs post legalisation.0bbcb191e3[Attributor][FIX] Guard constant casts with type size checks4345e14522[InstCombine] avoid infinite loops from min/max canonicalization5a14ea148e[InstSimplify] fold min/max with limit constantde802b8e6e[InstSimplify] add tests for min/max idioms; NFC9740b5c5ef[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform00203829b4[NFC] Clean up tests in test/Transforms/LoopVectorize/assume.ll3a88dc8338Add release notes for things relating to MinGW in the release4a38ef8718[ELF] Don't emit SHF_GNU_RETAIN on Solarisfd411b2b5d[profile] Fix profile merging with binary IDs681b643c07[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).fb132cb74b[MCA][NFC] Add tests for PR51318 and PR51322.db94372a40[MCA] Simplify the rounding logic used in TimelineView::printWaitTimeEntry.64a6596867[Attributor][NFC] Try to make the windows build bots happyd2cc939747[Attributor][FIX] Handle recurrences (PHIs) in AAPointerInfo explicitlye9a9a807dd[Attributor][FIX] Only avoid visiting PHI uses multiple times (PR51249)5cf4e36ce1[Attributor][NFC] Precommit reproducer for PR512490c8a79e78d[RISCV] Add scheduling resources for V11c22c929dDrop LLVM_VERSION_SUFFIX13e216d251[llvm] [cmake] Export LLVM_ENABLE_NEW_PASS_MANAGER into LLVMConfig.cmakeee15bdbb06[AArch64][SVE] Fix assertion failure when lowering fixed length gather/scatter7d89a50287[llvm] [lit] Fix inconsistent test order in shtest-keyword-parse-errorsf6a86e448aBPF: avoid NE/EQ loop exit conditiona558de374f[InstCombine] Fixed select + masked load fold failure7563d8dfe5[llvm-rc] Allow specifying language with a leading 0x prefix910de616a4[DebugInfo][LSR] Avoid crashes on large integer inputs46ad88f625Follow-up to D105207, only salvage affine SCEVs to avoid a crashff86d9e5f0[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRa75903d41d[ConstantFold] Get rid of special cases for sizeof etc.f9a2d3e277[test] Fix tools/gold/X86/comdat-nodeduplicate.ll on non-X86 hosts8be74d232cFixing an infinite loop problem in InstCombine3851813b89[PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types. [ #2875179 ]e20914df74Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types."2b94ecbbe0[SROA] prevent crash on large memset length (PR50910)30f0ebbbe2[Attributor] Don't test internalization in the CGSCC pass.4f1fd1c209[Attributor] Change function internalization to not replace uses in internalized callers710ae2bfd3[ReleaseNotes] Add scalable matrix extension support to AArch64 changesbafc7f359f[llvm][Release notes] Add AArch64 SVE, PAC and LLDB prebuilt binaryaa2a6b072f[llvm][Release notes] Add memory tagging support to lldb changesd4eedb2312[Analysis] improve function signature checking for snprintf9770d34891[OpenMP] Fixing llvm-omp-device-info compilation with runtimes70f5e23577[X86][AVX] Add test case for PR51281df3286259b[DAGCombiner] don't try to partially reduce add-with-overflow opsa0686462c3[AArch64][x86] add tests for add-with-overflow folds; NFCb92c9f9565[DivRemPairs] make sure we have a valid CFG for hoisting division7c9c296915[RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop.276fcebbe0[AArch64] Legalize MVT::i64x8 in DAG isel loweringa50e569197[AArch64] Add a Machine Value Type for 8 consecutive registerscd0096f439[DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs183b0c7c98[AArch64][SVE] Fix incorrect mask type when lowering fixed type SVE gather/scatter923213f844test-release.sh: Kill python29a10dd5b1cRevert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"c463fa6cad[mlir][openacc] Initial translation for DataOp to LLVM IR5b7208da36[OpenMP] Folding threadLimit and numThreads when single value in kernels66a78bc217llvm/utils: guarantee revert_checker's revert orderingbab6d38daf[DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND2e57fe1d7dPrecommit test files for D105344 (NFC)a6d5003afd[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT9b53e594b4Reapply "[Attributor] Disable simplification AAs if a callback is present""5d447ad589Revert "[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT"115164b68bAdd llvm::equal convenient wrapper for ranges around std::equal409f0eedd6[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT60850cdc6a[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs803630dbd1[gn build] Port 8a48e6dda9f796f821bd7bRevert "[Attributor] Disable simplification AAs if a callback is present"0042081f58[Attributor] VerifycheckForAllUsesreturn value properly0b6fb7b1ef[Attributor] Disable simplification AAs if a callback is present9aacda281cFix test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll.091e720912[gn build] manually port 71909de37495506c974562[MLGO] fix silly LLVM_DEBUG misusef4b486c976[NFC][MLGO] Debug messages for what inline advisor is selected8b3f85a32c[PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX11aa71a71d[x86] update stale code comment; NFCd571039392[x86] add more tests for cmov and lea; NFCece3299a71AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx917f139f330AMDGPU/GlobalISel: Fix wrong addrspace in test MMOscfbd77a7f1AMDGPU/GlobalISel: Add a few tests for unaligned truncating storesc0d40a1ca3Remove unused include that's also a layering violation. NFC.0a69d4f31aAdd test update for a11d9a1f480f which disables fallbacks.6ce8f2f7c1[AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.2a88f80da4[ASAN] NFC: Remove redundant variablec563d2cbcd[gn build] Port 02077da7e7a8d9613eb43c[Matrix] Fix shape for factored transposeadd64be20a[Matrix] RAUW should only replace an instruction in ShapeMap if supportsShapeInfo6516543c4bAdd jump-threading optimization for deterministic finite automata6bfc6b8665[RISCV] Select vector shl by 1 to a vector add.0f86a54b34[AArch64] Update and expand min-max cost model test. NFCfd18a762a0Enabling the copy-constant-to-alloca optimization in more instancescdd50ed2ff[LoopVectorize] Don't interleave scalar ordered reductions for inner loops3ad8a0b712Update reduction test. Remove standalone test file3b4453b968AMDGPU: Update tests for lower i1 change8979bda8e8AMDGPU: Treat IMPLICIT_DEF like a constant lanemask sourcebb4e957ebf[WebAssembly] Codegen for extmul SIMD instructions2b967460b4[SystemZ][z/OS] Initial code to generate assembly files on z/OS23f3f90569Strip undef implying attributes when moving calls05308b27eaRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."d809395fdeRevert "Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI.""9d32182a3aRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."adf33c8470[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr scheduling64d9d45951Handle unused variable when assertions are disabledb8af1d6561[IVDescriptors] Fix bug in checkOrderedReductionfe743a5b25[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR47a51741f3[DebugInfo][InstrRef] Handle llvm.frameaddress intrinsics gracefullye13e00f7b3[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR2e863e863d[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRb5cbfeed77[PowerPC] add more testcases for ld_splat; nfcac97ba67e8[LangRef][NFC] Fix variable name in llvm.maxnum docsa99adc793b[X86] Add PR37025 test coveragee1c8650040[LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.3bc8cd6a0b[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuildercf6bdfc026[SelectionDAG] Support scalable splats in U(ADD|SUB)SAT combines5afacc5171[RISCV] Add support for vector saturating add/sub operationsc2bd628550[NFC] Reflow some debug messages.1ae2c0fb16[AArch64][SME] Add zero instructionb7fc1f8c1c[RISCV] Add tests showing missed vector saturating add/sub combines4d9d8789ad[ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses565fcd6a48[LoopFlatten] Use SCEV and Loop APIs to identify increment and trip countee2584c4c2[docs] Update release notes with all LLVM-C API changese8ead0fbb2[Debug-Info][llvm-dwarfdump] Don't try to dump location10658f9d9e[gn build] Port 2487db1f2862d08c2fabb8[ORC] Require ExecutorProcessControl when constructing an ExecutionSession.e9073c9b78[OpenMP] Try to simplify all loads in device code756885168c[Attributor][FIX] Copy all members in the assignment operator7e9917e379[Attributor] Utilize the InstSimplify interface to simplify instructions86cba7bf5e[InstSimplify] Expose generic interface for replaced operand simplification35ac57a3f1[Attributor] Update check lines for all AMDGPU attributor tests2b8eaac9b5[Attributor][FIX] Update AMDGPU attributor test700878ee36[Coroutine] Record the elided coroutinesffb4271d86Merge all the llvm-exegesis unit tests into a single binaryeca1a76d00[CSSPGO] Tweak ICP threshold in top-down inliner4ce16022d3[Local] Do not introduce a newllvm.trapbeforeunreachable95f415bd34[Attributor] Delete dead stores5ee3942ae7[Attributor] Introduce getPotentialCopiesOfStoredValue and use it60670bde11Build libSupport with -Werror=global-constructors (NFC)eb0ba2928d[AArch64] Fix -Wparentheses warning with gcc 5.4. NFCce23772b94[NFC][InstCombine] Fix typo52c4e0dd10[llvm-jitlink] Don't hardcode LLVM version number into the runtime path.fcd0279b17Revert "[GlobalISel] Add scalar widening for G_MERGE_VALUES destination"14491b35e0[AbstractAttributor] Fold __kmpc_parallel_level if possible6a849a320d[OpenMP] Run rewriteDeviceCodeStateMachine in the Module not CGSCC passd40841959b[Attributor][FIX] Do not return CHANGED unconditionally04130ef1fa[Attributor][FIX] Track change status for AAIsDead properly8a88013900[gn build] Kind of port c7b3a91017d2 (libclang version script)5997b61680[AMDGPU] Add SelectionDAG support for insert_subvector on v4f64ac19c5a542Revert "Build libSupport with -Werror=global-constructors (NFC)"64c9fc2e9c[PowerPC] Fix materialization of SP float values on Power1069e5ee4faaRevert "[AArch64][GlobalISel] Legalize ctpop s128"1c2cdfcee3[GlobalISel] Add scalar widening for G_MERGE_VALUES destinationb21820b66f[SCEV] Add a comment about invariant in howManyLessThans18108c50ec[AArch64][GlobalISel] Legalize ctpop s1288bfb4cf745[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX07a9552b3bBuild libSupport with -Werror=global-constructors (NFC)6634a71bd1[AArch64][GlobalISel] Add identity combines to post-legal combiner.3698f6f3f3[llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file5e3045ed0c[GlobalISel] Add a constant folding combine.5b24282a50[WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC)9b48b7e7be[WebAssembly] Make Emscripten EH work with Emscripten SjLjcc27d61007[SimplifyCFG] SwitchToLookupTable(): don't increase ret count5b8d8bfd1b[SimplifyCFG] Drop support for simplifying cond branch to two (different) ret'sc0c15a814e[SimplifyCFG] Drop support for duplicating ret's into uncond predecessors33d35b0a79[CodeView] Saturate values bigger than supported by APInt.e4830a62b3[ARM] Fixup vst4 test. NFCbbc51b9f17[PowerPC]Add addex instruction definition and MC tests4f1b8e266e[LV] Don't let ForceTargetInstructionCost override Invalid cost.bb39cd345a[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.2e5bfee63f[SimplifyCFG] Remove stale comment after d7378259aa, NFCa85a7951e1Fix clang debug info irgen of i128 enumsc4acdbbb3c[PowerPC] Add implicit-def RM to instructions mtfsb[01]71556de73f[OpenMP][NFC] Remove unncessary capture in RAII structb2d24acf01[amdgpu] Add 64-bit PC support when expanding unconditional branches.
This list of changes was auto generated.
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released this
2020-03-03 02:50:32 -05:00 | 27058 commits to master since this release📅 Originally published on GitHub: Tue, 03 Mar 2020 09:49:47 GMT
🏷️ Git tag created: Tue, 03 Mar 2020 07:50:32 GMTChanges:
9b52b6c39aClean up and improve Zen CPU detectionbc7b2ed172Quick hack for Zen 4, more Zen 3 detectione8f2aa0ae4add raptorlake target5521155be5Fix register clobbering on aarch64 GHC when mixing tail/non-tail callsc725f494c9X86: Avoid converting EVEX to VEX when disp8 would be beneficialeb7a5e5301Fix tail call guarantee setting for GHC on arm64 backend509d31ad89Force ELF on macOS1c0ca194dcRelax volatile stores (always return)a670c459eaEnable LLVM_USE_PERF318b8fe374X86: fixup matchPMADDWD_3
See More
1cc7bdd501X86: improve (V)PMADDWD detection (2)610c27aa1cX86: disable AVX512 truncate with saturation instructions747fc0efaalib/Support: Detect AVX-512 on Alderlake CPUs18f153b33blib/Support: Add Tigerlake and Alderlake detection6382230f0etest: Remove test files05332b78c7TypeSize.h: add integral constructor to ElementCount902970b075IRBuilder.h: remove deprecationsc9fceef173X86: fixup (V)PMADDWD detectionf7d625e31aX86: improve (V)PMADDWD detectionc36b21c023X86: modify PreserveAll CC to save full AVX-512 state2e65b3a418Fix possible compilation issue with gcc-11548daf04b5X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.d5bc359dfdX86: add patterns for X86ISD::VSHLV and X86ISD::VSRLVbed700114eX86: add pattern for X86ISD::VSRAV2ffa82223fX86: expand detectAVGPattern()5ff8f4151cX86: optimize VSELECT for v16i8 with shl + sign bit test4743d020ceX86: LowerShift: new algorithm for vector-vector shiftsd5b5885c23Disable GDBRegistrationListener6516f565edMCJIT: don't finalize modules on symbol lookup (workaround)d18817ded9X86: Fix/workaround Small Code Model for JIT8edd96e498Set up CI with Azure Pipelines39c406a58f[AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)zbe1489a181[debuginfo-test][cross-project-tests] Release note for new project nameaed4e7449f[X86] combineX86ShuffleChain - ensure we only peek through bitcasts to vectors (PR51858)47e63cb60e[openmp] Apply code change from D109500fca643847d[VPlan] Fix crash caused by not updating all users properly.7b93a88a1eRevert "[AArch64][GlobalISel] Legalize bswap <2 x i16>"b6614b2353Revert [MC][ELF] Emit separate unique sections for different flagsa967752a95[X86] Don't clobber EBX in stackprobes7d56483207[IR] Handle constant expressions in containsUndefinedElement()bedf13b1a7[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)5e5115bbd0[MemCpyOpt] Fix a variety of scalable-type crashes28d769100dWorkaround incorrect types when lowering fixed length gather/scatterb37f5f2114Inform pass manager when child loops are deleted601c2dd9ddFine grain control over some symbol visibility5f6ef6fbfd[AArch64][SME] Fix imm bug in mov vector to tile aliases921995afd5Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."d21237cb11[SelectionDAGBuilder] Bugfix in visitInlineAsm()64f4a52b52[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations09c230ececAdd llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)e0d7c39869[AArch64][sve] Prevent incorrect function call on fixed width vector3c59cf5aa7[SCEV] Fix applyLoopGuards() with range check idiom (PR51760)8830999b87[DAGCombine] Prevent the transform of combine for multi-use operand6d085fa2f5[tests] precommit tests for D107692bf02d31357[docs] Update release notes with items related to Flang12537ac90c[libomptarget][amdcgn] Only add opt/llvm-link dependency if TARGET is available [ org/D107156#2969862 ]4b60833c5b[libomptarget][amdcgn] Add build dependency for llvm-link and optba85498148[RISCV] Fix reporting of incorrect commutable operand indicesbf7908ca9b[Orc] Enable debug object tests only on x86_64 hosts683bdb08a0[Linker] Support weak symbols in nodeduplicate COMDAT groupe415eb692a[docs] Mention that the legacy PM is deprecated and will be removed after 14fda0edff63[NewPM] Add missing LTO ArgPromotion pass72d2352801[AlignFromAssume] Bailout w/non-constant alignments (pr51680)6d1749e6c0[SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero4ddceef928[WebAssembly] Fix FastISel of condition in different block (PR51651)8fbe4ddc7c[M68k] Update pointer data layoutde85b171b7[M68k][NFC] Rename M68kOperand::Kind to KindTyab550c798f[CMake] Change -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=off to -DLLVM_ENABLE_NEW_PASS_MANAGER=off79ff6e4b2d[LoopIdiom] Don't transform loop into memmove when load from body has more than one useb61f80921f[NFC][LoopIdiom] Add reproducer of wrong memmove transformation5aea8f0472Revert "[RISCV] Fix reporting of incorrect commutable operand indices"8a19c7f52bThinLTO: Fix inline assembly references to static functions with CFI2424302e99[RISCV] Fix reporting of incorrect commutable operand indices13fbbfff3a[Coverage][llvm-cov] Correctly export branch coverage in LCOV formatfa3a9f0fc7Revert sharing subprograms across CUse4e6f3eeff[AArch64] Fix comparison peephole opt with non-0/1 immediate (PR51476)45d26b8826[X86][AVX] Extract SUBV_BROADCAST constant bits from just the lower subvector range (PR51281)4d78ad44fb[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert8202608068[PowerPC] Disable CTR Loop generate for fma with the PPC double double type.22b0c02125[DAGCombiner] Stop visitEXTRACT_SUBVECTOR creating illegal BITCASTs post legalisation.0bbcb191e3[Attributor][FIX] Guard constant casts with type size checks4345e14522[InstCombine] avoid infinite loops from min/max canonicalization5a14ea148e[InstSimplify] fold min/max with limit constantde802b8e6e[InstSimplify] add tests for min/max idioms; NFC9740b5c5ef[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform00203829b4[NFC] Clean up tests in test/Transforms/LoopVectorize/assume.ll3a88dc8338Add release notes for things relating to MinGW in the release4a38ef8718[ELF] Don't emit SHF_GNU_RETAIN on Solarisfd411b2b5d[profile] Fix profile merging with binary IDs681b643c07[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).fb132cb74b[MCA][NFC] Add tests for PR51318 and PR51322.db94372a40[MCA] Simplify the rounding logic used in TimelineView::printWaitTimeEntry.64a6596867[Attributor][NFC] Try to make the windows build bots happyd2cc939747[Attributor][FIX] Handle recurrences (PHIs) in AAPointerInfo explicitlye9a9a807dd[Attributor][FIX] Only avoid visiting PHI uses multiple times (PR51249)5cf4e36ce1[Attributor][NFC] Precommit reproducer for PR512490c8a79e78d[RISCV] Add scheduling resources for V11c22c929dDrop LLVM_VERSION_SUFFIX13e216d251[llvm] [cmake] Export LLVM_ENABLE_NEW_PASS_MANAGER into LLVMConfig.cmakeee15bdbb06[AArch64][SVE] Fix assertion failure when lowering fixed length gather/scatter7d89a50287[llvm] [lit] Fix inconsistent test order in shtest-keyword-parse-errorsf6a86e448aBPF: avoid NE/EQ loop exit conditiona558de374f[InstCombine] Fixed select + masked load fold failure7563d8dfe5[llvm-rc] Allow specifying language with a leading 0x prefix910de616a4[DebugInfo][LSR] Avoid crashes on large integer inputs46ad88f625Follow-up to D105207, only salvage affine SCEVs to avoid a crashff86d9e5f0[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRa75903d41d[ConstantFold] Get rid of special cases for sizeof etc.f9a2d3e277[test] Fix tools/gold/X86/comdat-nodeduplicate.ll on non-X86 hosts8be74d232cFixing an infinite loop problem in InstCombine3851813b89[PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types. [ #2875179 ]e20914df74Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types."2b94ecbbe0[SROA] prevent crash on large memset length (PR50910)30f0ebbbe2[Attributor] Don't test internalization in the CGSCC pass.4f1fd1c209[Attributor] Change function internalization to not replace uses in internalized callers710ae2bfd3[ReleaseNotes] Add scalable matrix extension support to AArch64 changesbafc7f359f[llvm][Release notes] Add AArch64 SVE, PAC and LLDB prebuilt binaryaa2a6b072f[llvm][Release notes] Add memory tagging support to lldb changesd4eedb2312[Analysis] improve function signature checking for snprintf9770d34891[OpenMP] Fixing llvm-omp-device-info compilation with runtimes70f5e23577[X86][AVX] Add test case for PR51281df3286259b[DAGCombiner] don't try to partially reduce add-with-overflow opsa0686462c3[AArch64][x86] add tests for add-with-overflow folds; NFCb92c9f9565[DivRemPairs] make sure we have a valid CFG for hoisting division7c9c296915[RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop.276fcebbe0[AArch64] Legalize MVT::i64x8 in DAG isel loweringa50e569197[AArch64] Add a Machine Value Type for 8 consecutive registerscd0096f439[DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs183b0c7c98[AArch64][SVE] Fix incorrect mask type when lowering fixed type SVE gather/scatter923213f844test-release.sh: Kill python29a10dd5b1cRevert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"c463fa6cad[mlir][openacc] Initial translation for DataOp to LLVM IR5b7208da36[OpenMP] Folding threadLimit and numThreads when single value in kernels66a78bc217llvm/utils: guarantee revert_checker's revert orderingbab6d38daf[DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND2e57fe1d7dPrecommit test files for D105344 (NFC)a6d5003afd[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT9b53e594b4Reapply "[Attributor] Disable simplification AAs if a callback is present""5d447ad589Revert "[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT"115164b68bAdd llvm::equal convenient wrapper for ranges around std::equal409f0eedd6[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT60850cdc6a[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs803630dbd1[gn build] Port 8a48e6dda9f796f821bd7bRevert "[Attributor] Disable simplification AAs if a callback is present"0042081f58[Attributor] VerifycheckForAllUsesreturn value properly0b6fb7b1ef[Attributor] Disable simplification AAs if a callback is present9aacda281cFix test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll.091e720912[gn build] manually port 71909de37495506c974562[MLGO] fix silly LLVM_DEBUG misusef4b486c976[NFC][MLGO] Debug messages for what inline advisor is selected8b3f85a32c[PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX11aa71a71d[x86] update stale code comment; NFCd571039392[x86] add more tests for cmov and lea; NFCece3299a71AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx917f139f330AMDGPU/GlobalISel: Fix wrong addrspace in test MMOscfbd77a7f1AMDGPU/GlobalISel: Add a few tests for unaligned truncating storesc0d40a1ca3Remove unused include that's also a layering violation. NFC.0a69d4f31aAdd test update for a11d9a1f480f which disables fallbacks.6ce8f2f7c1[AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.2a88f80da4[ASAN] NFC: Remove redundant variablec563d2cbcd[gn build] Port 02077da7e7a8d9613eb43c[Matrix] Fix shape for factored transposeadd64be20a[Matrix] RAUW should only replace an instruction in ShapeMap if supportsShapeInfo6516543c4bAdd jump-threading optimization for deterministic finite automata6bfc6b8665[RISCV] Select vector shl by 1 to a vector add.0f86a54b34[AArch64] Update and expand min-max cost model test. NFCfd18a762a0Enabling the copy-constant-to-alloca optimization in more instancescdd50ed2ff[LoopVectorize] Don't interleave scalar ordered reductions for inner loops3ad8a0b712Update reduction test. Remove standalone test file3b4453b968AMDGPU: Update tests for lower i1 change8979bda8e8AMDGPU: Treat IMPLICIT_DEF like a constant lanemask sourcebb4e957ebf[WebAssembly] Codegen for extmul SIMD instructions2b967460b4[SystemZ][z/OS] Initial code to generate assembly files on z/OS23f3f90569Strip undef implying attributes when moving calls05308b27eaRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."d809395fdeRevert "Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI.""9d32182a3aRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."adf33c8470[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr scheduling64d9d45951Handle unused variable when assertions are disabledb8af1d6561[IVDescriptors] Fix bug in checkOrderedReductionfe743a5b25[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR47a51741f3[DebugInfo][InstrRef] Handle llvm.frameaddress intrinsics gracefullye13e00f7b3[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR2e863e863d[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRb5cbfeed77[PowerPC] add more testcases for ld_splat; nfcac97ba67e8[LangRef][NFC] Fix variable name in llvm.maxnum docsa99adc793b[X86] Add PR37025 test coveragee1c8650040[LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.3bc8cd6a0b[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuildercf6bdfc026[SelectionDAG] Support scalable splats in U(ADD|SUB)SAT combines5afacc5171[RISCV] Add support for vector saturating add/sub operationsc2bd628550[NFC] Reflow some debug messages.1ae2c0fb16[AArch64][SME] Add zero instructionb7fc1f8c1c[RISCV] Add tests showing missed vector saturating add/sub combines4d9d8789ad[ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses565fcd6a48[LoopFlatten] Use SCEV and Loop APIs to identify increment and trip countee2584c4c2[docs] Update release notes with all LLVM-C API changese8ead0fbb2[Debug-Info][llvm-dwarfdump] Don't try to dump location10658f9d9e[gn build] Port 2487db1f2862d08c2fabb8[ORC] Require ExecutorProcessControl when constructing an ExecutionSession.e9073c9b78[OpenMP] Try to simplify all loads in device code756885168c[Attributor][FIX] Copy all members in the assignment operator7e9917e379[Attributor] Utilize the InstSimplify interface to simplify instructions86cba7bf5e[InstSimplify] Expose generic interface for replaced operand simplification35ac57a3f1[Attributor] Update check lines for all AMDGPU attributor tests2b8eaac9b5[Attributor][FIX] Update AMDGPU attributor test700878ee36[Coroutine] Record the elided coroutinesffb4271d86Merge all the llvm-exegesis unit tests into a single binaryeca1a76d00[CSSPGO] Tweak ICP threshold in top-down inliner4ce16022d3[Local] Do not introduce a newllvm.trapbeforeunreachable95f415bd34[Attributor] Delete dead stores5ee3942ae7[Attributor] Introduce getPotentialCopiesOfStoredValue and use it60670bde11Build libSupport with -Werror=global-constructors (NFC)eb0ba2928d[AArch64] Fix -Wparentheses warning with gcc 5.4. NFCce23772b94[NFC][InstCombine] Fix typo52c4e0dd10[llvm-jitlink] Don't hardcode LLVM version number into the runtime path.fcd0279b17Revert "[GlobalISel] Add scalar widening for G_MERGE_VALUES destination"14491b35e0[AbstractAttributor] Fold __kmpc_parallel_level if possible6a849a320d[OpenMP] Run rewriteDeviceCodeStateMachine in the Module not CGSCC passd40841959b[Attributor][FIX] Do not return CHANGED unconditionally04130ef1fa[Attributor][FIX] Track change status for AAIsDead properly8a88013900[gn build] Kind of port c7b3a91017d2 (libclang version script)5997b61680[AMDGPU] Add SelectionDAG support for insert_subvector on v4f64ac19c5a542Revert "Build libSupport with -Werror=global-constructors (NFC)"64c9fc2e9c[PowerPC] Fix materialization of SP float values on Power1069e5ee4faaRevert "[AArch64][GlobalISel] Legalize ctpop s128"1c2cdfcee3[GlobalISel] Add scalar widening for G_MERGE_VALUES destinationb21820b66f[SCEV] Add a comment about invariant in howManyLessThans18108c50ec[AArch64][GlobalISel] Legalize ctpop s1288bfb4cf745[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX07a9552b3bBuild libSupport with -Werror=global-constructors (NFC)6634a71bd1[AArch64][GlobalISel] Add identity combines to post-legal combiner.3698f6f3f3[llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file5e3045ed0c[GlobalISel] Add a constant folding combine.5b24282a50[WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC)9b48b7e7be[WebAssembly] Make Emscripten EH work with Emscripten SjLjcc27d61007[SimplifyCFG] SwitchToLookupTable(): don't increase ret count5b8d8bfd1b[SimplifyCFG] Drop support for simplifying cond branch to two (different) ret'sc0c15a814e[SimplifyCFG] Drop support for duplicating ret's into uncond predecessors33d35b0a79[CodeView] Saturate values bigger than supported by APInt.e4830a62b3[ARM] Fixup vst4 test. NFCbbc51b9f17[PowerPC]Add addex instruction definition and MC tests4f1b8e266e[LV] Don't let ForceTargetInstructionCost override Invalid cost.bb39cd345a[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.2e5bfee63f[SimplifyCFG] Remove stale comment after d7378259aa, NFCa85a7951e1Fix clang debug info irgen of i128 enumsc4acdbbb3c[PowerPC] Add implicit-def RM to instructions mtfsb[01]71556de73f[OpenMP][NFC] Remove unncessary capture in RAII structb2d24acf01[amdgpu] Add 64-bit PC support when expanding unconditional branches.837c44ce91[TypePromotion] Remove redundant if. NFC
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released this
2020-03-03 02:50:32 -05:00 | 27058 commits to master since this release📅 Originally published on GitHub: Tue, 03 Mar 2020 09:48:39 GMT
🏷️ Git tag created: Tue, 03 Mar 2020 07:50:32 GMTChanges:
9b52b6c39aClean up and improve Zen CPU detectionbc7b2ed172Quick hack for Zen 4, more Zen 3 detectione8f2aa0ae4add raptorlake target5521155be5Fix register clobbering on aarch64 GHC when mixing tail/non-tail callsc725f494c9X86: Avoid converting EVEX to VEX when disp8 would be beneficialeb7a5e5301Fix tail call guarantee setting for GHC on arm64 backend509d31ad89Force ELF on macOS1c0ca194dcRelax volatile stores (always return)a670c459eaEnable LLVM_USE_PERF318b8fe374X86: fixup matchPMADDWD_3
See More
1cc7bdd501X86: improve (V)PMADDWD detection (2)610c27aa1cX86: disable AVX512 truncate with saturation instructions747fc0efaalib/Support: Detect AVX-512 on Alderlake CPUs18f153b33blib/Support: Add Tigerlake and Alderlake detection6382230f0etest: Remove test files05332b78c7TypeSize.h: add integral constructor to ElementCount902970b075IRBuilder.h: remove deprecationsc9fceef173X86: fixup (V)PMADDWD detectionf7d625e31aX86: improve (V)PMADDWD detectionc36b21c023X86: modify PreserveAll CC to save full AVX-512 state2e65b3a418Fix possible compilation issue with gcc-11548daf04b5X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.d5bc359dfdX86: add patterns for X86ISD::VSHLV and X86ISD::VSRLVbed700114eX86: add pattern for X86ISD::VSRAV2ffa82223fX86: expand detectAVGPattern()5ff8f4151cX86: optimize VSELECT for v16i8 with shl + sign bit test4743d020ceX86: LowerShift: new algorithm for vector-vector shiftsd5b5885c23Disable GDBRegistrationListener6516f565edMCJIT: don't finalize modules on symbol lookup (workaround)d18817ded9X86: Fix/workaround Small Code Model for JIT8edd96e498Set up CI with Azure Pipelines39c406a58f[AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)zbe1489a181[debuginfo-test][cross-project-tests] Release note for new project nameaed4e7449f[X86] combineX86ShuffleChain - ensure we only peek through bitcasts to vectors (PR51858)47e63cb60e[openmp] Apply code change from D109500fca643847d[VPlan] Fix crash caused by not updating all users properly.7b93a88a1eRevert "[AArch64][GlobalISel] Legalize bswap <2 x i16>"b6614b2353Revert [MC][ELF] Emit separate unique sections for different flagsa967752a95[X86] Don't clobber EBX in stackprobes7d56483207[IR] Handle constant expressions in containsUndefinedElement()bedf13b1a7[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)5e5115bbd0[MemCpyOpt] Fix a variety of scalable-type crashes28d769100dWorkaround incorrect types when lowering fixed length gather/scatterb37f5f2114Inform pass manager when child loops are deleted601c2dd9ddFine grain control over some symbol visibility5f6ef6fbfd[AArch64][SME] Fix imm bug in mov vector to tile aliases921995afd5Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."d21237cb11[SelectionDAGBuilder] Bugfix in visitInlineAsm()64f4a52b52[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations09c230ececAdd llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)e0d7c39869[AArch64][sve] Prevent incorrect function call on fixed width vector3c59cf5aa7[SCEV] Fix applyLoopGuards() with range check idiom (PR51760)8830999b87[DAGCombine] Prevent the transform of combine for multi-use operand6d085fa2f5[tests] precommit tests for D107692bf02d31357[docs] Update release notes with items related to Flang12537ac90c[libomptarget][amdcgn] Only add opt/llvm-link dependency if TARGET is available [ org/D107156#2969862 ]4b60833c5b[libomptarget][amdcgn] Add build dependency for llvm-link and optba85498148[RISCV] Fix reporting of incorrect commutable operand indicesbf7908ca9b[Orc] Enable debug object tests only on x86_64 hosts683bdb08a0[Linker] Support weak symbols in nodeduplicate COMDAT groupe415eb692a[docs] Mention that the legacy PM is deprecated and will be removed after 14fda0edff63[NewPM] Add missing LTO ArgPromotion pass72d2352801[AlignFromAssume] Bailout w/non-constant alignments (pr51680)6d1749e6c0[SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero4ddceef928[WebAssembly] Fix FastISel of condition in different block (PR51651)8fbe4ddc7c[M68k] Update pointer data layoutde85b171b7[M68k][NFC] Rename M68kOperand::Kind to KindTyab550c798f[CMake] Change -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=off to -DLLVM_ENABLE_NEW_PASS_MANAGER=off79ff6e4b2d[LoopIdiom] Don't transform loop into memmove when load from body has more than one useb61f80921f[NFC][LoopIdiom] Add reproducer of wrong memmove transformation5aea8f0472Revert "[RISCV] Fix reporting of incorrect commutable operand indices"8a19c7f52bThinLTO: Fix inline assembly references to static functions with CFI2424302e99[RISCV] Fix reporting of incorrect commutable operand indices13fbbfff3a[Coverage][llvm-cov] Correctly export branch coverage in LCOV formatfa3a9f0fc7Revert sharing subprograms across CUse4e6f3eeff[AArch64] Fix comparison peephole opt with non-0/1 immediate (PR51476)45d26b8826[X86][AVX] Extract SUBV_BROADCAST constant bits from just the lower subvector range (PR51281)4d78ad44fb[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert8202608068[PowerPC] Disable CTR Loop generate for fma with the PPC double double type.22b0c02125[DAGCombiner] Stop visitEXTRACT_SUBVECTOR creating illegal BITCASTs post legalisation.0bbcb191e3[Attributor][FIX] Guard constant casts with type size checks4345e14522[InstCombine] avoid infinite loops from min/max canonicalization5a14ea148e[InstSimplify] fold min/max with limit constantde802b8e6e[InstSimplify] add tests for min/max idioms; NFC9740b5c5ef[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform00203829b4[NFC] Clean up tests in test/Transforms/LoopVectorize/assume.ll3a88dc8338Add release notes for things relating to MinGW in the release4a38ef8718[ELF] Don't emit SHF_GNU_RETAIN on Solarisfd411b2b5d[profile] Fix profile merging with binary IDs681b643c07[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).fb132cb74b[MCA][NFC] Add tests for PR51318 and PR51322.db94372a40[MCA] Simplify the rounding logic used in TimelineView::printWaitTimeEntry.64a6596867[Attributor][NFC] Try to make the windows build bots happyd2cc939747[Attributor][FIX] Handle recurrences (PHIs) in AAPointerInfo explicitlye9a9a807dd[Attributor][FIX] Only avoid visiting PHI uses multiple times (PR51249)5cf4e36ce1[Attributor][NFC] Precommit reproducer for PR512490c8a79e78d[RISCV] Add scheduling resources for V11c22c929dDrop LLVM_VERSION_SUFFIX13e216d251[llvm] [cmake] Export LLVM_ENABLE_NEW_PASS_MANAGER into LLVMConfig.cmakeee15bdbb06[AArch64][SVE] Fix assertion failure when lowering fixed length gather/scatter7d89a50287[llvm] [lit] Fix inconsistent test order in shtest-keyword-parse-errorsf6a86e448aBPF: avoid NE/EQ loop exit conditiona558de374f[InstCombine] Fixed select + masked load fold failure7563d8dfe5[llvm-rc] Allow specifying language with a leading 0x prefix910de616a4[DebugInfo][LSR] Avoid crashes on large integer inputs46ad88f625Follow-up to D105207, only salvage affine SCEVs to avoid a crashff86d9e5f0[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRa75903d41d[ConstantFold] Get rid of special cases for sizeof etc.f9a2d3e277[test] Fix tools/gold/X86/comdat-nodeduplicate.ll on non-X86 hosts8be74d232cFixing an infinite loop problem in InstCombine3851813b89[PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types. [ #2875179 ]e20914df74Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types."2b94ecbbe0[SROA] prevent crash on large memset length (PR50910)30f0ebbbe2[Attributor] Don't test internalization in the CGSCC pass.4f1fd1c209[Attributor] Change function internalization to not replace uses in internalized callers710ae2bfd3[ReleaseNotes] Add scalable matrix extension support to AArch64 changesbafc7f359f[llvm][Release notes] Add AArch64 SVE, PAC and LLDB prebuilt binaryaa2a6b072f[llvm][Release notes] Add memory tagging support to lldb changesd4eedb2312[Analysis] improve function signature checking for snprintf9770d34891[OpenMP] Fixing llvm-omp-device-info compilation with runtimes70f5e23577[X86][AVX] Add test case for PR51281df3286259b[DAGCombiner] don't try to partially reduce add-with-overflow opsa0686462c3[AArch64][x86] add tests for add-with-overflow folds; NFCb92c9f9565[DivRemPairs] make sure we have a valid CFG for hoisting division7c9c296915[RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop.276fcebbe0[AArch64] Legalize MVT::i64x8 in DAG isel loweringa50e569197[AArch64] Add a Machine Value Type for 8 consecutive registerscd0096f439[DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs183b0c7c98[AArch64][SVE] Fix incorrect mask type when lowering fixed type SVE gather/scatter923213f844test-release.sh: Kill python29a10dd5b1cRevert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"c463fa6cad[mlir][openacc] Initial translation for DataOp to LLVM IR5b7208da36[OpenMP] Folding threadLimit and numThreads when single value in kernels66a78bc217llvm/utils: guarantee revert_checker's revert orderingbab6d38daf[DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND2e57fe1d7dPrecommit test files for D105344 (NFC)a6d5003afd[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT9b53e594b4Reapply "[Attributor] Disable simplification AAs if a callback is present""5d447ad589Revert "[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT"115164b68bAdd llvm::equal convenient wrapper for ranges around std::equal409f0eedd6[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT60850cdc6a[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs803630dbd1[gn build] Port 8a48e6dda9f796f821bd7bRevert "[Attributor] Disable simplification AAs if a callback is present"0042081f58[Attributor] VerifycheckForAllUsesreturn value properly0b6fb7b1ef[Attributor] Disable simplification AAs if a callback is present9aacda281cFix test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll.091e720912[gn build] manually port 71909de37495506c974562[MLGO] fix silly LLVM_DEBUG misusef4b486c976[NFC][MLGO] Debug messages for what inline advisor is selected8b3f85a32c[PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX11aa71a71d[x86] update stale code comment; NFCd571039392[x86] add more tests for cmov and lea; NFCece3299a71AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx917f139f330AMDGPU/GlobalISel: Fix wrong addrspace in test MMOscfbd77a7f1AMDGPU/GlobalISel: Add a few tests for unaligned truncating storesc0d40a1ca3Remove unused include that's also a layering violation. NFC.0a69d4f31aAdd test update for a11d9a1f480f which disables fallbacks.6ce8f2f7c1[AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.2a88f80da4[ASAN] NFC: Remove redundant variablec563d2cbcd[gn build] Port 02077da7e7a8d9613eb43c[Matrix] Fix shape for factored transposeadd64be20a[Matrix] RAUW should only replace an instruction in ShapeMap if supportsShapeInfo6516543c4bAdd jump-threading optimization for deterministic finite automata6bfc6b8665[RISCV] Select vector shl by 1 to a vector add.0f86a54b34[AArch64] Update and expand min-max cost model test. NFCfd18a762a0Enabling the copy-constant-to-alloca optimization in more instancescdd50ed2ff[LoopVectorize] Don't interleave scalar ordered reductions for inner loops3ad8a0b712Update reduction test. Remove standalone test file3b4453b968AMDGPU: Update tests for lower i1 change8979bda8e8AMDGPU: Treat IMPLICIT_DEF like a constant lanemask sourcebb4e957ebf[WebAssembly] Codegen for extmul SIMD instructions2b967460b4[SystemZ][z/OS] Initial code to generate assembly files on z/OS23f3f90569Strip undef implying attributes when moving calls05308b27eaRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."d809395fdeRevert "Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI.""9d32182a3aRevert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."adf33c8470[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr scheduling64d9d45951Handle unused variable when assertions are disabledb8af1d6561[IVDescriptors] Fix bug in checkOrderedReductionfe743a5b25[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR47a51741f3[DebugInfo][InstrRef] Handle llvm.frameaddress intrinsics gracefullye13e00f7b3[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR2e863e863d[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSRb5cbfeed77[PowerPC] add more testcases for ld_splat; nfcac97ba67e8[LangRef][NFC] Fix variable name in llvm.maxnum docsa99adc793b[X86] Add PR37025 test coveragee1c8650040[LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.3bc8cd6a0b[GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuildercf6bdfc026[SelectionDAG] Support scalable splats in U(ADD|SUB)SAT combines5afacc5171[RISCV] Add support for vector saturating add/sub operationsc2bd628550[NFC] Reflow some debug messages.1ae2c0fb16[AArch64][SME] Add zero instructionb7fc1f8c1c[RISCV] Add tests showing missed vector saturating add/sub combines4d9d8789ad[ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses565fcd6a48[LoopFlatten] Use SCEV and Loop APIs to identify increment and trip countee2584c4c2[docs] Update release notes with all LLVM-C API changese8ead0fbb2[Debug-Info][llvm-dwarfdump] Don't try to dump location10658f9d9e[gn build] Port 2487db1f2862d08c2fabb8[ORC] Require ExecutorProcessControl when constructing an ExecutionSession.e9073c9b78[OpenMP] Try to simplify all loads in device code756885168c[Attributor][FIX] Copy all members in the assignment operator7e9917e379[Attributor] Utilize the InstSimplify interface to simplify instructions86cba7bf5e[InstSimplify] Expose generic interface for replaced operand simplification35ac57a3f1[Attributor] Update check lines for all AMDGPU attributor tests2b8eaac9b5[Attributor][FIX] Update AMDGPU attributor test700878ee36[Coroutine] Record the elided coroutinesffb4271d86Merge all the llvm-exegesis unit tests into a single binaryeca1a76d00[CSSPGO] Tweak ICP threshold in top-down inliner4ce16022d3[Local] Do not introduce a newllvm.trapbeforeunreachable95f415bd34[Attributor] Delete dead stores5ee3942ae7[Attributor] Introduce getPotentialCopiesOfStoredValue and use it60670bde11Build libSupport with -Werror=global-constructors (NFC)eb0ba2928d[AArch64] Fix -Wparentheses warning with gcc 5.4. NFCce23772b94[NFC][InstCombine] Fix typo52c4e0dd10[llvm-jitlink] Don't hardcode LLVM version number into the runtime path.fcd0279b17Revert "[GlobalISel] Add scalar widening for G_MERGE_VALUES destination"14491b35e0[AbstractAttributor] Fold __kmpc_parallel_level if possible6a849a320d[OpenMP] Run rewriteDeviceCodeStateMachine in the Module not CGSCC passd40841959b[Attributor][FIX] Do not return CHANGED unconditionally04130ef1fa[Attributor][FIX] Track change status for AAIsDead properly8a88013900[gn build] Kind of port c7b3a91017d2 (libclang version script)5997b61680[AMDGPU] Add SelectionDAG support for insert_subvector on v4f64ac19c5a542Revert "Build libSupport with -Werror=global-constructors (NFC)"64c9fc2e9c[PowerPC] Fix materialization of SP float values on Power1069e5ee4faaRevert "[AArch64][GlobalISel] Legalize ctpop s128"1c2cdfcee3[GlobalISel] Add scalar widening for G_MERGE_VALUES destinationb21820b66f[SCEV] Add a comment about invariant in howManyLessThans18108c50ec[AArch64][GlobalISel] Legalize ctpop s1288bfb4cf745[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX07a9552b3bBuild libSupport with -Werror=global-constructors (NFC)6634a71bd1[AArch64][GlobalISel] Add identity combines to post-legal combiner.3698f6f3f3[llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file5e3045ed0c[GlobalISel] Add a constant folding combine.5b24282a50[WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC)9b48b7e7be[WebAssembly] Make Emscripten EH work with Emscripten SjLjcc27d61007[SimplifyCFG] SwitchToLookupTable(): don't increase ret count5b8d8bfd1b[SimplifyCFG] Drop support for simplifying cond branch to two (different) ret'sc0c15a814e[SimplifyCFG] Drop support for duplicating ret's into uncond predecessors33d35b0a79[CodeView] Saturate values bigger than supported by APInt.e4830a62b3[ARM] Fixup vst4 test. NFCbbc51b9f17[PowerPC]Add addex instruction definition and MC tests4f1b8e266e[LV] Don't let ForceTargetInstructionCost override Invalid cost.bb39cd345a[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.2e5bfee63f[SimplifyCFG] Remove stale comment after d7378259aa, NFCa85a7951e1Fix clang debug info irgen of i128 enumsc4acdbbb3c[PowerPC] Add implicit-def RM to instructions mtfsb[01]71556de73f[OpenMP][NFC] Remove unncessary capture in RAII structb2d24acf01[amdgpu] Add 64-bit PC support when expanding unconditional branches.837c44ce91[TypePromotion] Remove redundant if. NFC
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