llvm-mirror/test/tools/llvm-ml/rip-relative-addressing.test

# RUN: llvm-ml -m32 -filetype=asm %s | FileCheck %s --check-prefix=CHECK-32
# RUN: llvm-ml -m64 -filetype=asm %s | FileCheck %s --check-prefix=CHECK-64

.code
mov eax, [4]
; CHECK-32: mov eax, dword ptr [4]
; CHECK-64: mov eax, dword ptr [rip + 4]
END
[ms] [llvm-ml] Use default RIP-relative addressing for x64 MASM. Summary: When parsing 64-bit MASM, treat memory operands with unspecified base register as RIP-based. Documented in several places, including https://software.intel.com/en-us/articles/introduction-to-x64-assembly: "Unfortunately, MASM does not allow this form of opcode, but other assemblers like FASM and YASM do. Instead, MASM embeds RIP-relative addressing implicitly." Reviewed By: thakis Differential Revision: https://reviews.llvm.org/D73227 2020-07-01 16:39:28 +00:00			`# RUN: llvm-ml -m32 -filetype=asm %s \| FileCheck %s --check-prefix=CHECK-32`
			`# RUN: llvm-ml -m64 -filetype=asm %s \| FileCheck %s --check-prefix=CHECK-64`

			`.code`
			`mov eax, [4]`
			`; CHECK-32: mov eax, dword ptr [4]`
			`; CHECK-64: mov eax, dword ptr [rip + 4]`
			`END`