llvm-mirror/test/CodeGen/X86/inline-asm-q-regs.ll

; RUN: llc < %s -march=x86-64
; rdar://7066579

	type { i64, i64, i64, i64, i64 }		; type %0

define void @t() nounwind {
entry:
	%asmtmp = call %0 asm sideeffect "mov    %cr0, $0       \0Amov    %cr2, $1       \0Amov    %cr3, $2       \0Amov    %cr4, $3       \0Amov    %cr8, $0       \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind		; <%0> [#uses=0]
	ret void
}
Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290 2009-09-08 23:54:48 +00:00			`; RUN: llc < %s -march=x86-64`
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. llvm-svn: 76248 2009-07-17 22:13:25 +00:00			`; rdar://7066579`

			`type { i64, i64, i64, i64, i64 } ; type %0`

			`define void @t() nounwind {`
			`entry:`
			`%asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $2 \0Amov %cr4, $3 \0Amov %cr8, $0 \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%0> [#uses=0]`
			`ret void`
			`}`