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llvm-mirror/test/MC/ARM/invalid-addsub.s

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ARM: disallow add/sub to sp unless Rn is also sp. The manual says that Thumb2 add/sub instructions are only allowed to modify sp if the first source is also sp. This is slightly different from the usual rGPR restriction since it's context-sensitive, so implement it in C++. llvm-svn: 358987
2019-04-23 13:50:13 +00:00
@ RUN: not llvm-mc -triple thumbv7-apple-ios %s -o - 2>&1 | FileCheck %s
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
add sp, r5, #1
addw sp, r7, #4
add sp, r3, r2
add sp, r3, r5, lsl #3
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
@ CHECK: error: source register must be sp if destination is sp
sub sp, r5, #1
subw sp, r7, #4
sub sp, r3, r2
sub sp, r3, r5, lsl #3
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