RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-12-14 07:09:08 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
9ea8945a54
llvm-mirror/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll

67 lines
3.8 KiB
LLVM
Raw Normal View History

ARM & AArch64: make use of common cmpxchg idioms after expansion The C and C++ semantics for compare_exchange require it to return a bool indicating success. This gets mapped to LLVM IR which follows each cmpxchg with an icmp of the value loaded against the desired value. When lowered to ldxr/stxr loops, this extra comparison is redundant: its results are implicit in the control-flow of the function. This commit makes two changes: it replaces that icmp with appropriate PHI nodes, and then makes sure earlyCSE is called after expansion to actually make use of the opportunities revealed. I've also added -{arm,aarch64}-enable-atomic-tidy options, so that existing fragile tests aren't perturbed too much by the change. Many of them either rely on undef/unreachable too pervasively to be restored to something well-defined (particularly while making sure they test the same obscure assert from many years ago), or depend on a particular CFG shape, which is disrupted by SimplifyCFG. rdar://problem/16227836 llvm-svn: 209883
2014-05-30 10:09:59 +00:00
; RUN: llc -mcpu=cortex-a8 -mattr=-neonfp -arm-atomic-cfg-tidy=0 < %s | FileCheck %s
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
2009-11-14 02:55:43 +00:00
; PR5423
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "armv7-eabi"
define arm_aapcs_vfpcc void @foo() {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 21:17:42 +00:00
%0 = load float, float* null, align 4 ; <float> [#uses=2]
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
%1 = fmul float %0, undef ; <float> [#uses=2]
%2 = fmul float 0.000000e+00, %1 ; <float> [#uses=2]
%3 = fmul float %0, %1 ; <float> [#uses=1]
%4 = fadd float 0.000000e+00, %3 ; <float> [#uses=1]
%5 = fsub float 1.000000e+00, %4 ; <float> [#uses=1]
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 06:24:09 +00:00
; CHECK-LABEL: foo:
move fconst[sd] to UAL. <rdar://7414913> llvm-svn: 89700
2009-11-23 21:08:25 +00:00
; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
%6 = fsub float 1.000000e+00, undef ; <float> [#uses=2]
%7 = fsub float %2, undef ; <float> [#uses=1]
%8 = fsub float 0.000000e+00, undef ; <float> [#uses=3]
%9 = fadd float %2, undef ; <float> [#uses=3]
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 21:17:42 +00:00
%10 = load float, float* undef, align 8 ; <float> [#uses=3]
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
%11 = fmul float %8, %10 ; <float> [#uses=1]
%12 = fadd float undef, %11 ; <float> [#uses=2]
%13 = fmul float undef, undef ; <float> [#uses=1]
%14 = fmul float %6, 0.000000e+00 ; <float> [#uses=1]
%15 = fadd float %13, %14 ; <float> [#uses=1]
%16 = fmul float %9, %10 ; <float> [#uses=1]
%17 = fadd float %15, %16 ; <float> [#uses=2]
%18 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
%19 = fadd float %18, 0.000000e+00 ; <float> [#uses=1]
%20 = fmul float undef, %10 ; <float> [#uses=1]
%21 = fadd float %19, %20 ; <float> [#uses=1]
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 21:17:42 +00:00
%22 = load float, float* undef, align 8 ; <float> [#uses=1]
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
%23 = fmul float %5, %22 ; <float> [#uses=1]
%24 = fadd float %23, undef ; <float> [#uses=1]
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 21:17:42 +00:00
%25 = load float, float* undef, align 8 ; <float> [#uses=2]
Honour subreg machine operands during asmprinting llvm-svn: 86303
2009-11-06 23:45:15 +00:00
%26 = fmul float %8, %25 ; <float> [#uses=1]
%27 = fadd float %24, %26 ; <float> [#uses=1]
%28 = fmul float %9, %25 ; <float> [#uses=1]
%29 = fadd float undef, %28 ; <float> [#uses=1]
%30 = fmul float %8, undef ; <float> [#uses=1]
%31 = fadd float undef, %30 ; <float> [#uses=1]
%32 = fmul float %6, undef ; <float> [#uses=1]
%33 = fadd float undef, %32 ; <float> [#uses=1]
%34 = fmul float %9, undef ; <float> [#uses=1]
%35 = fadd float %33, %34 ; <float> [#uses=1]
%36 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
%37 = fmul float %7, undef ; <float> [#uses=1]
%38 = fadd float %36, %37 ; <float> [#uses=1]
%39 = fmul float undef, undef ; <float> [#uses=1]
%40 = fadd float %38, %39 ; <float> [#uses=1]
store float %12, float* undef, align 8
store float %17, float* undef, align 4
store float %21, float* undef, align 8
store float %27, float* undef, align 8
store float %29, float* undef, align 4
store float %31, float* undef, align 8
store float %40, float* undef, align 8
store float %12, float* null, align 8
%41 = fmul float %17, undef ; <float> [#uses=1]
%42 = fadd float %41, undef ; <float> [#uses=1]
%43 = fmul float %35, undef ; <float> [#uses=1]
%44 = fadd float %42, %43 ; <float> [#uses=1]
store float %44, float* null, align 4
unreachable
}
Reference in New Issue Copy Permalink