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[AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null

Browse Source 
See AMD SWDEV-157286

Reviewers: atamazov, arsenm

Differential Revision: https://reviews.llvm.org/D65229

llvm-svn: 370665
This commit is contained in:
Dmitry Preobrazhensky 2019-09-02 14:19:52 +00:00
parent f7825f2b74
commit 011ce9a859
2 changed files with 12 additions and 3 deletions
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9
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -2657,7 +2657,6 @@ unsigned AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const {
case AMDGPU::VCC_LO:
case AMDGPU::VCC_HI:
case AMDGPU::M0:
case AMDGPU::SGPR_NULL:
return Reg;
default:
break;
@ -2731,9 +2730,13 @@ bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) {
const MCOperand &MO = Inst.getOperand(OpIdx);
if (MO.isImm()) {
return !isInlineConstant(Inst, OpIdx);
} else if (MO.isReg()) {
auto Reg = MO.getReg();
const MCRegisterInfo *TRI = getContext().getRegisterInfo();
return isSGPR(mc2PseudoReg(Reg), TRI) && Reg != SGPR_NULL;
} else {
return true;
}
return !MO.isReg() ||
isSGPR(mc2PseudoReg(MO.getReg()), getContext().getRegisterInfo());
}
bool AMDGPUAsmParser::validateConstantBusLimitations(const MCInst &Inst) {

6
test/MC/AMDGPU/gfx10-constant-bus.s
View File

@ -55,3 +55,9 @@ v_mad_u64_u32 v[5:6], s12, v1, 0x12345678, 0x12345678
v_mad_u64_u32 v[5:6], s12, s1, 0x12345678, 0x12345678
// GFX10-ERR: error: invalid operand (violates constant bus restrictions)
//-----------------------------------------------------------------------------------------
// null is free
v_bfe_u32 v5, s1, s2, null
// GFX10: v_bfe_u32 v5, s1, s2, null ; encoding: [0x05,0x00,0x48,0xd5,0x01,0x04,0xf4,0x01]