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XOR32rr, etc. are not AsCheapAsMove, but MOV32ri, etc. are.
llvm-svn: 52454
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bb59138fa6
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@ -578,7 +578,7 @@ def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
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def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
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"mov{l}\t{$src, $dst|$dst, $src}", []>;
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}
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let isReMaterializable = 1 in {
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
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def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
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"mov{b}\t{$src, $dst|$dst, $src}",
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[(set GR8:$dst, imm:$src)]>;
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@ -1312,8 +1312,7 @@ let isTwoAddress = 0 in {
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} // isTwoAddress = 0
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let isAsCheapAsAMove = 1,
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isCommutable = 1 in { // X = XOR Y, Z --> X = XOR Z, Y
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let isCommutable = 1 in { // X = XOR Y, Z --> X = XOR Z, Y
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def XOR8rr : I<0x30, MRMDestReg,
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(outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2),
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"xor{b}\t{$src2, $dst|$dst, $src2}",
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@ -1326,7 +1325,7 @@ let isAsCheapAsAMove = 1,
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(outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
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"xor{l}\t{$src2, $dst|$dst, $src2}",
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[(set GR32:$dst, (xor GR32:$src1, GR32:$src2))]>;
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} // isAsCheapAsAMove = 1, isCommutable = 1
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} // isCommutable = 1
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def XOR8rm : I<0x32, MRMSrcMem ,
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(outs GR8 :$dst), (ins GR8:$src1, i8mem :$src2),
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