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Fix some JIT encodings.

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llvm-svn: 61425
This commit is contained in:
Chris Lattner 2008-12-25 01:32:49 +00:00
parent f34b843728
commit 062ed6e3dd
2 changed files with 10 additions and 10 deletions
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8
lib/Target/X86/X86Instr64bit.td
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@ -921,14 +921,14 @@ def CMP64mi32 : RIi32<0x81, MRM7m, (outs),
// TODO: BT with immediate operands. // TODO: BT with immediate operands.
// TODO: BTC, BTR, and BTS // TODO: BTC, BTR, and BTS
let Defs = [EFLAGS] in { let Defs = [EFLAGS] in {
def BT64rr : RI<0xA3, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2), def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
"bt{q}\t{$src2, $src1|$src1, $src2}", "bt{q}\t{$src2, $src1|$src1, $src2}",
[(X86bt GR64:$src1, GR64:$src2), [(X86bt GR64:$src1, GR64:$src2),
(implicit EFLAGS)]>; (implicit EFLAGS)]>, TB;
def BT64mr : RI<0xA3, MRMSrcMem, (outs), (ins i64mem:$src1, GR64:$src2), def BT64mr : RI<0xA3, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2),
"bt{q}\t{$src2, $src1|$src1, $src2}", "bt{q}\t{$src2, $src1|$src1, $src2}",
[(X86bt (loadi64 addr:$src1), GR64:$src2), [(X86bt (loadi64 addr:$src1), GR64:$src2),
(implicit EFLAGS)]>; (implicit EFLAGS)]>, TB;
} // Defs = [EFLAGS] } // Defs = [EFLAGS]
// Conditional moves // Conditional moves

12
lib/Target/X86/X86InstrInfo.td
View File

@ -2658,19 +2658,19 @@ let Defs = [EFLAGS] in {
def BT16rr : I<0xA3, MRMSrcReg, (outs), (ins GR16:$src1, GR16:$src2), def BT16rr : I<0xA3, MRMSrcReg, (outs), (ins GR16:$src1, GR16:$src2),
"bt{w}\t{$src2, $src1|$src1, $src2}", "bt{w}\t{$src2, $src1|$src1, $src2}",
[(X86bt GR16:$src1, GR16:$src2), [(X86bt GR16:$src1, GR16:$src2),
(implicit EFLAGS)]>, OpSize; (implicit EFLAGS)]>, OpSize, TB;
def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2), def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2),
"bt{l}\t{$src2, $src1|$src1, $src2}", "bt{l}\t{$src2, $src1|$src1, $src2}",
[(X86bt GR32:$src1, GR32:$src2), [(X86bt GR32:$src1, GR32:$src2),
(implicit EFLAGS)]>; (implicit EFLAGS)]>, TB;
def BT16mr : I<0xA3, MRMSrcMem, (outs), (ins i16mem:$src1, GR16:$src2), def BT16mr : I<0xA3, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2),
"bt{w}\t{$src2, $src1|$src1, $src2}", "bt{w}\t{$src2, $src1|$src1, $src2}",
[(X86bt (loadi16 addr:$src1), GR16:$src2), [(X86bt (loadi16 addr:$src1), GR16:$src2),
(implicit EFLAGS)]>, OpSize; (implicit EFLAGS)]>, OpSize, TB;
def BT32mr : I<0xA3, MRMSrcMem, (outs), (ins i32mem:$src1, GR32:$src2), def BT32mr : I<0xA3, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2),
"bt{l}\t{$src2, $src1|$src1, $src2}", "bt{l}\t{$src2, $src1|$src1, $src2}",
[(X86bt (loadi32 addr:$src1), GR32:$src2), [(X86bt (loadi32 addr:$src1), GR32:$src2),
(implicit EFLAGS)]>; (implicit EFLAGS)]>, TB;
} // Defs = [EFLAGS] } // Defs = [EFLAGS]
// Sign/Zero extenders // Sign/Zero extenders