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Handle implicit_defs in the register coalescer. I am still trying to produce
a reduced testcase, but this fixes pr13209. llvm-svn: 159479
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@ -1172,14 +1172,11 @@ static bool RegistersDefinedFromSameValue(LiveIntervals &li,
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MachineInstr *MI = li.getInstructionFromIndex(VNI->def);
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if (!MI || !MI->isFullCopy() || CP.isPartial() || CP.isPhys())
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if (!MI || CP.isPartial() || CP.isPhys())
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return false;
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unsigned Dst = MI->getOperand(0).getReg();
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unsigned Src = MI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(Src) ||
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!TargetRegisterInfo::isVirtualRegister(Dst))
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if (!TargetRegisterInfo::isVirtualRegister(Dst))
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return false;
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unsigned A = CP.getDstReg();
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@ -1189,34 +1186,47 @@ static bool RegistersDefinedFromSameValue(LiveIntervals &li,
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std::swap(A, B);
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assert(Dst == A);
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const MachineInstr *OtherMI = li.getInstructionFromIndex(OtherVNI->def);
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MachineInstr *OtherMI = li.getInstructionFromIndex(OtherVNI->def);
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if (!OtherMI || !OtherMI->isFullCopy())
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if (!OtherMI)
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return false;
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unsigned OtherDst = OtherMI->getOperand(0).getReg();
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unsigned OtherSrc = OtherMI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(OtherSrc) ||
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!TargetRegisterInfo::isVirtualRegister(OtherDst))
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if (!TargetRegisterInfo::isVirtualRegister(OtherDst))
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return false;
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assert(OtherDst == B);
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if (Src != OtherSrc)
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return false;
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if (MI->isImplicitDef()) {
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DupCopies.push_back(MI);
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return true;
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} else {
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if (!MI->isFullCopy())
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return false;
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unsigned Src = MI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(Src))
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return false;
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if (!OtherMI->isFullCopy())
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return false;
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unsigned OtherSrc = OtherMI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(OtherSrc))
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return false;
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// If the copies use two different value numbers of X, we cannot merge
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// A and B.
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LiveInterval &SrcInt = li.getInterval(Src);
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// getVNInfoBefore returns NULL for undef copies. In this case, the
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// optimization is still safe.
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if (SrcInt.getVNInfoBefore(OtherVNI->def) != SrcInt.getVNInfoBefore(VNI->def))
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return false;
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if (Src != OtherSrc)
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return false;
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DupCopies.push_back(MI);
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// If the copies use two different value numbers of X, we cannot merge
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// A and B.
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LiveInterval &SrcInt = li.getInterval(Src);
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// getVNInfoBefore returns NULL for undef copies. In this case, the
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// optimization is still safe.
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if (SrcInt.getVNInfoBefore(OtherVNI->def) !=
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SrcInt.getVNInfoBefore(VNI->def))
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return false;
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return true;
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DupCopies.push_back(MI);
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return true;
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}
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}
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/// joinIntervals - Attempt to join these two intervals. On failure, this
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@ -1254,7 +1264,7 @@ bool RegisterCoalescer::joinIntervals(CoalescerPair &CP) {
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continue;
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MachineInstr *MI = LIS->getInstructionFromIndex(VNI->def);
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assert(MI && "Missing def");
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if (!MI->isCopyLike()) // Src not defined by a copy?
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if (!MI->isCopyLike() && !MI->isImplicitDef()) // Src not defined by a copy?
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continue;
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// Figure out the value # from the RHS.
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@ -1283,7 +1293,7 @@ bool RegisterCoalescer::joinIntervals(CoalescerPair &CP) {
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continue;
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MachineInstr *MI = LIS->getInstructionFromIndex(VNI->def);
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assert(MI && "Missing def");
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if (!MI->isCopyLike()) // Src not defined by a copy?
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if (!MI->isCopyLike() && !MI->isImplicitDef()) // Src not defined by a copy?
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continue;
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// Figure out the value # from the LHS.
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@ -1429,14 +1439,17 @@ bool RegisterCoalescer::joinIntervals(CoalescerPair &CP) {
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if (!ErasedInstrs.insert(MI))
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continue;
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// We have pretended that the assignment to B in
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// If MI is a copy, then we have pretended that the assignment to B in
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// A = X
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// B = X
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// was actually a copy from A. Now that we decided to coalesce A and B,
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// transform the code into
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// A = X
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unsigned Src = MI->getOperand(1).getReg();
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SourceRegisters.push_back(Src);
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// In the case of the implicit_def, we just have to remove it.
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if (!MI->isImplicitDef()) {
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unsigned Src = MI->getOperand(1).getReg();
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SourceRegisters.push_back(Src);
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}
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LIS->RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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}
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