RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-27 06:54:30 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

CellSPU:

Browse Source 
- Add an 8-bit operation test, which doesn't do much at this point.

llvm-svn: 61665
This commit is contained in:
Scott Michel 2009-01-05 01:35:22 +00:00
parent 0d9d939406
commit 06c324c6c7
1 changed files with 25 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
test/CodeGen/CellSPU/i8ops.ll Normal file
View File

@ -0,0 +1,25 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
; ModuleID = 'i8ops.bc'
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
define i8 @add_i8(i8 %a, i8 %b) nounwind {
%1 = add i8 %a, %b
ret i8 %1
}
define i8 @add_i8_imm(i8 %a, i8 %b) nounwind {
%1 = add i8 %a, 15
ret i8 %1
}
define i8 @sub_i8(i8 %a, i8 %b) nounwind {
%1 = sub i8 %a, %b
ret i8 %1
}
define i8 @sub_i8_imm(i8 %a, i8 %b) nounwind {
%1 = sub i8 %a, 15
ret i8 %1
}