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Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
Don't try to generate large PIC code for non-ELF targets. Neither COFF nor MachO have relocations for large position independent code, and users have been using "large PIC" code models to JIT 64-bit code for a while now. With this change, if they are generating ELF code, their JITed code will truly be PIC, but if they target MachO or COFF, it will contain 64-bit immediates that directly reference external symbols. For a JIT, that's perfectly fine. llvm-svn: 337740
This commit is contained in:
Reid Kleckner
parent
c79a134b78
commit
0a9a1968f9
@ -991,11 +991,13 @@ bool X86DAGToDAGISel::matchWrapper(SDValue N, X86ISelAddressMode &AM) {
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bool IsRIPRel = N.getOpcode() == X86ISD::WrapperRIP;
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// Only do this address mode folding for 64-bit if we're in the small code
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// model.
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// FIXME: But we can do GOTPCREL addressing in the medium code model.
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// We can't use an addressing mode in the 64-bit large code model. In the
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// medium code model, we use can use an mode when RIP wrappers are present.
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// That signifies access to globals that are known to be "near", such as the
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// GOT itself.
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CodeModel::Model M = TM.getCodeModel();
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if (Subtarget->is64Bit() && M != CodeModel::Small && M != CodeModel::Kernel)
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if (Subtarget->is64Bit() &&
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(M == CodeModel::Large || (M == CodeModel::Medium && !IsRIPRel)))
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return true;
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// Base and index reg must be 0 in order to use %rip as base.
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@ -37,6 +37,10 @@ let hasSideEffects = 0, isNotDuplicable = 1, Uses = [ESP, SSP],
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def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
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"", []>;
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// 64-bit large code model PIC base construction.
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let hasSideEffects = 0, mayLoad = 1, isNotDuplicable = 1, SchedRW = [WriteJump] in
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def MOVGOT64r : PseudoI<(outs GR64:$reg),
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(ins GR64:$scratch, i64i32imm_pcrel:$got), []>;
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// ADJCALLSTACKDOWN/UP implicitly use/def ESP because they may be expanded into
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// a stack adjustment and the codegen must know that they may modify the stack
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@ -5851,7 +5851,9 @@ isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
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/// TODO: Eliminate this and move the code to X86MachineFunctionInfo.
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///
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unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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assert(!Subtarget.is64Bit() &&
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assert((!Subtarget.is64Bit() ||
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MF->getTarget().getCodeModel() == CodeModel::Medium ||
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MF->getTarget().getCodeModel() == CodeModel::Large) &&
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"X86-64 PIC uses RIP relative addressing");
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X86MachineFunctionInfo *X86FI = MF->getInfo<X86MachineFunctionInfo>();
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@ -5862,7 +5864,8 @@ unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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// Create the register. The code to initialize it is inserted
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// later, by the CGBR pass (below).
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MachineRegisterInfo &RegInfo = MF->getRegInfo();
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GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);
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GlobalBaseReg = RegInfo.createVirtualRegister(
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Subtarget.is64Bit() ? &X86::GR64_NOSPRegClass : &X86::GR32_NOSPRegClass);
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X86FI->setGlobalBaseReg(GlobalBaseReg);
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return GlobalBaseReg;
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}
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@ -7321,9 +7324,10 @@ namespace {
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static_cast<const X86TargetMachine *>(&MF.getTarget());
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const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
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// Don't do anything if this is 64-bit as 64-bit PIC
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// uses RIP relative addressing.
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if (STI.is64Bit())
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// Don't do anything in the 64-bit small and kernel code models. They use
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// RIP-relative addressing for everything.
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if (STI.is64Bit() && (TM->getCodeModel() == CodeModel::Small ||
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TM->getCodeModel() == CodeModel::Kernel))
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return false;
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// Only emit a global base reg in PIC mode.
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@ -7350,18 +7354,42 @@ namespace {
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else
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PC = GlobalBaseReg;
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if (STI.is64Bit()) {
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if (TM->getCodeModel() == CodeModel::Medium) {
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// In the medium code model, use a RIP-relative LEA to materialize the
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// GOT.
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BuildMI(FirstMBB, MBBI, DL, TII->get(X86::LEA64r), PC)
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.addReg(X86::RIP)
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.addImm(0)
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.addReg(0)
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.addExternalSymbol("_GLOBAL_OFFSET_TABLE_")
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.addReg(0);
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} else if (TM->getCodeModel() == CodeModel::Large) {
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// Loading the GOT in the large code model requires math with labels,
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// so we use a pseudo instruction and expand it during MC emission.
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unsigned Scratch = RegInfo.createVirtualRegister(&X86::GR64RegClass);
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BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVGOT64r), PC)
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.addReg(Scratch, RegState::Undef | RegState::Define)
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.addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
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} else {
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llvm_unreachable("unexpected code model");
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}
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} else {
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// Operand of MovePCtoStack is completely ignored by asm printer. It's
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// only used in JIT code emission as displacement to pc.
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BuildMI(FirstMBB, MBBI, DL, TII->get(X86::MOVPC32r), PC).addImm(0);
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// If we're using vanilla 'GOT' PIC style, we should use relative addressing
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// not to pc, but to _GLOBAL_OFFSET_TABLE_ external.
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// If we're using vanilla 'GOT' PIC style, we should use relative
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// addressing not to pc, but to _GLOBAL_OFFSET_TABLE_ external.
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if (STI.isPICStyleGOT()) {
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// Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel], %some_register
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// Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel],
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// %some_register
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BuildMI(FirstMBB, MBBI, DL, TII->get(X86::ADD32ri), GlobalBaseReg)
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.addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_",
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.addReg(PC)
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.addExternalSymbol("_GLOBAL_OFFSET_TABLE_",
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X86II::MO_GOT_ABSOLUTE_ADDRESS);
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}
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}
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return true;
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}
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@ -1720,6 +1720,41 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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case X86::MOVGOT64r: {
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// Materializes the GOT for the 64-bit large code model.
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MCSymbol *DotSym = OutContext.createTempSymbol();
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OutStreamer->EmitLabel(DotSym);
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unsigned DstReg = MI->getOperand(0).getReg();
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unsigned ScratchReg = MI->getOperand(1).getReg();
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MCSymbol *GOTSym = MCInstLowering.GetSymbolFromOperand(MI->getOperand(2));
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// .LtmpN: leaq .LtmpN(%rip), %dst
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const MCExpr *DotExpr = MCSymbolRefExpr::create(DotSym, OutContext);
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EmitAndCountInstruction(MCInstBuilder(X86::LEA64r)
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.addReg(DstReg) // dest
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.addReg(X86::RIP) // base
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.addImm(1) // scale
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.addReg(0) // index
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.addExpr(DotExpr) // disp
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.addReg(0)); // seg
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// movq $_GLOBAL_OFFSET_TABLE_ - .LtmpN, %scratch
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const MCExpr *GOTSymExpr = MCSymbolRefExpr::create(GOTSym, OutContext);
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const MCExpr *GOTDiffExpr =
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MCBinaryExpr::createSub(GOTSymExpr, DotExpr, OutContext);
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EmitAndCountInstruction(MCInstBuilder(X86::MOV64ri)
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.addReg(ScratchReg) // dest
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.addExpr(GOTDiffExpr)); // disp
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// addq %scratch, %dst
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EmitAndCountInstruction(MCInstBuilder(X86::ADD64rr)
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.addReg(DstReg) // dest
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.addReg(DstReg) // dest
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.addReg(ScratchReg)); // src
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return;
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}
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case X86::ADD32ri: {
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// Lower the MO_GOT_ABSOLUTE_ADDRESS form of ADD32ri.
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if (MI->getOperand(2).getTargetFlags() != X86II::MO_GOT_ABSOLUTE_ADDRESS)
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@ -68,15 +68,37 @@ X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
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unsigned char
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X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
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// 64 bits can use %rip addressing for anything local.
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if (is64Bit())
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return X86II::MO_NO_FLAG;
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// If this is for a position dependent executable, the static linker can
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// figure it out.
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// If we're not PIC, it's not very interesting.
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if (!isPositionIndependent())
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return X86II::MO_NO_FLAG;
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if (is64Bit()) {
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// 64-bit ELF PIC local references may use GOTOFF relocations.
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if (isTargetELF()) {
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switch (TM.getCodeModel()) {
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// 64-bit small code model is simple: All rip-relative.
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case CodeModel::Small:
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case CodeModel::Kernel:
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return X86II::MO_NO_FLAG;
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// The large PIC code model uses GOTOFF.
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case CodeModel::Large:
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return X86II::MO_GOTOFF;
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// Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.
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case CodeModel::Medium:
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if (isa<Function>(GV))
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return X86II::MO_NO_FLAG; // All code is RIP-relative
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return X86II::MO_GOTOFF; // Local symbols use GOTOFF.
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}
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llvm_unreachable("invalid code model");
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}
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// Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
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// both of which use MO_NO_FLAG.
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return X86II::MO_NO_FLAG;
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}
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// The COFF dynamic linker just patches the executable sections.
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if (isTargetCOFF())
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return X86II::MO_NO_FLAG;
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@ -97,8 +119,8 @@ X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
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unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
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const Module &M) const {
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// Large model never uses stubs.
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if (TM.getCodeModel() == CodeModel::Large)
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// The static large model never uses stubs.
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if (TM.getCodeModel() == CodeModel::Large && !isPositionIndependent())
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return X86II::MO_NO_FLAG;
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// Absolute symbols can be referenced directly.
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@ -120,8 +142,14 @@ unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
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if (isTargetCOFF())
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return X86II::MO_DLLIMPORT;
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if (is64Bit())
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if (is64Bit()) {
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// ELF supports a large, truly PIC code model with non-PC relative GOT
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// references. Other object file formats do not. Use the no-flag, 64-bit
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// reference for them.
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if (TM.getCodeModel() == CodeModel::Large)
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return isTargetELF() ? X86II::MO_GOT : X86II::MO_NO_FLAG;
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return X86II::MO_GOTPCREL;
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}
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if (isTargetDarwin()) {
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if (!isPositionIndependent())
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@ -160,9 +160,15 @@ static std::string computeDataLayout(const Triple &TT) {
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}
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static Reloc::Model getEffectiveRelocModel(const Triple &TT,
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bool JIT,
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Optional<Reloc::Model> RM) {
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bool is64Bit = TT.getArch() == Triple::x86_64;
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if (!RM.hasValue()) {
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// JIT codegen should use static relocations by default, since it's
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// typically executed in process and not relocatable.
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if (JIT)
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return Reloc::Static;
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// Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
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// Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
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// use static relocation model by default.
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@ -214,7 +220,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT,
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CodeGenOpt::Level OL, bool JIT)
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: LLVMTargetMachine(
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T, computeDataLayout(TT), TT, CPU, FS, Options,
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getEffectiveRelocModel(TT, RM),
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getEffectiveRelocModel(TT, JIT, RM),
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getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),
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TLOF(createTLOF(getTargetTriple())) {
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// Windows stack unwinder gets confused when execution flow "falls through"
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@ -1,4 +1,4 @@
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; RUN: llc -mtriple=x86_64-pc-windows-msvc -code-model=large -o - < %s | FileCheck %s
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; RUN: llc -mtriple=x86_64-pc-windows-msvc -code-model=large -relocation-model=static -o - < %s | FileCheck %s
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declare i32 @__CxxFrameHandler3(...)
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384
test/CodeGen/X86/code-model-elf.ll
Normal file
384
test/CodeGen/X86/code-model-elf.ll
Normal file
@ -0,0 +1,384 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Run with --no_x86_scrub_rip because we care a lot about how globals are
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; accessed in the code model.
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; RUN: llc < %s -relocation-model=static -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-STATIC
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; RUN: llc < %s -relocation-model=static -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-STATIC
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; RUN: llc < %s -relocation-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC
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; RUN: llc < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-PIC
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; RUN: llc < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-PIC
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; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC
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; Generated from this C source:
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;
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; static int static_data[10];
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; int global_data[10] = {1, 2};
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; extern int extern_data[10];
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;
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; int *lea_static_data() { return &static_data[0]; }
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; int *lea_global_data() { return &global_data[0]; }
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; int *lea_extern_data() { return &extern_data[0]; }
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;
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; static void static_fn(void) {}
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; void global_fn(void) {}
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; void extern_fn(void);
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;
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; typedef void (*void_fn)(void);
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; void_fn lea_static_fn() { return &static_fn; }
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; void_fn lea_global_fn() { return &global_fn; }
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; void_fn lea_extern_fn() { return &extern_fn; }
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; ModuleID = 'model.c'
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source_filename = "model.c"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64--linux"
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@global_data = dso_local global [10 x i32] [i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0], align 16
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@static_data = internal global [10 x i32] zeroinitializer, align 16
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@extern_data = external global [10 x i32], align 16
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define dso_local i32* @lea_static_data() #0 {
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; SMALL-STATIC-LABEL: lea_static_data:
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; SMALL-STATIC: # %bb.0:
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; SMALL-STATIC-NEXT: movl $static_data, %eax
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; SMALL-STATIC-NEXT: retq
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;
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; MEDIUM-STATIC-LABEL: lea_static_data:
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; MEDIUM-STATIC: # %bb.0:
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; MEDIUM-STATIC-NEXT: movabsq $static_data, %rax
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; MEDIUM-STATIC-NEXT: retq
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;
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; LARGE-STATIC-LABEL: lea_static_data:
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; LARGE-STATIC: # %bb.0:
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; LARGE-STATIC-NEXT: movabsq $static_data, %rax
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; LARGE-STATIC-NEXT: retq
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;
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; SMALL-PIC-LABEL: lea_static_data:
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; SMALL-PIC: # %bb.0:
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; SMALL-PIC-NEXT: leaq static_data(%rip), %rax
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; SMALL-PIC-NEXT: retq
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;
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; MEDIUM-PIC-LABEL: lea_static_data:
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; MEDIUM-PIC: # %bb.0:
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; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
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; MEDIUM-PIC-NEXT: movabsq $static_data@GOTOFF, %rax
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; MEDIUM-PIC-NEXT: addq %rcx, %rax
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; MEDIUM-PIC-NEXT: retq
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;
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; LARGE-PIC-LABEL: lea_static_data:
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; LARGE-PIC: # %bb.0:
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; LARGE-PIC-NEXT: .Ltmp0:
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; LARGE-PIC-NEXT: leaq .Ltmp0(%rip), %rcx
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; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp0, %rax
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; LARGE-PIC-NEXT: addq %rax, %rcx
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; LARGE-PIC-NEXT: movabsq $static_data@GOTOFF, %rax
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; LARGE-PIC-NEXT: addq %rcx, %rax
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; LARGE-PIC-NEXT: retq
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ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @static_data, i64 0, i64 0)
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}
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define dso_local i32* @lea_global_data() #0 {
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; SMALL-STATIC-LABEL: lea_global_data:
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; SMALL-STATIC: # %bb.0:
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; SMALL-STATIC-NEXT: movl $global_data, %eax
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; SMALL-STATIC-NEXT: retq
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;
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; MEDIUM-STATIC-LABEL: lea_global_data:
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; MEDIUM-STATIC: # %bb.0:
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; MEDIUM-STATIC-NEXT: movabsq $global_data, %rax
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; MEDIUM-STATIC-NEXT: retq
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;
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; LARGE-STATIC-LABEL: lea_global_data:
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; LARGE-STATIC: # %bb.0:
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; LARGE-STATIC-NEXT: movabsq $global_data, %rax
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; LARGE-STATIC-NEXT: retq
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;
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; SMALL-PIC-LABEL: lea_global_data:
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; SMALL-PIC: # %bb.0:
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; SMALL-PIC-NEXT: leaq global_data(%rip), %rax
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; SMALL-PIC-NEXT: retq
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;
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; MEDIUM-PIC-LABEL: lea_global_data:
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; MEDIUM-PIC: # %bb.0:
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; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
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; MEDIUM-PIC-NEXT: movabsq $global_data@GOTOFF, %rax
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; MEDIUM-PIC-NEXT: addq %rcx, %rax
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; MEDIUM-PIC-NEXT: retq
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;
|
||||
; LARGE-PIC-LABEL: lea_global_data:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp1:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp1(%rip), %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp1, %rax
|
||||
; LARGE-PIC-NEXT: addq %rax, %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $global_data@GOTOFF, %rax
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @global_data, i64 0, i64 0)
|
||||
}
|
||||
|
||||
define dso_local i32* @lea_extern_data() #0 {
|
||||
; SMALL-STATIC-LABEL: lea_extern_data:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl $extern_data, %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: lea_extern_data:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $extern_data, %rax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: lea_extern_data:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $extern_data, %rax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: lea_extern_data:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: lea_extern_data:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: lea_extern_data:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp2:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp2(%rip), %rax
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp2, %rcx
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: movabsq $extern_data@GOT, %rcx
|
||||
; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
ret i32* getelementptr inbounds ([10 x i32], [10 x i32]* @extern_data, i64 0, i64 0)
|
||||
}
|
||||
|
||||
define dso_local i32 @load_global_data() #0 {
|
||||
; SMALL-STATIC-LABEL: load_global_data:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl global_data+8(%rip), %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: load_global_data:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $global_data, %rax
|
||||
; MEDIUM-STATIC-NEXT: movl 8(%rax), %eax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: load_global_data:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $global_data, %rax
|
||||
; LARGE-STATIC-NEXT: movl 8(%rax), %eax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: load_global_data:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: movl global_data+8(%rip), %eax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: load_global_data:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
|
||||
; MEDIUM-PIC-NEXT: movabsq $global_data@GOTOFF, %rcx
|
||||
; MEDIUM-PIC-NEXT: movl 8(%rax,%rcx), %eax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: load_global_data:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp3:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp3(%rip), %rax
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp3, %rcx
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: movabsq $global_data@GOTOFF, %rcx
|
||||
; LARGE-PIC-NEXT: movl 8(%rax,%rcx), %eax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
%rv = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @global_data, i64 0, i64 2)
|
||||
ret i32 %rv
|
||||
}
|
||||
|
||||
define dso_local i32 @load_extern_data() #0 {
|
||||
; SMALL-STATIC-LABEL: load_extern_data:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl extern_data+8(%rip), %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: load_extern_data:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $extern_data, %rax
|
||||
; MEDIUM-STATIC-NEXT: movl 8(%rax), %eax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: load_extern_data:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $extern_data, %rax
|
||||
; LARGE-STATIC-NEXT: movl 8(%rax), %eax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: load_extern_data:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax
|
||||
; SMALL-PIC-NEXT: movl 8(%rax), %eax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: load_extern_data:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: movq extern_data@GOTPCREL(%rip), %rax
|
||||
; MEDIUM-PIC-NEXT: movl 8(%rax), %eax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: load_extern_data:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp4:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp4(%rip), %rax
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp4, %rcx
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: movabsq $extern_data@GOT, %rcx
|
||||
; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax
|
||||
; LARGE-PIC-NEXT: movl 8(%rax), %eax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
%rv = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @extern_data, i64 0, i64 2)
|
||||
ret i32 %rv
|
||||
}
|
||||
|
||||
define dso_local void @global_fn() #0 {
|
||||
; CHECK-LABEL: global_fn:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: retq
|
||||
ret void
|
||||
}
|
||||
|
||||
define internal void @static_fn() #0 {
|
||||
; CHECK-LABEL: static_fn:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: retq
|
||||
ret void
|
||||
}
|
||||
|
||||
declare void @extern_fn()
|
||||
|
||||
define dso_local void ()* @lea_static_fn() #0 {
|
||||
; SMALL-STATIC-LABEL: lea_static_fn:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl $static_fn, %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: lea_static_fn:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $static_fn, %rax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: lea_static_fn:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $static_fn, %rax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: lea_static_fn:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: leaq static_fn(%rip), %rax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: lea_static_fn:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: movabsq $static_fn, %rax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: lea_static_fn:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp5:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp5(%rip), %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp5, %rax
|
||||
; LARGE-PIC-NEXT: addq %rax, %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $static_fn@GOTOFF, %rax
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
ret void ()* @static_fn
|
||||
}
|
||||
|
||||
define dso_local void ()* @lea_global_fn() #0 {
|
||||
; SMALL-STATIC-LABEL: lea_global_fn:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl $global_fn, %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: lea_global_fn:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $global_fn, %rax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: lea_global_fn:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $global_fn, %rax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: lea_global_fn:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: leaq global_fn(%rip), %rax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: lea_global_fn:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: movabsq $global_fn, %rax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: lea_global_fn:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp6:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp6(%rip), %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp6, %rax
|
||||
; LARGE-PIC-NEXT: addq %rax, %rcx
|
||||
; LARGE-PIC-NEXT: movabsq $global_fn@GOTOFF, %rax
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
ret void ()* @global_fn
|
||||
}
|
||||
|
||||
define dso_local void ()* @lea_extern_fn() #0 {
|
||||
; SMALL-STATIC-LABEL: lea_extern_fn:
|
||||
; SMALL-STATIC: # %bb.0:
|
||||
; SMALL-STATIC-NEXT: movl $extern_fn, %eax
|
||||
; SMALL-STATIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-STATIC-LABEL: lea_extern_fn:
|
||||
; MEDIUM-STATIC: # %bb.0:
|
||||
; MEDIUM-STATIC-NEXT: movabsq $extern_fn, %rax
|
||||
; MEDIUM-STATIC-NEXT: retq
|
||||
;
|
||||
; LARGE-STATIC-LABEL: lea_extern_fn:
|
||||
; LARGE-STATIC: # %bb.0:
|
||||
; LARGE-STATIC-NEXT: movabsq $extern_fn, %rax
|
||||
; LARGE-STATIC-NEXT: retq
|
||||
;
|
||||
; SMALL-PIC-LABEL: lea_extern_fn:
|
||||
; SMALL-PIC: # %bb.0:
|
||||
; SMALL-PIC-NEXT: movq extern_fn@GOTPCREL(%rip), %rax
|
||||
; SMALL-PIC-NEXT: retq
|
||||
;
|
||||
; MEDIUM-PIC-LABEL: lea_extern_fn:
|
||||
; MEDIUM-PIC: # %bb.0:
|
||||
; MEDIUM-PIC-NEXT: movq extern_fn@GOTPCREL(%rip), %rax
|
||||
; MEDIUM-PIC-NEXT: retq
|
||||
;
|
||||
; LARGE-PIC-LABEL: lea_extern_fn:
|
||||
; LARGE-PIC: # %bb.0:
|
||||
; LARGE-PIC-NEXT: .Ltmp7:
|
||||
; LARGE-PIC-NEXT: leaq .Ltmp7(%rip), %rax
|
||||
; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.Ltmp7, %rcx
|
||||
; LARGE-PIC-NEXT: addq %rcx, %rax
|
||||
; LARGE-PIC-NEXT: movabsq $extern_fn@GOT, %rcx
|
||||
; LARGE-PIC-NEXT: movq (%rax,%rcx), %rax
|
||||
; LARGE-PIC-NEXT: retq
|
||||
ret void ()* @extern_fn
|
||||
}
|
||||
|
||||
attributes #0 = { noinline nounwind uwtable }
|
||||
|
||||
!llvm.module.flags = !{!0, !1, !2}
|
||||
!llvm.ident = !{!3}
|
||||
|
||||
!0 = !{i32 1, !"wchar_size", i32 4}
|
||||
!1 = !{i32 7, !"PIC Level", i32 2}
|
||||
!2 = !{i32 7, !"PIE Level", i32 2}
|
||||
!3 = !{!"clang version 7.0.0 "}
|
||||
@ -1,4 +1,4 @@
|
||||
; RUN: llc -fast-isel-sink-local-values -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-apple-darwin10 -relocation-model=pic < %s | FileCheck %s
|
||||
; RUN: llc -fast-isel-sink-local-values -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-linux -relocation-model=static < %s | FileCheck %s
|
||||
|
||||
; Check that fast-isel cleans up when it fails to lower a call instruction.
|
||||
define void @fastiselcall() {
|
||||
@ -9,7 +9,7 @@ entry:
|
||||
; FastISel's local value code was dead, so it's gone.
|
||||
; CHECK-NOT: movl $42,
|
||||
; SDag-ISel's arg mov:
|
||||
; CHECK: movabsq $_targetfn, %[[REG:[^ ]*]]
|
||||
; CHECK: movabsq $targetfn, %[[REG:[^ ]*]]
|
||||
; CHECK: movl $42, %edi
|
||||
; CHECK: callq *%[[REG]]
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
|
||||
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
|
||||
|
||||
; Check the HiPE calling convention works (x86-64)
|
||||
|
||||
|
||||
@ -1,4 +1,8 @@
|
||||
; RUN: llc < %s -relocation-model=pic -code-model=large
|
||||
; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: foo:
|
||||
; CHECK: movabsq $_xscanf, %[[REG:[^ ]*]]
|
||||
; CHECK: callq *%[[REG]]
|
||||
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
|
||||
target triple = "x86_64-apple-darwin8"
|
||||
|
||||
@ -15,8 +15,14 @@ define void @throwException() {
|
||||
unreachable
|
||||
}
|
||||
|
||||
; Make an internal function so we exercise R_X86_64_GOTOFF64 relocations.
|
||||
define internal dso_local void @use_gotoff() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define i32 @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
|
||||
entry:
|
||||
call void @use_gotoff()
|
||||
invoke void @throwException()
|
||||
to label %try.cont unwind label %lpad
|
||||
|
||||
|
||||
@ -15,8 +15,14 @@ define void @throwException() {
|
||||
unreachable
|
||||
}
|
||||
|
||||
; Make an internal function so we exercise R_X86_64_GOTOFF64 relocations.
|
||||
define internal dso_local void @use_gotoff() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define i32 @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
|
||||
entry:
|
||||
call void @use_gotoff()
|
||||
invoke void @throwException()
|
||||
to label %try.cont unwind label %lpad
|
||||
|
||||
|
||||
@ -110,6 +110,7 @@ def scrub_asm_x86(asm, args):
|
||||
asm = SCRUB_X86_SPILL_RELOAD_RE.sub(r'{{[-0-9]+}}(%\1{{[sb]}}p)\2', asm)
|
||||
# Generically match the stack offset of a memory operand.
|
||||
asm = SCRUB_X86_SP_RE.sub(r'{{[0-9]+}}(%\1)', asm)
|
||||
if getattr(args, 'x86_scrub_rip', False):
|
||||
# Generically match a RIP-relative memory operand.
|
||||
asm = SCRUB_X86_RIP_RE.sub(r'{{.*}}(%rip)', asm)
|
||||
# Generically match a LCP symbol.
|
||||
|
||||
@ -30,6 +30,11 @@ def main():
|
||||
parser.add_argument(
|
||||
'--extra_scrub', action='store_true',
|
||||
help='Always use additional regex to further reduce diffs between various subtargets')
|
||||
parser.add_argument(
|
||||
'--x86_scrub_rip', action='store_true', default=True,
|
||||
help='Use more regex for x86 matching to reduce diffs between various subtargets')
|
||||
parser.add_argument(
|
||||
'--no_x86_scrub_rip', action='store_false', dest='x86_scrub_rip')
|
||||
parser.add_argument('tests', nargs='+')
|
||||
args = parser.parse_args()
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user