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[RISCV] Pass MCSubtargetInfo to print methods.
Summary: This change allows checking for ISA extensions in print methods. Reviewers: asb, niosHD Reviewed By: asb, niosHD Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal Differential Revision: https://reviews.llvm.org/D41503 llvm-svn: 322345
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@ -17,6 +17,7 @@
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -37,8 +38,8 @@ NoAliases("riscv-no-aliases",
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void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot, const MCSubtargetInfo &STI) {
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StringRef Annot, const MCSubtargetInfo &STI) {
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if (NoAliases || !printAliasInstr(MI, O))
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if (NoAliases || !printAliasInstr(MI, STI, O))
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printInstruction(MI, O);
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printInstruction(MI, STI, O);
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printAnnotation(O, Annot);
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printAnnotation(O, Annot);
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}
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}
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@ -47,6 +48,7 @@ void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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}
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}
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void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI,
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raw_ostream &O, const char *Modifier) {
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raw_ostream &O, const char *Modifier) {
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assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
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assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
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const MCOperand &MO = MI->getOperand(OpNo);
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const MCOperand &MO = MI->getOperand(OpNo);
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@ -66,6 +68,7 @@ void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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}
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}
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void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
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void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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raw_ostream &O) {
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unsigned FenceArg = MI->getOperand(OpNo).getImm();
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unsigned FenceArg = MI->getOperand(OpNo).getImm();
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if ((FenceArg & RISCVFenceField::I) != 0)
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if ((FenceArg & RISCVFenceField::I) != 0)
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@ -79,6 +82,7 @@ void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
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}
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}
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void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,
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void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,
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const MCSubtargetInfo &STI,
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raw_ostream &O) {
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raw_ostream &O) {
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auto FRMArg =
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auto FRMArg =
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static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm());
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static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm());
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@ -30,16 +30,21 @@ public:
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const MCSubtargetInfo &STI) override;
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const MCSubtargetInfo &STI) override;
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void printRegName(raw_ostream &O, unsigned RegNo) const override;
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void printRegName(raw_ostream &O, unsigned RegNo) const override;
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
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void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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const char *Modifier = nullptr);
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raw_ostream &O, const char *Modifier = nullptr);
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void printFenceArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printFenceArg(const MCInst *MI, unsigned OpNo,
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void printFRMArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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raw_ostream &O);
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// Autogenerated by tblgen.
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, raw_ostream &O);
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void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
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bool printAliasInstr(const MCInst *MI, raw_ostream &O);
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raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo,
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static const char *getRegisterName(unsigned RegNo,
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unsigned AltIdx = RISCV::ABIRegAltName);
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unsigned AltIdx = RISCV::ABIRegAltName);
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};
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};
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@ -84,7 +84,12 @@ def RISCVAsmParser : AsmParser {
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let AllowDuplicateRegisterNames = 1;
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let AllowDuplicateRegisterNames = 1;
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}
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}
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def RISCVAsmWriter : AsmWriter {
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int PassSubtarget = 1;
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}
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def RISCV : Target {
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def RISCV : Target {
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let InstructionSet = RISCVInstrInfo;
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let InstructionSet = RISCVInstrInfo;
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let AssemblyParsers = [RISCVAsmParser];
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let AssemblyParsers = [RISCVAsmParser];
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let AssemblyWriters = [RISCVAsmWriter];
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}
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}
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117
test/MC/RISCV/csr-aliases.s
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117
test/MC/RISCV/csr-aliases.s
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@ -0,0 +1,117 @@
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
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# RUN: | llvm-objdump -d -mattr=-f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=-f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
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# RUN: | llvm-objdump -d -mattr=+f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
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# RUN: | llvm-objdump -d -mattr=-f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
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# RUN: | llvm-objdump -d -mattr=-f - \
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# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
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# CHECK-INST: csrrs t0, 3, zero
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# CHECK-ALIAS: frcsr t0
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# CHECK-EXT-F: frcsr t0
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# CHECK-EXT-F-OFF: csrr t0, 3
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csrrs t0, 3, zero
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# CHECK-INST: csrrw t1, 3, t2
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# CHECK-ALIAS: fscsr t1, t2
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# CHECK-EXT-F-ON: fscsr t1, t2
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# CHECK-EXT-F-OFF: csrrw t1, 3, t2
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csrrw t1, 3, t2
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# CHECK-INST: csrrw zero, 3, t2
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# CHECK-ALIAS: fscsr t2
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# CHECK-EXT-F-ON: fscsr t2
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# CHECK-EXT-F-OFF: csrw 3, t2
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csrrw zero, 3, t2
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# CHECK-INST: csrrw zero, 3, t2
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# CHECK-ALIAS: fscsr t2
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# CHECK-EXT-F-ON: fscsr t2
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# CHECK-EXT-F-OFF: csrw 3, t2
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csrrw zero, 3, t2
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# CHECK-INST: csrrw t0, 2, zero
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# CHECK-ALIAS: fsrm t0, zero
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# CHECK-EXT-F-ON: fsrm t0, zero
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# CHECK-EXT-F-OFF: csrrw t0, 2, zero
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csrrw t0, 2, zero
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# CHECK-INST: csrrw t0, 2, t1
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# CHECK-ALIAS: fsrm t0, t1
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# CHECK-EXT-F-ON: fsrm t0, t1
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# CHECK-EXT-F-OFF: csrrw t0, 2, t1
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csrrw t0, 2, t1
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# CHECK-INST: csrrwi t0, 2, 31
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# CHECK-ALIAS: fsrmi t0, 31
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# CHECK-EXT-F-ON: fsrmi t0, 31
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# CHECK-EXT-F-OFF: csrrwi t0, 2, 31
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csrrwi t0, 2, 31
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# CHECK-INST: csrrwi zero, 2, 31
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# CHECK-ALIAS: fsrmi 31
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# CHECK-EXT-F-ON: fsrmi 31
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# CHECK-EXT-F-OFF: csrwi 2, 31
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csrrwi zero, 2, 31
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# CHECK-INST: csrrs t0, 1, zero
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# CHECK-ALIAS: frflags t0
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# CHECK-EXT-F-ON: frflags t0
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# CHECK-EXT-F-OFF: csrr t0, 1
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csrrs t0, 1, zero
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# CHECK-INST: csrrw t0, 1, t2
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# CHECK-ALIAS: fsflags t0, t2
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# CHECK-EXT-F-ON: fsflags t0, t2
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# CHECK-EXT-F-OFF: csrrw t0, 1, t2
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csrrw t0, 1, t2
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# CHECK-INST: csrrw zero, 1, t2
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# CHECK-ALIAS: fsflags t2
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# CHECK-EXT-F-ON: fsflags t2
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# CHECK-EXT-F-OFF: csrw 1, t2
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csrrw zero, 1, t2
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# CHECK-INST: csrrwi t0, 1, 31
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# CHECK-ALIAS: fsflagsi t0, 31
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# CHECK-EXT-F: fsflagsi t0, 31
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# CHECK-EXT-F-OFF: csrrwi t0, 1, 31
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csrrwi t0, 1, 31
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# CHECK-INST: csrrwi zero, 1, 31
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# CHECK-ALIAS: fsflagsi 31
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# CHECK-EXT-F: fsflagsi 31
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# CHECK-EXT-F-OFF: csrwi 1, 31
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csrrwi zero, 1, 31
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