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make -print-machineinstrs work for both SparcV9 and X86
llvm-svn: 12122
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e8ebdcc780
commit
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@ -16,6 +16,10 @@
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#define LLVM_TARGET_TARGETMACHINEIMPLS_H
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#define LLVM_TARGET_TARGETMACHINEIMPLS_H
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namespace llvm {
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namespace llvm {
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/// Command line options shared between TargetMachine implementations -
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/// these should go in their own header eventually.
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///
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extern bool PrintMachineCode;
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class TargetMachine;
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class TargetMachine;
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class Module;
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class Module;
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@ -162,6 +162,10 @@ SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out
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PM.add(createInstructionSchedulingWithSSAPass(*this));
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PM.add(createInstructionSchedulingWithSSAPass(*this));
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PM.add(getRegisterAllocator(*this));
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PM.add(getRegisterAllocator(*this));
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createPrologEpilogInsertionPass());
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PM.add(createPrologEpilogInsertionPass());
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if (!DisablePeephole)
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if (!DisablePeephole)
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@ -14,8 +14,22 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Type.h"
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#include "llvm/Type.h"
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#include "llvm/IntrinsicLowering.h"
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#include "llvm/IntrinsicLowering.h"
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#include "Support/CommandLine.h"
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using namespace llvm;
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using namespace llvm;
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//---------------------------------------------------------------------------
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// Command-line options that tend to be useful on more than one back-end.
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//
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namespace llvm {
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bool PrintMachineCode;
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};
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namespace {
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cl::opt<bool, true> PrintCode("print-machineinstrs",
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cl::desc("Print generated machine code"),
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cl::location(PrintMachineCode), cl::init(false));
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};
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// TargetMachine Class
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// TargetMachine Class
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//
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//
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@ -25,8 +25,6 @@
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using namespace llvm;
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using namespace llvm;
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namespace {
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namespace {
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cl::opt<bool> PrintCode("print-machineinstrs",
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cl::desc("Print generated machine code"));
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cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
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cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
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cl::desc("Use the 'simple' X86 instruction selector"));
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cl::desc("Use the 'simple' X86 instruction selector"));
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cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
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cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
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@ -79,18 +77,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createX86SSAPeepholeOptimizerPass());
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PM.add(createX86SSAPeepholeOptimizerPass());
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// Print the instruction selected machine code...
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// Print the instruction selected machine code...
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Perform register allocation to convert to a concrete x86 representation
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// Perform register allocation to convert to a concrete x86 representation
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PM.add(createRegisterAllocator());
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PM.add(createRegisterAllocator());
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createX86FloatingPointStackifierPass());
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PM.add(createX86FloatingPointStackifierPass());
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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@ -98,7 +96,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createX86PeepholeOptimizerPass());
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PM.add(createX86PeepholeOptimizerPass());
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if (PrintCode) // Print the register-allocated code
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if (PrintMachineCode) // Print the register-allocated code
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PM.add(createX86CodePrinterPass(std::cerr, *this));
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PM.add(createX86CodePrinterPass(std::cerr, *this));
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if (!DisableOutput)
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if (!DisableOutput)
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@ -138,18 +136,18 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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// FIXME: Add SSA based peephole optimizer here.
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// FIXME: Add SSA based peephole optimizer here.
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// Print the instruction selected machine code...
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// Print the instruction selected machine code...
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Perform register allocation to convert to a concrete x86 representation
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// Perform register allocation to convert to a concrete x86 representation
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PM.add(createRegisterAllocator());
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PM.add(createRegisterAllocator());
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createX86FloatingPointStackifierPass());
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PM.add(createX86FloatingPointStackifierPass());
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if (PrintCode)
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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@ -157,7 +155,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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PM.add(createX86PeepholeOptimizerPass());
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PM.add(createX86PeepholeOptimizerPass());
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if (PrintCode) // Print the register-allocated code
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if (PrintMachineCode) // Print the register-allocated code
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PM.add(createX86CodePrinterPass(std::cerr, TM));
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PM.add(createX86CodePrinterPass(std::cerr, TM));
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}
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}
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