make -print-machineinstrs work for both SparcV9 and X86

llvm-svn: 12122
This commit is contained in:
Brian Gaeke 2004-03-04 19:16:23 +00:00
parent e8ebdcc780
commit 0b913593ae
4 changed files with 30 additions and 10 deletions

View File

@ -16,6 +16,10 @@
#define LLVM_TARGET_TARGETMACHINEIMPLS_H #define LLVM_TARGET_TARGETMACHINEIMPLS_H
namespace llvm { namespace llvm {
/// Command line options shared between TargetMachine implementations -
/// these should go in their own header eventually.
///
extern bool PrintMachineCode;
class TargetMachine; class TargetMachine;
class Module; class Module;

View File

@ -162,6 +162,10 @@ SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out
PM.add(createInstructionSchedulingWithSSAPass(*this)); PM.add(createInstructionSchedulingWithSSAPass(*this));
PM.add(getRegisterAllocator(*this)); PM.add(getRegisterAllocator(*this));
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createPrologEpilogInsertionPass()); PM.add(createPrologEpilogInsertionPass());
if (!DisablePeephole) if (!DisablePeephole)

View File

@ -14,8 +14,22 @@
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/IntrinsicLowering.h" #include "llvm/IntrinsicLowering.h"
#include "Support/CommandLine.h"
using namespace llvm; using namespace llvm;
//---------------------------------------------------------------------------
// Command-line options that tend to be useful on more than one back-end.
//
namespace llvm {
bool PrintMachineCode;
};
namespace {
cl::opt<bool, true> PrintCode("print-machineinstrs",
cl::desc("Print generated machine code"),
cl::location(PrintMachineCode), cl::init(false));
};
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
// TargetMachine Class // TargetMachine Class
// //

View File

@ -25,8 +25,6 @@
using namespace llvm; using namespace llvm;
namespace { namespace {
cl::opt<bool> PrintCode("print-machineinstrs",
cl::desc("Print generated machine code"));
cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
cl::desc("Use the 'simple' X86 instruction selector")); cl::desc("Use the 'simple' X86 instruction selector"));
cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true), cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
@ -79,18 +77,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createX86SSAPeepholeOptimizerPass()); PM.add(createX86SSAPeepholeOptimizerPass());
// Print the instruction selected machine code... // Print the instruction selected machine code...
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation // Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator()); PM.add(createRegisterAllocator());
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass()); PM.add(createX86FloatingPointStackifierPass());
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references... // Insert prolog/epilog code. Eliminate abstract frame index references...
@ -98,7 +96,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createX86PeepholeOptimizerPass()); PM.add(createX86PeepholeOptimizerPass());
if (PrintCode) // Print the register-allocated code if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, *this)); PM.add(createX86CodePrinterPass(std::cerr, *this));
if (!DisableOutput) if (!DisableOutput)
@ -138,18 +136,18 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// FIXME: Add SSA based peephole optimizer here. // FIXME: Add SSA based peephole optimizer here.
// Print the instruction selected machine code... // Print the instruction selected machine code...
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation // Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator()); PM.add(createRegisterAllocator());
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass()); PM.add(createX86FloatingPointStackifierPass());
if (PrintCode) if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references... // Insert prolog/epilog code. Eliminate abstract frame index references...
@ -157,7 +155,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
PM.add(createX86PeepholeOptimizerPass()); PM.add(createX86PeepholeOptimizerPass());
if (PrintCode) // Print the register-allocated code if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, TM)); PM.add(createX86CodePrinterPass(std::cerr, TM));
} }