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[Packetizer] Add AliasAnalysis as a parameter to the packetizer

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This will make the depedence graph more accurate if an alias analysis
is provided. If nullptr is specified in its place, the behavior will
remain as it is currently.

llvm-svn: 255540
This commit is contained in:
Krzysztof Parzyszek 2015-12-14 20:35:13 +00:00
parent 183f136627
commit 0cb4e2fced
4 changed files with 18 additions and 10 deletions
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5
include/llvm/CodeGen/DFAPacketizer.h
View File

@ -128,6 +128,7 @@ class VLIWPacketizerList {
protected:
MachineFunction &MF;
const TargetInstrInfo *TII;
AliasAnalysis *AA;
// The VLIW Scheduler.
DefaultVLIWScheduler *VLIWScheduler;
@ -141,7 +142,9 @@ protected:
std::map<MachineInstr*, SUnit*> MIToSUnit;
public:
VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI);
// The AliasAnalysis parameter can be nullptr.
VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
AliasAnalysis *AA);
virtual ~VLIWPacketizerList();

18
lib/CodeGen/DFAPacketizer.cpp
View File

@ -149,31 +149,35 @@ namespace llvm {
// DefaultVLIWScheduler - This class extends ScheduleDAGInstrs and overrides
// Schedule method to build the dependence graph.
class DefaultVLIWScheduler : public ScheduleDAGInstrs {
private:
AliasAnalysis *AA;
public:
DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI);
DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
AliasAnalysis *AA);
// Schedule - Actual scheduling work.
void schedule() override;
};
}
DefaultVLIWScheduler::DefaultVLIWScheduler(MachineFunction &MF,
MachineLoopInfo &MLI)
: ScheduleDAGInstrs(MF, &MLI) {
MachineLoopInfo &MLI,
AliasAnalysis *AA)
: ScheduleDAGInstrs(MF, &MLI), AA(AA) {
CanHandleTerminators = true;
}
void DefaultVLIWScheduler::schedule() {
// Build the scheduling graph.
buildSchedGraph(nullptr);
buildSchedGraph(AA);
}
// VLIWPacketizerList Ctor
VLIWPacketizerList::VLIWPacketizerList(MachineFunction &MF,
MachineLoopInfo &MLI)
: MF(MF) {
MachineLoopInfo &MLI, AliasAnalysis *AA)
: MF(MF), AA(AA) {
TII = MF.getSubtarget().getInstrInfo();
ResourceTracker = TII->CreateTargetScheduleState(MF.getSubtarget());
VLIWScheduler = new DefaultVLIWScheduler(MF, MLI);
VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, AA);
}
// VLIWPacketizerList Dtor

3
lib/Target/AMDGPU/R600Packetizer.cpp
View File

@ -149,7 +149,8 @@ private:
public:
// Ctor.
R600PacketizerList(MachineFunction &MF, MachineLoopInfo &MLI)
: VLIWPacketizerList(MF, MLI), TII(static_cast<const R600InstrInfo *>(
: VLIWPacketizerList(MF, MLI, nullptr),
TII(static_cast<const R600InstrInfo *>(
MF.getSubtarget().getInstrInfo())),
TRI(TII->getRegisterInfo()) {
VLIW5 = !MF.getSubtarget<AMDGPUSubtarget>().hasCaymanISA();

2
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
View File

@ -186,7 +186,7 @@ INITIALIZE_PASS_END(HexagonPacketizer, "packets", "Hexagon Packetizer",
HexagonPacketizerList::HexagonPacketizerList(
MachineFunction &MF, MachineLoopInfo &MLI,
const MachineBranchProbabilityInfo *MBPI)
: VLIWPacketizerList(MF, MLI) {
: VLIWPacketizerList(MF, MLI, nullptr) {
this->MBPI = MBPI;
}