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[GlobalISel] Add a type to MachineInstr.

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We actually need that information only for generic instructions, therefore it
would be nice not to have to pay the extra memory consumption for all
instructions. Especially because a typed non-generic instruction does not make
sense.

The question is then, is it possible to have that information in a union or
something?
My initial thought was that we could have a derived class GenericMachineInstr
with additional information, but in practice it makes little to no sense since
generic MachineInstrs are likely turned into non-generic ones by just switching
the opcode. In other words, we don't want to go through the process of creating
a new, non-generic MachineInstr, object each time we do this switch. The memory
benefit probably is not worth the extra compile time.

Another option would be to keep the type of the MachineInstr in a side table.
This would induce an extra indirection though.

Anyway, I will file a PR to discuss about it and remember we need to come back
to it at some point.

llvm-svn: 260558
This commit is contained in:
Quentin Colombet 2016-02-11 18:22:37 +00:00
parent 672363ee16
commit 0da13b5927
2 changed files with 43 additions and 5 deletions
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23
include/llvm/CodeGen/MachineInstr.h
View File

@ -38,6 +38,9 @@ template <typename T> class SmallVectorImpl;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
#ifdef LLVM_BUILD_GLOBAL_ISEL
class Type;
#endif
class MachineFunction;
class MachineMemOperand;
@ -102,6 +105,13 @@ private:
DebugLoc debugLoc; // Source line information.
#ifdef LLVM_BUILD_GLOBAL_ISEL
/// Type of the instruction in case of a generic opcode.
/// \invariant This must be nullptr is getOpcode() is not
/// in the range of generic opcodes.
Type *Ty;
#endif
MachineInstr(const MachineInstr&) = delete;
void operator=(const MachineInstr&) = delete;
// Use MachineFunction::DeleteMachineInstr() instead.
@ -176,6 +186,19 @@ public:
Flags &= ~((uint8_t)Flag);
}
#ifdef LLVM_BUILD_GLOBAL_ISEL
/// Set the type of the instruction.
/// \pre getOpcode() is in the range of the generic opcodes.
void setType(Type *Ty) {
assert(
(!Ty || (getOpcode() >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START &&
getOpcode() <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END)) &&
"Non generic instructions are not supposed to be typed");
this->Ty = Ty;
}
Type *getType() const { return Ty; }
#endif
/// Return true if MI is in a bundle (but not the first MI in a bundle).
///
/// A bundle looks like this before it's finalized:

25
lib/CodeGen/MachineInstr.cpp
View File

@ -653,7 +653,12 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
DebugLoc dl, bool NoImp)
: MCID(&tid), Parent(nullptr), Operands(nullptr), NumOperands(0), Flags(0),
AsmPrinterFlags(0), NumMemRefs(0), MemRefs(nullptr),
debugLoc(std::move(dl)) {
debugLoc(std::move(dl))
#ifdef LLVM_BUILD_GLOBAL_ISEL
,
Ty(nullptr)
#endif
{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
// Reserve space for the expected number of operands.
@ -670,10 +675,14 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
/// MachineInstr ctor - Copies MachineInstr arg exactly
///
MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
: MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
Flags(0), AsmPrinterFlags(0),
NumMemRefs(MI.NumMemRefs), MemRefs(MI.MemRefs),
debugLoc(MI.getDebugLoc()) {
: MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
Flags(0), AsmPrinterFlags(0), NumMemRefs(MI.NumMemRefs),
MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
#ifdef LLVM_BUILD_GLOBAL_ISEL
,
Ty(nullptr)
#endif
{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
CapOperands = OperandCapacity::get(MI.getNumOperands());
@ -1677,6 +1686,12 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
else
OS << "UNKNOWN";
#ifdef LLVM_BUILD_GLOBAL_ISEL
if (Ty)
OS << ' ' << *Ty << ' ';
#endif
if (SkipOpers)
return;