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Make x86-64 membarriers work without sse and clean up some of the

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uses.

llvm-svn: 110274
This commit is contained in:
Eric Christopher 2010-08-04 23:03:04 +00:00
parent dcb6099f9e
commit 0e09eb9f77
3 changed files with 14 additions and 4 deletions
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7
lib/Target/X86/X86ISelLowering.cpp
View File

@ -7654,9 +7654,12 @@ SDValue X86TargetLowering::LowerXALUO(SDValue Op, SelectionDAG &DAG) const {
SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{
DebugLoc dl = Op.getDebugLoc();
if (!Subtarget->hasSSE2())
if (!Subtarget->hasSSE2()) {
SDValue Zero = DAG.getConstant(0,
Subtarget->is64Bit() ? MVT::i64 : MVT::i32);
return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0),
DAG.getConstant(0, MVT::i32));
Zero);
}
unsigned isDev = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue();
if(!isDev)

7
lib/Target/X86/X86Instr64bit.td
View File

@ -1619,6 +1619,13 @@ def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
// Atomic Instructions
//===----------------------------------------------------------------------===//
// TODO: Get this to fold the constant into the instruction.
let Defs = [ESP] in
def Int_MemBarrierNoSSE64 : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
"lock\n\t"
"or{q}\t{$zero, (%rsp)|(%rsp), $zero}",
[(X86MemBarrierNoSSE GR64:$zero)]>, LOCK;
let Defs = [RAX, EFLAGS], Uses = [RAX] in {
def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap),
"lock\n\t"

4
lib/Target/X86/X86InstrInfo.td
View File

@ -3934,8 +3934,8 @@ def Int_MemBarrier : I<0, Pseudo, (outs), (ins),
[(X86MemBarrier)]>, Requires<[HasSSE2]>;
// TODO: Get this to fold the constant into the instruction.
let Uses = [ESP] in
def Int_MemBarrierNoSSE : I<0x0B, Pseudo, (outs), (ins GR32:$zero),
let Defs = [ESP] in
def Int_MemBarrierNoSSE : I<0x09, MRM1r, (outs), (ins GR32:$zero),
"lock\n\t"
"or{l}\t{$zero, (%esp)|(%esp), $zero}",
[(X86MemBarrierNoSSE GR32:$zero)]>, LOCK;