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Fix 80 column violations.
Original patch by Liu. llvm-svn: 140385
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@ -100,7 +100,8 @@ void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const {
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DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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bool FP = hasFP(MF);
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bool Nested = MF.getFunction()->getAttributes().hasAttrSomewhere(Attribute::Nest);
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bool Nested = MF.getFunction()->
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getAttributes().hasAttrSomewhere(Attribute::Nest);
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if (Nested) {
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loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
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@ -1415,7 +1415,8 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
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// operands are constant canonicalize smallest to RHS.
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if ((N0C && !N1C) ||
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(N0C && N1C && N0C->getZExtValue() < N1C->getZExtValue()))
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return DAG.getNode(XCoreISD::LMUL, dl, DAG.getVTList(VT, VT), N1, N0, N2, N3);
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return DAG.getNode(XCoreISD::LMUL, dl, DAG.getVTList(VT, VT),
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N1, N0, N2, N3);
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// lmul(x, 0, a, b)
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if (N1C && N1C->isNullValue()) {
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@ -766,19 +766,23 @@ def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
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let Constraints = "$src1 = $dst" in {
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def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
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"sext $dst, $src2",
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[(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, immBitp:$src2))]>;
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[(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1,
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immBitp:$src2))]>;
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def SEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2),
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"sext $dst, $src2",
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[(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, GRRegs:$src2))]>;
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[(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1,
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GRRegs:$src2))]>;
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def ZEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
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"zext $dst, $src2",
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[(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, immBitp:$src2))]>;
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[(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1,
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immBitp:$src2))]>;
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def ZEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2),
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"zext $dst, $src2",
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[(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, GRRegs:$src2))]>;
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[(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1,
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GRRegs:$src2))]>;
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def ANDNOT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2),
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"andnot $dst, $src2",
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@ -825,7 +829,8 @@ def OUT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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let Constraints = "$src = $dst" in
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def OUTSHR_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r, GRRegs:$src),
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"outshr res[$r], $src",
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[(set GRRegs:$dst, (int_xcore_outshr GRRegs:$r, GRRegs:$src))]>;
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[(set GRRegs:$dst, (int_xcore_outshr GRRegs:$r,
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GRRegs:$src))]>;
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def INCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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"inct $dst, res[$r]",
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@ -842,7 +847,8 @@ def IN_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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let Constraints = "$src = $dst" in
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def INSHR_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r, GRRegs:$src),
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"inshr $dst, res[$r]",
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[(set GRRegs:$dst, (int_xcore_inshr GRRegs:$r, GRRegs:$src))]>;
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[(set GRRegs:$dst, (int_xcore_inshr GRRegs:$r,
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GRRegs:$src))]>;
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def CHKCT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"chkct res[$r], $val",
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