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[DAGcombine] Teach the combiner about -a = ~a + 1
Summary: This include variant for add, uaddo and addcarry. usubo and subcarry require the carry to be flipped to preserve semantic, but we chose to do the transform anyway in that case as to push the transform down the carry chain. Reviewers: efriedma, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46505 llvm-svn: 333943
This commit is contained in:
Amaury Sechet
parent
6b92d64b27
commit
1042265b01
@ -2053,6 +2053,11 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
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DAG.haveNoCommonBitsSet(N0, N1))
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return DAG.getNode(ISD::OR, DL, VT, N0, N1);
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// fold (add (xor a, -1), 1) -> (sub 0, a)
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if (isBitwiseNot(N0) && isOneConstantOrOneSplatConstant(N1))
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return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
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N0.getOperand(0));
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if (SDValue Combined = visitADDLike(N0, N1, N))
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return Combined;
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@ -2188,6 +2193,40 @@ SDValue DAGCombiner::visitADDC(SDNode *N) {
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return SDValue();
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}
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static SDValue flipBoolean(SDValue V, const SDLoc &DL, EVT VT,
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SelectionDAG &DAG, const TargetLowering &TLI) {
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SDValue Cst;
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switch(TLI.getBooleanContents(VT)) {
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case TargetLowering::ZeroOrOneBooleanContent:
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case TargetLowering::UndefinedBooleanContent:
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Cst = DAG.getConstant(1, DL, VT);
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break;
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case TargetLowering::ZeroOrNegativeOneBooleanContent:
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Cst = DAG.getConstant(-1, DL, VT);
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break;
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default:
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llvm_unreachable("Unsupported boolean content");
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}
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return DAG.getNode(ISD::XOR, DL, VT, V, Cst);
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}
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static bool isBooleanFlip(SDValue V, EVT VT, const TargetLowering &TLI) {
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if (V.getOpcode() != ISD::XOR) return false;
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ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V.getOperand(1));
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if (!Const) return false;
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switch(TLI.getBooleanContents(VT)) {
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case TargetLowering::ZeroOrOneBooleanContent:
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return Const->isOne();
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case TargetLowering::ZeroOrNegativeOneBooleanContent:
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return Const->isAllOnesValue();
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case TargetLowering::UndefinedBooleanContent:
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return (Const->getAPIntValue() & 0x01) == 1;
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}
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llvm_unreachable("Unsupported boolean content");
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}
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SDValue DAGCombiner::visitUADDO(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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@ -2218,6 +2257,15 @@ SDValue DAGCombiner::visitUADDO(SDNode *N) {
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return CombineTo(N, DAG.getNode(ISD::ADD, DL, VT, N0, N1),
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DAG.getConstant(0, DL, CarryVT));
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// fold (uaddo (xor a, -1), 1) -> (usub 0, a) and flip carry.
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if (isBitwiseNot(N0) && isOneConstantOrOneSplatConstant(N1)) {
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SDValue Sub = DAG.getNode(ISD::USUBO, DL, N->getVTList(),
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DAG.getConstant(0, DL, VT),
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N0.getOperand(0));
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return CombineTo(N, Sub,
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flipBoolean(Sub.getValue(1), DL, CarryVT, DAG, TLI));
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}
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if (SDValue Combined = visitUADDOLike(N0, N1, N))
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return Combined;
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@ -2287,10 +2335,11 @@ SDValue DAGCombiner::visitADDCARRY(SDNode *N) {
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return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1);
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}
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EVT CarryVT = CarryIn.getValueType();
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// fold (addcarry 0, 0, X) -> (and (ext/trunc X), 1) and no carry.
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if (isNullConstant(N0) && isNullConstant(N1)) {
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EVT VT = N0.getValueType();
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EVT CarryVT = CarryIn.getValueType();
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SDValue CarryExt = DAG.getBoolExtOrTrunc(CarryIn, DL, VT, CarryVT);
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AddToWorklist(CarryExt.getNode());
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return CombineTo(N, DAG.getNode(ISD::AND, DL, VT, CarryExt,
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@ -2298,6 +2347,16 @@ SDValue DAGCombiner::visitADDCARRY(SDNode *N) {
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DAG.getConstant(0, DL, CarryVT));
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}
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// fold (addcarry (xor a, -1), 0, !b) -> (subcarry 0, a, b) and flip carry.
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if (isBitwiseNot(N0) && isNullConstant(N1) &&
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isBooleanFlip(CarryIn, CarryVT, TLI)) {
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SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(),
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DAG.getConstant(0, DL, N0.getValueType()),
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N0.getOperand(0), CarryIn.getOperand(0));
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return CombineTo(N, Sub,
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flipBoolean(Sub.getValue(1), DL, CarryVT, DAG, TLI));
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}
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if (SDValue Combined = visitADDCARRYLike(N0, N1, CarryIn, N))
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return Combined;
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@ -386,23 +386,20 @@ entry:
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define i32 @inc_not(i32 %a) {
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; X32-LABEL: inc_not:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: notl %eax
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; X32-NEXT: incl %eax
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LINUX-LABEL: inc_not:
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; X64-LINUX: # %bb.0:
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; X64-LINUX-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-LINUX-NEXT: notl %edi
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; X64-LINUX-NEXT: leal 1(%rdi), %eax
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; X64-LINUX-NEXT: negl %edi
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; X64-LINUX-NEXT: movl %edi, %eax
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; X64-LINUX-NEXT: retq
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;
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; X64-WIN32-LABEL: inc_not:
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; X64-WIN32: # %bb.0:
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; X64-WIN32-NEXT: # kill: def $ecx killed $ecx def $rcx
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; X64-WIN32-NEXT: notl %ecx
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; X64-WIN32-NEXT: leal 1(%rcx), %eax
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; X64-WIN32-NEXT: negl %ecx
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; X64-WIN32-NEXT: movl %ecx, %eax
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; X64-WIN32-NEXT: retq
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%nota = xor i32 %a, -1
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%r = add i32 %nota, 1
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@ -414,27 +411,24 @@ define void @uaddo1_not(i32 %a, i32* %p0, i1* %p1) {
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: notl %edx
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; X32-NEXT: addl $1, %edx
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: subl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: movl %edx, (%ecx)
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; X32-NEXT: setb (%eax)
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; X32-NEXT: setae (%eax)
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; X32-NEXT: retl
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;
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; X64-LINUX-LABEL: uaddo1_not:
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; X64-LINUX: # %bb.0:
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; X64-LINUX-NEXT: notl %edi
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; X64-LINUX-NEXT: addl $1, %edi
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; X64-LINUX-NEXT: negl %edi
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; X64-LINUX-NEXT: movl %edi, (%rsi)
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; X64-LINUX-NEXT: setb (%rdx)
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; X64-LINUX-NEXT: setae (%rdx)
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; X64-LINUX-NEXT: retq
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;
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; X64-WIN32-LABEL: uaddo1_not:
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; X64-WIN32: # %bb.0:
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; X64-WIN32-NEXT: notl %ecx
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; X64-WIN32-NEXT: addl $1, %ecx
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; X64-WIN32-NEXT: negl %ecx
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; X64-WIN32-NEXT: movl %ecx, (%rdx)
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; X64-WIN32-NEXT: setb (%r8)
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; X64-WIN32-NEXT: setae (%r8)
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; X64-WIN32-NEXT: retq
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%nota = xor i32 %a, -1
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%uaddo = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %nota, i32 1)
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@ -321,12 +321,10 @@ entry:
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define i128 @addcarry1_not(i128 %n) {
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; CHECK-LABEL: addcarry1_not:
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; CHECK: # %bb.0:
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; CHECK-NEXT: notq %rsi
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; CHECK-NEXT: notq %rdi
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; CHECK-NEXT: addq $1, %rdi
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; CHECK-NEXT: adcq $0, %rsi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: negq %rdi
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; CHECK-NEXT: sbbq %rsi, %rdx
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: movq %rsi, %rdx
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; CHECK-NEXT: retq
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%1 = xor i128 %n, -1
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%2 = add i128 %1, 1
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@ -37,22 +37,18 @@ entry:
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define %S @negate(%S* nocapture readonly %this) {
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; CHECK-LABEL: negate:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq (%rsi), %rax
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; CHECK-NEXT: movq 8(%rsi), %rcx
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; CHECK-NEXT: notq %rax
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; CHECK-NEXT: addq $1, %rax
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; CHECK-NEXT: notq %rcx
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; CHECK-NEXT: adcq $0, %rcx
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; CHECK-NEXT: movq 16(%rsi), %rdx
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; CHECK-NEXT: notq %rdx
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; CHECK-NEXT: adcq $0, %rdx
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; CHECK-NEXT: movq 24(%rsi), %rsi
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; CHECK-NEXT: notq %rsi
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; CHECK-NEXT: adcq $0, %rsi
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: movq %rcx, 8(%rdi)
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; CHECK-NEXT: movq %rdx, 16(%rdi)
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; CHECK-NEXT: movq %rsi, 24(%rdi)
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; CHECK-NEXT: xorl %r8d, %r8d
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: subq (%rsi), %rcx
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; CHECK-NEXT: movl $0, %edx
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; CHECK-NEXT: sbbq 8(%rsi), %rdx
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; CHECK-NEXT: movl $0, %eax
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; CHECK-NEXT: sbbq 16(%rsi), %rax
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; CHECK-NEXT: sbbq 24(%rsi), %r8
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; CHECK-NEXT: movq %rcx, (%rdi)
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; CHECK-NEXT: movq %rdx, 8(%rdi)
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; CHECK-NEXT: movq %rax, 16(%rdi)
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; CHECK-NEXT: movq %r8, 24(%rdi)
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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entry:
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