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Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane
should be left unspecified now that Bob Wilson has fixed pr5470. llvm-svn: 89676
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@ -2518,27 +2518,27 @@ def VMOVv2i64 : N1ModImm<1, 0b000, 0b1110, 0, 1, 1, 1, (outs QPR:$dst),
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// VMOV : Vector Get Lane (move scalar to ARM core register)
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def VGETLNs8 : NVGetLane<0b11100101, 0b1011, 0b00,
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def VGETLNs8 : NVGetLane<{1,1,1,0,0,1,?,1}, 0b1011, {?,?},
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(outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane),
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IIC_VMOVSI, "vmov", ".s8\t$dst, $src[$lane]",
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[(set GPR:$dst, (NEONvgetlanes (v8i8 DPR:$src),
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imm:$lane))]>;
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def VGETLNs16 : NVGetLane<0b11100001, 0b1011, 0b01,
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def VGETLNs16 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, {?,1},
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(outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane),
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IIC_VMOVSI, "vmov", ".s16\t$dst, $src[$lane]",
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[(set GPR:$dst, (NEONvgetlanes (v4i16 DPR:$src),
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imm:$lane))]>;
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def VGETLNu8 : NVGetLane<0b11101101, 0b1011, 0b00,
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def VGETLNu8 : NVGetLane<{1,1,1,0,1,1,?,1}, 0b1011, {?,?},
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(outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane),
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IIC_VMOVSI, "vmov", ".u8\t$dst, $src[$lane]",
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[(set GPR:$dst, (NEONvgetlaneu (v8i8 DPR:$src),
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imm:$lane))]>;
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def VGETLNu16 : NVGetLane<0b11101001, 0b1011, 0b01,
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def VGETLNu16 : NVGetLane<{1,1,1,0,1,0,?,1}, 0b1011, {?,1},
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(outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane),
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IIC_VMOVSI, "vmov", ".u16\t$dst, $src[$lane]",
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[(set GPR:$dst, (NEONvgetlaneu (v4i16 DPR:$src),
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imm:$lane))]>;
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def VGETLNi32 : NVGetLane<0b11100001, 0b1011, 0b00,
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def VGETLNi32 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, 0b00,
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(outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane),
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IIC_VMOVSI, "vmov", ".32\t$dst, $src[$lane]",
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[(set GPR:$dst, (extractelt (v2i32 DPR:$src),
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@ -2579,17 +2579,17 @@ def : Pat<(extractelt (v2f64 QPR:$src1), imm:$src2),
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// VMOV : Vector Set Lane (move ARM core register to scalar)
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let Constraints = "$src1 = $dst" in {
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def VSETLNi8 : NVSetLane<0b11100100, 0b1011, 0b00, (outs DPR:$dst),
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def VSETLNi8 : NVSetLane<{1,1,1,0,0,1,?,0}, 0b1011, {?,?}, (outs DPR:$dst),
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(ins DPR:$src1, GPR:$src2, nohash_imm:$lane),
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IIC_VMOVISL, "vmov", ".8\t$dst[$lane], $src2",
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[(set DPR:$dst, (vector_insert (v8i8 DPR:$src1),
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GPR:$src2, imm:$lane))]>;
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def VSETLNi16 : NVSetLane<0b11100000, 0b1011, 0b01, (outs DPR:$dst),
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def VSETLNi16 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, {?,1}, (outs DPR:$dst),
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(ins DPR:$src1, GPR:$src2, nohash_imm:$lane),
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IIC_VMOVISL, "vmov", ".16\t$dst[$lane], $src2",
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[(set DPR:$dst, (vector_insert (v4i16 DPR:$src1),
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GPR:$src2, imm:$lane))]>;
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def VSETLNi32 : NVSetLane<0b11100000, 0b1011, 0b00, (outs DPR:$dst),
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def VSETLNi32 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, 0b00, (outs DPR:$dst),
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(ins DPR:$src1, GPR:$src2, nohash_imm:$lane),
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IIC_VMOVISL, "vmov", ".32\t$dst[$lane], $src2",
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[(set DPR:$dst, (insertelt (v2i32 DPR:$src1),
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