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Fixed order of operands in comment to match code.
llvm-svn: 147890
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@ -13750,7 +13750,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG,
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// Canonicalize pandn to RHS
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if (N0.getOpcode() == X86ISD::ANDNP)
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std::swap(N0, N1);
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// or (and (m, x), (pandn m, y))
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// or (and (m, y), (pandn m, x))
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if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) {
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SDValue Mask = N1.getOperand(0);
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SDValue X = N1.getOperand(1);
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